Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3339	1			T9	20		T10	54		T16	49
values[1]	3707	1			T1	14		T10	20		T27	20
values[2]	3409	1			T5	14		T9	34		T10	45
values[3]	3635	1			T9	20		T25	111		T27	20
values[4]	3239	1			T10	20		T25	22		T16	23
values[5]	4209	1			T10	59		T25	32		T27	76
values[6]	3447	1			T9	20		T10	41		T16	22
values[7]	3782	1			T9	112		T43	6		T27	55

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4006	1			T9	20		T10	54		T27	55
values[1]	3445	1			T10	20		T27	31		T16	43
values[2]	3575	1			T25	77		T27	20		T28	21
values[3]	3381	1			T9	40		T10	45		T27	62
values[4]	3802	1			T9	126		T10	59		T25	46
values[5]	3882	1			T9	20		T25	20		T44	20
values[6]	3379	1			T10	41		T27	76		T44	20
values[7]	3297	1			T1	14		T5	14		T10	20

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

28045

1

T1

14

T5

14

T9

202

auto[1]

722

1

T9

4

T10

4

T25

4

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	534	1			T9	20		T10	53		T45	40
auto[0]	values[0]	values[1]	420	1			T16	22		T205	16		T190	20
auto[0]	values[0]	values[2]	268	1			T203	19		T183	37		T276	10
auto[0]	values[0]	values[3]	190	1			T273	4		T277	10		T186	40
auto[0]	values[0]	values[4]	515	1			T16	25		T89	6		T278	2
auto[0]	values[0]	values[5]	509	1			T45	19		T253	6		T255	18
auto[0]	values[0]	values[6]	461	1			T18	26		T191	88		T260	12
auto[0]	values[0]	values[7]	359	1			T20	20		T215	20		T275	20
auto[0]	values[1]	values[0]	494	1			T190	20		T184	42		T208	28
auto[0]	values[1]	values[1]	413	1			T10	20		T195	50		T72	22
auto[0]	values[1]	values[2]	375	1			T44	24		T72	20		T87	20
auto[0]	values[1]	values[3]	450	1			T16	22		T44	21		T45	20
auto[0]	values[1]	values[4]	439	1			T27	20		T279	4		T280	4
auto[0]	values[1]	values[5]	719	1			T173	19		T183	20		T186	53
auto[0]	values[1]	values[6]	371	1			T45	20		T203	20		T281	6
auto[0]	values[1]	values[7]	352	1			T1	14		T18	20		T87	20
auto[0]	values[2]	values[0]	367	1			T18	20		T72	21		T191	78
auto[0]	values[2]	values[1]	198	1			T27	31		T41	34		T226	16
auto[0]	values[2]	values[2]	423	1			T27	20		T200	19		T183	20
auto[0]	values[2]	values[3]	650	1			T10	44		T27	42		T41	19
auto[0]	values[2]	values[4]	304	1			T9	33		T215	22		T282	12
auto[0]	values[2]	values[5]	336	1			T20	28		T203	22		T193	42
auto[0]	values[2]	values[6]	463	1			T217	10		T203	20		T227	20
auto[0]	values[2]	values[7]	589	1			T5	14		T45	18		T202	20
auto[0]	values[3]	values[0]	529	1			T44	19		T20	55		T264	4
auto[0]	values[3]	values[1]	327	1			T41	20		T169	20		T194	20
auto[0]	values[3]	values[2]	527	1			T25	45		T28	21		T37	6
auto[0]	values[3]	values[3]	336	1			T9	20		T27	18		T47	59
auto[0]	values[3]	values[4]	535	1			T25	44		T33	24		T202	20
auto[0]	values[3]	values[5]	518	1			T25	19		T95	8		T173	20
auto[0]	values[3]	values[6]	569	1			T44	19		T20	20		T189	6
auto[0]	values[3]	values[7]	208	1			T41	20		T20	19		T265	40
auto[0]	values[4]	values[0]	512	1			T20	43		T266	10		T269	4
auto[0]	values[4]	values[1]	414	1			T20	26		T194	20		T283	4
auto[0]	values[4]	values[2]	415	1			T41	20		T203	19		T267	14
auto[0]	values[4]	values[3]	360	1			T41	34		T20	20		T127	4
auto[0]	values[4]	values[4]	538	1			T20	20		T229	12		T220	6
auto[0]	values[4]	values[5]	351	1			T202	20		T211	8		T262	21
auto[0]	values[4]	values[6]	226	1			T214	8		T258	12		T38	20
auto[0]	values[4]	values[7]	329	1			T10	20		T25	21		T16	23
auto[0]	values[5]	values[0]	628	1			T191	19		T186	20		T262	26
auto[0]	values[5]	values[1]	669	1			T45	20		T203	20		T183	120
auto[0]	values[5]	values[2]	491	1			T25	32		T20	20		T238	20
auto[0]	values[5]	values[3]	463	1			T16	20		T41	55		T90	18
auto[0]	values[5]	values[4]	593	1			T10	58		T284	2		T208	41
auto[0]	values[5]	values[5]	548	1			T59	18		T190	20		T88	19
auto[0]	values[5]	values[6]	393	1			T27	76		T203	20		T216	21
auto[0]	values[5]	values[7]	324	1			T45	19		T230	16		T85	6
auto[0]	values[6]	values[0]	238	1			T16	22		T38	24		T285	2
auto[0]	values[6]	values[1]	620	1			T124	12		T257	6		T196	14
auto[0]	values[6]	values[2]	672	1			T190	20		T87	20		T169	20
auto[0]	values[6]	values[3]	384	1			T9	19		T123	8		T125	12
auto[0]	values[6]	values[4]	346	1			T215	34		T186	20		T169	40
auto[0]	values[6]	values[5]	294	1			T44	20		T219	4		T215	19
auto[0]	values[6]	values[6]	369	1			T10	40		T199	18		T286	2
auto[0]	values[6]	values[7]	441	1			T153	20		T20	58		T250	2
auto[0]	values[7]	values[0]	609	1			T27	53		T44	43		T231	10
auto[0]	values[7]	values[1]	307	1			T16	21		T41	52		T45	17
auto[0]	values[7]	values[2]	317	1			T59	26		T190	20		T88	20
auto[0]	values[7]	values[3]	466	1			T44	23		T248	16		T287	16
auto[0]	values[7]	values[4]	435	1			T9	92		T235	2		T169	20
auto[0]	values[7]	values[5]	514	1			T9	18		T18	22		T195	25
auto[0]	values[7]	values[6]	437	1			T271	2		T249	8		T203	22
auto[0]	values[7]	values[7]	594	1			T43	6		T20	32		T288	2
auto[1]	values[0]	values[0]	12	1			T10	1		T180	3		T197	3
auto[1]	values[0]	values[1]	12	1			T88	1		T262	3		T208	3
auto[1]	values[0]	values[2]	13	1			T203	1		T183	2		T182	2
auto[1]	values[0]	values[3]	5	1			T277	4		T289	1		-	-
auto[1]	values[0]	values[4]	11	1			T16	2		T290	5		T291	2
auto[1]	values[0]	values[5]	9	1			T45	1		T203	1		T190	2
auto[1]	values[0]	values[6]	16	1			T18	3		T191	1		T88	4
auto[1]	values[0]	values[7]	5	1			T289	1		T207	1		T132	3
auto[1]	values[1]	values[0]	14	1			T184	1		T180	5		T292	2
auto[1]	values[1]	values[1]	6	1			T195	3		T233	1		T293	1
auto[1]	values[1]	values[2]	8	1			T44	2		T172	1		T207	2
auto[1]	values[1]	values[3]	15	1			T16	3		T44	1		T59	2
auto[1]	values[1]	values[4]	9	1			T228	1		T218	2		T294	1
auto[1]	values[1]	values[5]	15	1			T173	1		T180	1		T224	6
auto[1]	values[1]	values[6]	17	1			T203	4		T292	3		T295	3
auto[1]	values[1]	values[7]	10	1			T296	2		T297	2		T133	2
auto[1]	values[2]	values[0]	5	1			T191	1		T228	1		T298	2
auto[1]	values[2]	values[1]	3	1			T41	2		T299	1		-	-
auto[1]	values[2]	values[2]	10	1			T200	1		T169	2		T254	2
auto[1]	values[2]	values[3]	10	1			T10	1		T41	1		T203	1
auto[1]	values[2]	values[4]	13	1			T9	1		T215	2		T182	1
auto[1]	values[2]	values[5]	16	1			T20	3		T297	1		T300	3
auto[1]	values[2]	values[6]	14	1			T88	3		T301	2		T295	1
auto[1]	values[2]	values[7]	8	1			T45	2		T302	1		T132	1
auto[1]	values[3]	values[0]	16	1			T44	1		T20	1		T88	4
auto[1]	values[3]	values[1]	8	1			T218	4		T197	1		T295	1
auto[1]	values[3]	values[2]	9	1			T184	2		T204	1		T51	4
auto[1]	values[3]	values[3]	7	1			T27	2		T87	1		T180	1
auto[1]	values[3]	values[4]	9	1			T25	2		T33	1		T239	1
auto[1]	values[3]	values[5]	11	1			T25	1		T239	1		T38	1
auto[1]	values[3]	values[6]	17	1			T44	1		T228	4		T212	1
auto[1]	values[3]	values[7]	9	1			T20	2		T200	4		T303	1
auto[1]	values[4]	values[0]	12	1			T20	1		T269	2		T275	4
auto[1]	values[4]	values[1]	11	1			T39	2		T304	3		T291	5
auto[1]	values[4]	values[2]	14	1			T203	1		T267	6		T194	2
auto[1]	values[4]	values[3]	10	1			T41	2		T169	3		T188	5
auto[1]	values[4]	values[4]	21	1			T203	1		T218	3		T305	2
auto[1]	values[4]	values[5]	7	1			T262	2		T185	2		T297	1
auto[1]	values[4]	values[6]	8	1			T38	1		T247	1		T233	1
auto[1]	values[4]	values[7]	11	1			T25	1		T173	2		T306	2
auto[1]	values[5]	values[0]	16	1			T191	1		T262	1		T216	3
auto[1]	values[5]	values[1]	6	1			T38	1		T182	1		T132	2
auto[1]	values[5]	values[2]	16	1			T239	2		T185	1		T180	3
auto[1]	values[5]	values[3]	15	1			T16	1		T72	1		T236	4
auto[1]	values[5]	values[4]	14	1			T10	1		T194	6		T228	1
auto[1]	values[5]	values[5]	19	1			T59	2		T88	1		T307	2
auto[1]	values[5]	values[6]	4	1			T185	2		T180	1		T308	1
auto[1]	values[5]	values[7]	10	1			T45	1		T230	2		T169	2
auto[1]	values[6]	values[0]	7	1			T38	4		T309	1		T310	2
auto[1]	values[6]	values[1]	22	1			T186	6		T274	6		T180	3
auto[1]	values[6]	values[2]	1	1			T225	1		-	-		-	-
auto[1]	values[6]	values[3]	12	1			T9	1		T311	2		T308	2
auto[1]	values[6]	values[4]	10	1			T225	2		T295	2		T247	2
auto[1]	values[6]	values[5]	4	1			T215	1		T183	1		T312	2
auto[1]	values[6]	values[6]	7	1			T10	1		T244	2		T212	2
auto[1]	values[6]	values[7]	20	1			T20	2		T87	1		T88	1
auto[1]	values[7]	values[0]	13	1			T27	2		T44	2		T190	2
auto[1]	values[7]	values[1]	9	1			T41	1		T45	3		T195	1
auto[1]	values[7]	values[2]	16	1			T204	3		T275	2		T187	1
auto[1]	values[7]	values[3]	8	1			T292	3		T237	4		T313	1
auto[1]	values[7]	values[4]	10	1			T314	2		T180	2		T302	2
auto[1]	values[7]	values[5]	12	1			T9	2		T18	3		T225	1
auto[1]	values[7]	values[6]	7	1			T203	1		T183	1		T294	1
auto[1]	values[7]	values[7]	28	1			T20	2		T215	2		T194	1