Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3731	1			T26	10		T27	62		T28	20
values[1]	4075	1			T7	55		T13	37		T28	160
values[2]	3235	1			T28	20		T40	20		T223	4
values[3]	3763	1			T27	64		T37	24		T78	10
values[4]	4677	1			T27	32		T28	62		T39	10
values[5]	3941	1			T1	14		T8	14		T27	35
values[6]	3849	1			T27	60		T28	75		T40	40
values[7]	3353	1			T28	59		T184	16		T208	4

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3937	1			T1	14		T27	37		T28	20
values[1]	4053	1			T27	35		T28	32		T39	10
values[2]	4899	1			T27	20		T155	24		T78	10
values[3]	3208	1			T7	55		T27	76		T28	44
values[4]	3586	1			T27	20		T37	24		T184	16
values[5]	3107	1			T28	53		T209	6		T40	40
values[6]	4341	1			T8	14		T13	37		T27	65
values[7]	3493	1			T26	10		T28	67		T41	20

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

29862

1

T1

12

T7

55

T8

14

auto[1]

762

1

T1

2

T27

6

T28

7

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	523	1			T27	36		T19	58		T20	21
auto[0]	values[0]	values[1]	523	1			T40	40		T41	46		T18	20
auto[0]	values[0]	values[2]	455	1			T20	26		T219	6		T217	6
auto[0]	values[0]	values[3]	282	1			T40	18		T170	20		T236	8
auto[0]	values[0]	values[4]	572	1			T42	172		T20	24		T53	34
auto[0]	values[0]	values[5]	420	1			T191	17		T75	16		T169	22
auto[0]	values[0]	values[6]	512	1			T27	24		T153	27		T237	10
auto[0]	values[0]	values[7]	358	1			T26	10		T28	20		T170	22
auto[0]	values[1]	values[0]	518	1			T218	18		T173	8		T203	20
auto[0]	values[1]	values[1]	400	1			T18	20		T50	4		T169	41
auto[0]	values[1]	values[2]	689	1			T42	122		T19	26		T177	47
auto[0]	values[1]	values[3]	400	1			T7	55		T77	38		T238	12
auto[0]	values[1]	values[4]	624	1			T156	12		T177	20		T169	22
auto[0]	values[1]	values[5]	367	1			T209	6		T169	22		T239	22
auto[0]	values[1]	values[6]	547	1			T13	37		T28	158		T18	19
auto[0]	values[1]	values[7]	433	1			T53	27		T77	20		T76	6
auto[0]	values[2]	values[0]	315	1			T165	20		T146	38		T240	20
auto[0]	values[2]	values[1]	422	1			T48	21		T228	2		T179	47
auto[0]	values[2]	values[2]	562	1			T153	20		T183	92		T174	16
auto[0]	values[2]	values[3]	344	1			T216	4		T169	20		T241	2
auto[0]	values[2]	values[4]	394	1			T40	18		T20	20		T153	56
auto[0]	values[2]	values[5]	256	1			T28	20		T223	4		T169	20
auto[0]	values[2]	values[6]	540	1			T114	20		T191	20		T177	40
auto[0]	values[2]	values[7]	318	1			T41	19		T20	20		T191	20
auto[0]	values[3]	values[0]	394	1			T179	44		T142	148		T242	8
auto[0]	values[3]	values[1]	682	1			T17	23		T41	67		T48	24
auto[0]	values[3]	values[2]	429	1			T78	10		T18	27		T19	57
auto[0]	values[3]	values[3]	607	1			T27	42		T18	19		T42	157
auto[0]	values[3]	values[4]	246	1			T27	20		T37	20		T54	20
auto[0]	values[3]	values[5]	169	1			T153	49		T243	14		T230	19
auto[0]	values[3]	values[6]	643	1			T40	20		T205	18		T153	57
auto[0]	values[3]	values[7]	493	1			T20	46		T51	12		T244	6
auto[0]	values[4]	values[0]	522	1			T28	20		T48	51		T153	50
auto[0]	values[4]	values[1]	477	1			T39	6		T41	33		T169	22
auto[0]	values[4]	values[2]	1002	1			T153	19		T204	14		T169	20
auto[0]	values[4]	values[3]	587	1			T27	31		T28	22		T79	20
auto[0]	values[4]	values[4]	420	1			T153	39		T179	91		T197	20
auto[0]	values[4]	values[5]	457	1			T40	17		T74	10		T48	38
auto[0]	values[4]	values[6]	526	1			T42	76		T202	18		T48	40
auto[0]	values[4]	values[7]	549	1			T28	20		T77	19		T214	6
auto[0]	values[5]	values[0]	368	1			T1	12		T18	21		T245	20
auto[0]	values[5]	values[1]	464	1			T27	34		T41	31		T20	19
auto[0]	values[5]	values[2]	705	1			T155	24		T40	20		T41	34
auto[0]	values[5]	values[3]	474	1			T40	20		T18	28		T191	21
auto[0]	values[5]	values[4]	445	1			T20	20		T170	43		T171	130
auto[0]	values[5]	values[5]	342	1			T149	26		T154	37		T226	8
auto[0]	values[5]	values[6]	612	1			T8	14		T19	53		T169	20
auto[0]	values[5]	values[7]	442	1			T48	40		T77	19		T170	20
auto[0]	values[6]	values[0]	665	1			T20	20		T179	24		T142	58
auto[0]	values[6]	values[1]	523	1			T191	33		T171	20		T165	18
auto[0]	values[6]	values[2]	461	1			T27	20		T40	20		T41	20
auto[0]	values[6]	values[3]	309	1			T28	20		T153	20		T77	20
auto[0]	values[6]	values[4]	497	1			T19	62		T20	21		T246	21
auto[0]	values[6]	values[5]	568	1			T28	33		T40	20		T42	20
auto[0]	values[6]	values[6]	510	1			T27	40		T28	20		T247	10
auto[0]	values[6]	values[7]	227	1			T48	19		T154	20		T165	20
auto[0]	values[7]	values[0]	552	1			T77	19		T171	41		T179	71
auto[0]	values[7]	values[1]	459	1			T28	31		T40	18		T42	89
auto[0]	values[7]	values[2]	466	1			T208	4		T18	18		T42	112
auto[0]	values[7]	values[3]	128	1			T41	20		T154	38		T213	26
auto[0]	values[7]	values[4]	304	1			T184	16		T53	20		T191	20
auto[0]	values[7]	values[5]	427	1			T20	24		T191	53		T77	19
auto[0]	values[7]	values[6]	352	1			T53	32		T48	26		T77	20
auto[0]	values[7]	values[7]	585	1			T28	25		T48	21		T178	10
auto[1]	values[0]	values[0]	15	1			T27	1		T20	3		T165	1
auto[1]	values[0]	values[1]	12	1			T41	1		T18	1		T177	1
auto[1]	values[0]	values[2]	16	1			T194	2		T146	2		T122	1
auto[1]	values[0]	values[3]	4	1			T40	2		T248	1		T249	1
auto[1]	values[0]	values[4]	10	1			T42	2		T172	1		T174	1
auto[1]	values[0]	values[5]	14	1			T191	3		T250	2		T168	4
auto[1]	values[0]	values[6]	9	1			T27	1		T153	3		T165	1
auto[1]	values[0]	values[7]	6	1			T170	1		T165	1		T174	3
auto[1]	values[1]	values[0]	4	1			T233	1		T251	1		T252	2
auto[1]	values[1]	values[1]	12	1			T169	4		T240	2		T122	2
auto[1]	values[1]	values[2]	12	1			T42	3		T177	2		T174	1
auto[1]	values[1]	values[3]	14	1			T77	2		T172	1		T175	1
auto[1]	values[1]	values[4]	20	1			T169	2		T144	1		T185	3
auto[1]	values[1]	values[5]	11	1			T240	3		T123	3		T192	4
auto[1]	values[1]	values[6]	10	1			T28	2		T18	1		T146	2
auto[1]	values[1]	values[7]	14	1			T165	3		T203	1		T172	1
auto[1]	values[2]	values[0]	5	1			T253	1		T254	1		T255	1
auto[1]	values[2]	values[1]	19	1			T179	4		T174	1		T186	1
auto[1]	values[2]	values[2]	23	1			T174	4		T256	4		T146	1
auto[1]	values[2]	values[3]	2	1			T187	2		-	-		-	-
auto[1]	values[2]	values[4]	12	1			T40	2		T153	2		T171	1
auto[1]	values[2]	values[5]	1	1			T252	1		-	-		-	-
auto[1]	values[2]	values[6]	14	1			T179	1		T185	2		T199	1
auto[1]	values[2]	values[7]	8	1			T41	1		T203	3		T257	2
auto[1]	values[3]	values[0]	15	1			T179	1		T142	3		T242	2
auto[1]	values[3]	values[1]	16	1			T17	2		T41	2		T172	1
auto[1]	values[3]	values[2]	15	1			T18	3		T19	2		T203	3
auto[1]	values[3]	values[3]	13	1			T27	2		T18	1		T19	1
auto[1]	values[3]	values[4]	12	1			T37	4		T172	1		T187	2
auto[1]	values[3]	values[5]	5	1			T153	2		T230	3		-	-
auto[1]	values[3]	values[6]	11	1			T153	1		T77	1		T186	4
auto[1]	values[3]	values[7]	13	1			T186	2		T258	2		T259	1
auto[1]	values[4]	values[0]	9	1			T48	1		T153	3		T249	3
auto[1]	values[4]	values[1]	18	1			T39	4		T41	2		T170	3
auto[1]	values[4]	values[2]	29	1			T153	1		T171	2		T165	1
auto[1]	values[4]	values[3]	9	1			T27	1		T172	3		T185	3
auto[1]	values[4]	values[4]	19	1			T179	2		T121	2		T240	1
auto[1]	values[4]	values[5]	20	1			T40	3		T230	1		T260	3
auto[1]	values[4]	values[6]	16	1			T42	2		T171	1		T144	1
auto[1]	values[4]	values[7]	17	1			T77	1		T239	1		T172	3
auto[1]	values[5]	values[0]	6	1			T1	2		T233	1		T192	2
auto[1]	values[5]	values[1]	9	1			T27	1		T20	1		T170	1
auto[1]	values[5]	values[2]	11	1			T169	1		T197	1		T146	1
auto[1]	values[5]	values[3]	20	1			T261	2		T262	1		T250	1
auto[1]	values[5]	values[4]	4	1			T171	2		T232	2		-	-
auto[1]	values[5]	values[5]	9	1			T154	1		T263	2		T264	1
auto[1]	values[5]	values[6]	15	1			T19	2		T169	2		T170	2
auto[1]	values[5]	values[7]	15	1			T48	4		T77	1		T170	2
auto[1]	values[6]	values[0]	13	1			T203	2		T144	3		T260	1
auto[1]	values[6]	values[1]	10	1			T165	2		T259	7		T265	1
auto[1]	values[6]	values[2]	11	1			T266	2		T249	1		T267	2
auto[1]	values[6]	values[3]	13	1			T28	2		T142	1		T268	6
auto[1]	values[6]	values[4]	1	1			T269	1		-	-		-	-
auto[1]	values[6]	values[5]	27	1			T153	2		T177	4		T210	2
auto[1]	values[6]	values[6]	12	1			T193	1		T145	1		T270	2
auto[1]	values[6]	values[7]	2	1			T48	1		T232	1		-	-
auto[1]	values[7]	values[0]	13	1			T77	1		T171	3		T179	5
auto[1]	values[7]	values[1]	7	1			T28	1		T40	2		T174	2
auto[1]	values[7]	values[2]	13	1			T18	2		T20	1		T53	3
auto[1]	values[7]	values[3]	2	1			T154	2		-	-		-	-
auto[1]	values[7]	values[4]	6	1			T193	1		T186	2		T229	2
auto[1]	values[7]	values[5]	14	1			T20	5		T191	3		T77	1
auto[1]	values[7]	values[6]	12	1			T53	4		T48	2		T185	1
auto[1]	values[7]	values[7]	13	1			T28	2		T230	4		T192	3