Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4056	1			T3	6		T10	55		T14	28
values[1]	4309	1			T11	103		T18	51		T218	14
values[2]	3407	1			T6	16		T11	41		T18	40
values[3]	3690	1			T18	20		T37	62		T221	4
values[4]	4857	1			T10	57		T18	20		T109	12
values[5]	3867	1			T10	166		T17	16		T37	39
values[6]	3888	1			T11	29		T38	79		T36	82
values[7]	4260	1			T18	34		T37	25		T38	120

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4436	1			T37	39		T235	12		T36	70
values[1]	5034	1			T10	57		T11	29		T14	28
values[2]	3852	1			T10	109		T11	31		T17	16
values[3]	3715	1			T11	44		T18	20		T38	22
values[4]	3773	1			T18	71		T223	10		T38	56
values[5]	3488	1			T3	6		T6	16		T221	4
values[6]	4009	1			T10	55		T11	48		T18	20
values[7]	4027	1			T10	57		T11	21		T18	20

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

31491

1

T3

6

T6

16

T10

274

auto[1]

843

1

T10

4

T11

4

T14

4

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	621	1			T39	21		T40	76		T22	30
auto[0]	values[0]	values[1]	467	1			T14	24		T39	23		T29	20
auto[0]	values[0]	values[2]	509	1			T36	20		T20	109		T193	58
auto[0]	values[0]	values[3]	251	1			T40	22		T22	20		T210	56
auto[0]	values[0]	values[4]	386	1			T212	20		T244	20		T150	20
auto[0]	values[0]	values[5]	616	1			T3	6		T239	6		T160	4
auto[0]	values[0]	values[6]	445	1			T10	55		T22	19		T210	19
auto[0]	values[0]	values[7]	650	1			T36	20		T40	17		T178	20
auto[0]	values[1]	values[0]	569	1			T22	36		T72	93		T247	27
auto[0]	values[1]	values[1]	593	1			T210	20		T248	4		T193	20
auto[0]	values[1]	values[2]	509	1			T11	31		T20	90		T39	19
auto[0]	values[1]	values[3]	675	1			T11	24		T22	20		T193	19
auto[0]	values[1]	values[4]	550	1			T18	28		T40	21		T213	12
auto[0]	values[1]	values[5]	375	1			T218	14		T23	19		T229	2
auto[0]	values[1]	values[6]	624	1			T11	46		T18	20		T22	61
auto[0]	values[1]	values[7]	303	1			T39	19		T40	20		T193	41
auto[0]	values[2]	values[0]	401	1			T22	20		T23	20		T78	66
auto[0]	values[2]	values[1]	295	1			T152	16		T208	20		T249	55
auto[0]	values[2]	values[2]	412	1			T37	28		T20	20		T250	14
auto[0]	values[2]	values[3]	488	1			T11	18		T38	18		T36	20
auto[0]	values[2]	values[4]	455	1			T18	20		T215	4		T20	20
auto[0]	values[2]	values[5]	385	1			T6	16		T36	127		T20	20
auto[0]	values[2]	values[6]	354	1			T38	20		T20	19		T178	20
auto[0]	values[2]	values[7]	514	1			T11	21		T18	20		T40	21
auto[0]	values[3]	values[0]	405	1			T78	96		T69	29		T151	40
auto[0]	values[3]	values[1]	724	1			T22	47		T210	80		T196	20
auto[0]	values[3]	values[2]	586	1			T37	60		T251	20		T69	20
auto[0]	values[3]	values[3]	368	1			T18	20		T23	57		T68	14
auto[0]	values[3]	values[4]	303	1			T223	10		T38	20		T36	45
auto[0]	values[3]	values[5]	259	1			T221	4		T38	20		T23	20
auto[0]	values[3]	values[6]	564	1			T36	53		T22	31		T89	18
auto[0]	values[3]	values[7]	390	1			T20	20		T40	20		T22	20
auto[0]	values[4]	values[0]	797	1			T235	12		T36	69		T245	4
auto[0]	values[4]	values[1]	1040	1			T20	20		T39	41		T22	29
auto[0]	values[4]	values[2]	349	1			T109	12		T94	6		T22	35
auto[0]	values[4]	values[3]	683	1			T39	22		T22	24		T197	33
auto[0]	values[4]	values[4]	375	1			T18	19		T38	35		T22	20
auto[0]	values[4]	values[5]	591	1			T20	19		T178	20		T252	18
auto[0]	values[4]	values[6]	394	1			T190	10		T128	16		T192	26
auto[0]	values[4]	values[7]	489	1			T10	56		T129	12		T228	8
auto[0]	values[5]	values[0]	634	1			T37	38		T54	6		T230	20
auto[0]	values[5]	values[1]	514	1			T10	56		T93	2		T191	16
auto[0]	values[5]	values[2]	469	1			T10	107		T17	16		T197	20
auto[0]	values[5]	values[3]	317	1			T193	20		T197	20		T253	20
auto[0]	values[5]	values[4]	462	1			T36	20		T254	21		T187	41
auto[0]	values[5]	values[5]	544	1			T39	20		T23	22		T72	55
auto[0]	values[5]	values[6]	469	1			T242	22		T158	6		T196	20
auto[0]	values[5]	values[7]	366	1			T192	20		T196	19		T230	40
auto[0]	values[6]	values[0]	401	1			T22	30		T78	35		T253	20
auto[0]	values[6]	values[1]	692	1			T11	29		T40	45		T237	10
auto[0]	values[6]	values[2]	372	1			T38	79		T36	19		T227	4
auto[0]	values[6]	values[3]	420	1			T234	50		T210	20		T180	19
auto[0]	values[6]	values[4]	663	1			T36	61		T20	52		T219	2
auto[0]	values[6]	values[5]	207	1			T224	8		T196	19		T244	45
auto[0]	values[6]	values[6]	518	1			T22	80		T196	20		T74	63
auto[0]	values[6]	values[7]	512	1			T43	23		T255	94		T256	2
auto[0]	values[7]	values[0]	499	1			T22	21		T78	20		T179	20
auto[0]	values[7]	values[1]	565	1			T178	20		T23	18		T183	19
auto[0]	values[7]	values[2]	552	1			T18	32		T36	21		T20	20
auto[0]	values[7]	values[3]	409	1			T194	2		T71	26		T152	18
auto[0]	values[7]	values[4]	476	1			T39	20		T187	20		T150	26
auto[0]	values[7]	values[5]	428	1			T36	18		T20	20		T39	20
auto[0]	values[7]	values[6]	537	1			T38	64		T36	74		T23	22
auto[0]	values[7]	values[7]	701	1			T37	24		T38	51		T20	44
auto[1]	values[0]	values[0]	29	1			T39	3		T40	1		T22	1
auto[1]	values[0]	values[1]	12	1			T14	4		T192	4		T257	1
auto[1]	values[0]	values[2]	12	1			T20	2		T150	1		T230	4
auto[1]	values[0]	values[3]	6	1			T22	1		T258	4		T186	1
auto[1]	values[0]	values[4]	8	1			T259	4		T260	1		T261	2
auto[1]	values[0]	values[5]	20	1			T72	1		T254	1		T186	1
auto[1]	values[0]	values[6]	6	1			T22	1		T210	1		T192	1
auto[1]	values[0]	values[7]	18	1			T40	3		T29	1		T69	5
auto[1]	values[1]	values[0]	24	1			T22	5		T72	2		T247	2
auto[1]	values[1]	values[1]	23	1			T195	3		T262	2		T263	3
auto[1]	values[1]	values[2]	12	1			T39	1		T40	3		T22	1
auto[1]	values[1]	values[3]	16	1			T22	2		T193	1		T72	3
auto[1]	values[1]	values[4]	13	1			T18	3		T78	2		T72	2
auto[1]	values[1]	values[5]	5	1			T23	1		T254	3		T264	1
auto[1]	values[1]	values[6]	16	1			T11	2		T78	1		T192	3
auto[1]	values[1]	values[7]	2	1			T39	1		T193	1		-	-
auto[1]	values[2]	values[0]	4	1			T78	1		T153	2		T265	1
auto[1]	values[2]	values[1]	20	1			T152	5		T249	1		T91	2
auto[1]	values[2]	values[2]	16	1			T37	3		T265	2		T266	1
auto[1]	values[2]	values[3]	21	1			T11	2		T38	4		T39	2
auto[1]	values[2]	values[4]	10	1			T29	2		T69	1		T186	1
auto[1]	values[2]	values[5]	3	1			T36	2		T267	1		-	-
auto[1]	values[2]	values[6]	11	1			T20	1		T69	3		T254	3
auto[1]	values[2]	values[7]	18	1			T179	4		T72	1		T249	1
auto[1]	values[3]	values[0]	1	1			T268	1		-	-		-	-
auto[1]	values[3]	values[1]	18	1			T22	3		T210	2		T197	1
auto[1]	values[3]	values[2]	12	1			T37	2		T203	2		T200	1
auto[1]	values[3]	values[3]	16	1			T187	1		T244	4		T264	1
auto[1]	values[3]	values[4]	10	1			T36	1		T78	2		T200	2
auto[1]	values[3]	values[5]	9	1			T269	6		T268	1		T267	1
auto[1]	values[3]	values[6]	11	1			T196	3		T150	1		T152	4
auto[1]	values[3]	values[7]	14	1			T197	2		T180	4		T270	3
auto[1]	values[4]	values[0]	10	1			T36	1		T179	2		T247	2
auto[1]	values[4]	values[1]	34	1			T72	1		T203	1		T149	1
auto[1]	values[4]	values[2]	11	1			T178	2		T271	6		T272	2
auto[1]	values[4]	values[3]	16	1			T39	1		T149	2		T273	3
auto[1]	values[4]	values[4]	14	1			T18	1		T38	1		T23	3
auto[1]	values[4]	values[5]	17	1			T20	1		T212	5		T254	2
auto[1]	values[4]	values[6]	17	1			T128	4		T186	3		T44	2
auto[1]	values[4]	values[7]	20	1			T10	1		T78	4		T193	2
auto[1]	values[5]	values[0]	16	1			T37	1		T151	2		T200	2
auto[1]	values[5]	values[1]	10	1			T10	1		T69	2		T52	1
auto[1]	values[5]	values[2]	14	1			T10	2		T274	6		T275	1
auto[1]	values[5]	values[3]	4	1			T276	2		T202	2		-	-
auto[1]	values[5]	values[4]	17	1			T254	1		T249	3		T277	3
auto[1]	values[5]	values[5]	16	1			T72	1		T151	1		T270	2
auto[1]	values[5]	values[6]	13	1			T72	2		T203	1		T180	4
auto[1]	values[5]	values[7]	2	1			T196	1		T278	1		-	-
auto[1]	values[6]	values[0]	15	1			T22	6		T78	1		T149	1
auto[1]	values[6]	values[1]	10	1			T231	1		T216	1		T241	4
auto[1]	values[6]	values[2]	5	1			T36	1		T279	1		T280	3
auto[1]	values[6]	values[3]	19	1			T180	1		T281	1		T44	3
auto[1]	values[6]	values[4]	23	1			T36	1		T192	5		T244	1
auto[1]	values[6]	values[5]	4	1			T196	1		T200	1		T282	1
auto[1]	values[6]	values[6]	17	1			T22	7		T152	2		T273	2
auto[1]	values[6]	values[7]	10	1			T262	1		T283	2		T281	2
auto[1]	values[7]	values[0]	10	1			T22	1		T180	2		T273	1
auto[1]	values[7]	values[1]	17	1			T23	2		T183	1		T284	1
auto[1]	values[7]	values[2]	12	1			T18	2		T197	1		T254	3
auto[1]	values[7]	values[3]	6	1			T152	2		T268	1		T202	1
auto[1]	values[7]	values[4]	8	1			T150	2		T200	3		T260	1
auto[1]	values[7]	values[5]	9	1			T36	2		T285	1		T270	3
auto[1]	values[7]	values[6]	13	1			T38	5		T23	1		T78	1
auto[1]	values[7]	values[7]	18	1			T37	1		T20	1		T151	1