| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 8 | 0 | 8 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| cp_flip_position | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
| cp_opcode | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 128 | 1 | T5 | 14 | T138 | 6 | T125 | 2 | ||||
| auto[1] | 43 | 1 | T5 | 4 | T138 | 2 | T142 | 1 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 6 | 0 | 6 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| read_ops[0x03] | 7 | 1 | T286 | 1 | T287 | 2 | T288 | 4 | ||||
| read_ops[0x0b] | 39 | 1 | T289 | 8 | T290 | 8 | T291 | 1 | ||||
| read_ops[0x3b] | 13 | 1 | T5 | 2 | T90 | 2 | T292 | 2 | ||||
| read_ops[0x6b] | 36 | 1 | T5 | 14 | T156 | 2 | T289 | 6 | ||||
| read_ops[0xbb] | 32 | 1 | T125 | 2 | T293 | 2 | T48 | 6 | ||||
| read_ops[0xeb] | 44 | 1 | T5 | 2 | T138 | 8 | T142 | 2 | 
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |