Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

Group : spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	20	0	20	100.00
Crosses	154	0	154	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	11	0	11	100.00	100	1	1	0
cp_payload_size	7	0	7	100.00	100	1	1	0

Crosses for Group spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	154	0	154	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14771

1

T3

4

T9

39

T10

5

auto[1]

44789

1

T2

2

T3

4

T5

952

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
internal_process_ops[0x9f]	1673	1			T3	6		T5	12		T6	4
internal_process_ops[0x5a]	1597	1			T3	2		T5	11		T6	2
internal_process_ops[0x05]	20880	1			T5	685		T6	22		T8	3
internal_process_ops[0x35]	1598	1			T5	13		T6	5		T9	2
internal_process_ops[0x15]	1635	1			T5	9		T6	5		T8	2
internal_process_ops[0x03]	1045	1			T2	1		T5	4		T6	1
internal_process_ops[0x0b]	980	1			T5	2		T6	1		T9	2
internal_process_ops[0x3b]	961	1			T8	1		T9	4		T11	3
internal_process_ops[0x6b]	1061	1			T5	6		T6	1		T9	2
internal_process_ops[0xbb]	1047	1			T5	2		T6	1		T9	2
internal_process_ops[0xeb]	1033	1			T2	1		T5	1		T6	1

---

Summary for Variable cp_payload_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_payload_size

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
excess_fifo	11330	1			T3	6		T5	65		T6	26
frequent_use_values[0]	9023	1			T2	1		T5	68		T6	29
frequent_use_values[1]	20275	1			T5	681		T6	19		T8	3
frequent_use_values[2]	1153	1			T5	9		T6	6		T9	2
frequent_use_values[3]	1309	1			T5	15		T6	3		T8	1
frequent_use_values[4]	1539	1			T5	6		T6	3		T8	1
frequent_use_values[256]	6692	1			T5	55		T6	17		T8	4

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered cp_payload_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	154	0	154	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	cp_payload_size	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
internal_process_ops[0x9f]	auto[0]	excess_fifo	182	1			T3	2		T9	1		T12	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[0]	5	1			T90	1		T193	1		T194	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[1]	7	1			T166	1		T195	1		T192	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[2]	21	1			T40	2		T196	1		T197	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[3]	20	1			T95	1		T198	1		T199	3
internal_process_ops[0x9f]	auto[0]	frequent_use_values[4]	22	1			T40	1		T83	1		T196	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[256]	87	1			T12	2		T14	1		T123	1
internal_process_ops[0x9f]	auto[1]	excess_fifo	396	1			T3	2		T5	4		T6	3
internal_process_ops[0x9f]	auto[1]	frequent_use_values[0]	38	1			T82	1		T90	1		T83	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[1]	62	1			T5	1		T9	1		T14	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[2]	35	1			T6	1		T11	1		T28	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[3]	49	1			T11	1		T171	1		T183	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[4]	49	1			T5	1		T9	1		T78	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[256]	309	1			T5	3		T11	3		T28	2
internal_process_ops[0x5a]	auto[0]	excess_fifo	145	1			T3	1		T10	1		T40	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[0]	2	1			T92	1		T200	1		-	-
internal_process_ops[0x5a]	auto[0]	frequent_use_values[1]	10	1			T43	1		T197	1		T192	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[2]	9	1			T201	1		T49	1		T202	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[3]	15	1			T14	1		T43	1		T80	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[4]	16	1			T42	1		T196	1		T203	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[256]	100	1			T10	2		T14	1		T44	1
internal_process_ops[0x5a]	auto[1]	excess_fifo	403	1			T3	1		T5	5		T6	2
internal_process_ops[0x5a]	auto[1]	frequent_use_values[0]	32	1			T14	1		T41	1		T83	1
internal_process_ops[0x5a]	auto[1]	frequent_use_values[1]	44	1			T5	1		T14	1		T169	2
internal_process_ops[0x5a]	auto[1]	frequent_use_values[2]	42	1			T11	1		T28	1		T204	1
internal_process_ops[0x5a]	auto[1]	frequent_use_values[3]	51	1			T5	1		T8	1		T28	1
internal_process_ops[0x5a]	auto[1]	frequent_use_values[4]	64	1			T5	1		T95	1		T172	1
internal_process_ops[0x5a]	auto[1]	frequent_use_values[256]	319	1			T5	2		T10	2		T11	1
internal_process_ops[0x05]	auto[0]	excess_fifo	174	1			T12	3		T105	1		T40	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[0]	7	1			T14	1		T41	2		T188	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[1]	4228	1			T12	24		T40	13		T14	2
internal_process_ops[0x05]	auto[0]	frequent_use_values[2]	7	1			T205	1		T198	1		T206	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[3]	17	1			T9	1		T12	1		T207	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[4]	18	1			T12	1		T41	1		T188	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[256]	99	1			T167	1		T96	1		T198	2
internal_process_ops[0x05]	auto[1]	excess_fifo	405	1			T5	3		T6	5		T11	4
internal_process_ops[0x05]	auto[1]	frequent_use_values[0]	43	1			T28	1		T169	1		T183	1
internal_process_ops[0x05]	auto[1]	frequent_use_values[1]	15066	1			T5	673		T6	16		T8	3
internal_process_ops[0x05]	auto[1]	frequent_use_values[2]	52	1			T5	2		T122	1		T205	1
internal_process_ops[0x05]	auto[1]	frequent_use_values[3]	54	1			T11	1		T12	1		T23	1
internal_process_ops[0x05]	auto[1]	frequent_use_values[4]	51	1			T9	1		T28	1		T14	1
internal_process_ops[0x05]	auto[1]	frequent_use_values[256]	267	1			T5	3		T11	3		T12	1
internal_process_ops[0x35]	auto[0]	excess_fifo	169	1			T10	1		T40	1		T41	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[0]	10	1			T20	1		T208	1		T203	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[1]	5	1			T209	1		T35	1		T210	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[2]	9	1			T89	1		T202	1		T211	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[3]	13	1			T212	1		T203	1		T213	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[4]	22	1			T40	1		T43	1		T16	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[256]	99	1			T40	1		T16	1		T90	1
internal_process_ops[0x35]	auto[1]	excess_fifo	405	1			T5	5		T6	1		T9	2
internal_process_ops[0x35]	auto[1]	frequent_use_values[0]	45	1			T5	1		T28	1		T183	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[1]	38	1			T28	2		T41	1		T82	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[2]	45	1			T5	1		T89	1		T170	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[3]	47	1			T12	1		T82	2		T122	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[4]	43	1			T6	1		T12	1		T122	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[256]	276	1			T5	3		T6	1		T11	2
internal_process_ops[0x15]	auto[0]	excess_fifo	158	1			T9	2		T12	1		T40	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[0]	8	1			T41	1		T46	1		T208	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[1]	9	1			T40	1		T214	1		T215	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[2]	10	1			T41	1		T43	1		T96	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[3]	17	1			T40	1		T216	1		T217	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[4]	16	1			T44	1		T83	1		T95	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[256]	89	1			T9	2		T12	1		T14	1
internal_process_ops[0x15]	auto[1]	excess_fifo	410	1			T5	2		T6	1		T8	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[0]	34	1			T41	1		T173	1		T170	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[1]	44	1			T5	1		T28	1		T122	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[2]	37	1			T6	1		T40	1		T96	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[3]	53	1			T6	1		T122	1		T183	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[4]	54	1			T5	1		T6	1		T9	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[256]	315	1			T5	3		T6	1		T8	1
internal_process_ops[0x03]	auto[0]	excess_fifo	159	1			T12	1		T40	3		T14	3
internal_process_ops[0x03]	auto[0]	frequent_use_values[0]	10	1			T14	1		T41	1		T218	2
internal_process_ops[0x03]	auto[0]	frequent_use_values[1]	13	1			T14	1		T83	1		T219	1
internal_process_ops[0x03]	auto[0]	frequent_use_values[2]	14	1			T12	1		T14	1		T42	1
internal_process_ops[0x03]	auto[0]	frequent_use_values[3]	16	1			T9	1		T46	1		T216	1
internal_process_ops[0x03]	auto[0]	frequent_use_values[4]	31	1			T41	1		T16	1		T95	1
internal_process_ops[0x03]	auto[0]	frequent_use_values[256]	31	1			T41	1		T90	1		T46	1
internal_process_ops[0x03]	auto[1]	excess_fifo	215	1			T6	1		T9	1		T11	1
internal_process_ops[0x03]	auto[1]	frequent_use_values[0]	32	1			T2	1		T28	1		T95	2
internal_process_ops[0x03]	auto[1]	frequent_use_values[1]	23	1			T11	1		T12	1		T42	2
internal_process_ops[0x03]	auto[1]	frequent_use_values[2]	30	1			T12	1		T95	1		T196	1
internal_process_ops[0x03]	auto[1]	frequent_use_values[3]	21	1			T5	1		T14	1		T42	1
internal_process_ops[0x03]	auto[1]	frequent_use_values[4]	48	1			T8	1		T9	1		T12	3
internal_process_ops[0x03]	auto[1]	frequent_use_values[256]	47	1			T11	2		T122	2		T43	2
internal_process_ops[0x0b]	auto[0]	excess_fifo	167	1			T9	1		T12	1		T14	4
internal_process_ops[0x0b]	auto[0]	frequent_use_values[0]	16	1			T43	1		T95	1		T79	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[1]	9	1			T12	1		T79	1		T220	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[2]	15	1			T98	1		T95	1		T212	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[3]	22	1			T212	1		T208	1		T221	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[4]	28	1			T99	1		T203	1		T222	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[256]	34	1			T12	1		T42	1		T223	1
internal_process_ops[0x0b]	auto[1]	excess_fifo	220	1			T5	1		T12	1		T28	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[0]	30	1			T95	1		T172	2		T198	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[1]	17	1			T12	1		T122	1		T169	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[2]	18	1			T12	1		T98	1		T212	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[3]	20	1			T82	1		T212	1		T224	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[4]	26	1			T12	2		T99	1		T208	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[256]	49	1			T5	1		T6	1		T40	1
internal_process_ops[0x3b]	auto[0]	excess_fifo	149	1			T12	4		T40	1		T99	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[0]	15	1			T42	1		T212	1		T20	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[1]	9	1			T199	1		T201	1		T159	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[2]	14	1			T12	1		T205	1		T192	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[3]	10	1			T90	1		T83	1		T206	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[4]	23	1			T20	1		T79	1		T192	3
internal_process_ops[0x3b]	auto[0]	frequent_use_values[256]	30	1			T9	1		T41	3		T16	1
internal_process_ops[0x3b]	auto[1]	excess_fifo	183	1			T11	1		T38	1		T99	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[0]	28	1			T46	1		T95	1		T173	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[1]	24	1			T42	1		T196	1		T79	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[2]	24	1			T14	1		T205	1		T42	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[3]	23	1			T43	1		T90	1		T208	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[4]	52	1			T9	1		T42	1		T196	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[256]	55	1			T11	1		T26	1		T46	2
internal_process_ops[0x6b]	auto[0]	excess_fifo	176	1			T9	2		T40	1		T14	2
internal_process_ops[0x6b]	auto[0]	frequent_use_values[0]	16	1			T95	1		T20	1		T80	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[1]	10	1			T42	1		T199	1		T219	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[2]	14	1			T43	1		T42	1		T197	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[3]	14	1			T83	1		T203	1		T225	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[4]	17	1			T97	1		T46	1		T199	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[256]	37	1			T40	1		T46	1		T226	1
internal_process_ops[0x6b]	auto[1]	excess_fifo	220	1			T5	1		T6	1		T12	3
internal_process_ops[0x6b]	auto[1]	frequent_use_values[0]	33	1			T82	1		T196	1		T80	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[1]	21	1			T5	1		T82	1		T152	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[2]	29	1			T12	1		T204	1		T217	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[3]	29	1			T40	1		T43	1		T153	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[4]	27	1			T97	1		T199	2		T217	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[256]	51	1			T5	2		T82	1		T226	1
internal_process_ops[0xbb]	auto[0]	excess_fifo	143	1			T12	3		T40	1		T16	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[0]	23	1			T14	1		T227	1		T186	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[1]	7	1			T20	1		T228	1		T229	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[2]	13	1			T12	1		T14	1		T42	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[3]	14	1			T192	1		T220	1		T230	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[4]	24	1			T203	1		T199	1		T217	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[256]	34	1			T12	1		T40	1		T20	1
internal_process_ops[0xbb]	auto[1]	excess_fifo	211	1			T9	1		T12	2		T38	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[0]	32	1			T11	2		T122	1		T20	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[1]	15	1			T198	1		T204	1		T220	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[2]	26	1			T46	1		T83	1		T95	2
internal_process_ops[0xbb]	auto[1]	frequent_use_values[3]	36	1			T82	1		T153	1		T183	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[4]	30	1			T153	1		T83	1		T192	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[256]	49	1			T5	1		T11	1		T12	1
internal_process_ops[0xeb]	auto[0]	excess_fifo	152	1			T12	1		T14	2		T41	3
internal_process_ops[0xeb]	auto[0]	frequent_use_values[0]	18	1			T80	1		T203	2		T222	2
internal_process_ops[0xeb]	auto[0]	frequent_use_values[1]	9	1			T217	1		T231	1		T202	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[2]	19	1			T9	1		T46	1		T196	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[3]	21	1			T99	1		T90	1		T192	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[4]	24	1			T14	1		T191	1		T79	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[256]	23	1			T9	1		T12	1		T14	1
internal_process_ops[0xeb]	auto[1]	excess_fifo	219	1			T5	1		T6	1		T12	2
internal_process_ops[0xeb]	auto[1]	frequent_use_values[0]	28	1			T43	1		T173	1		T80	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[1]	27	1			T43	1		T172	1		T79	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[2]	18	1			T12	1		T83	2		T78	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[3]	26	1			T40	1		T99	1		T122	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[4]	33	1			T12	1		T191	1		T208	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[256]	35	1			T196	1		T20	1		T188	1