Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

15632

1

T2

47

T3

4

T10

2

auto[1]

42280

1

T1

60

T2

33

T3

4

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1292	1			T1	1		T2	4		T7	1
auto[4:7]	22350	1			T1	6		T2	7		T3	4
auto[8:11]	1382	1			T1	1		T2	1		T7	1
auto[12:15]	330	1			T2	4		T7	1		T34	1
auto[16:19]	327	1			T1	1		T7	2		T8	2
auto[20:23]	1879	1			T1	5		T2	3		T7	5
auto[24:27]	318	1			T14	2		T34	4		T39	3
auto[28:31]	319	1			T1	2		T8	5		T34	2
auto[32:35]	315	1			T1	2		T8	3		T34	6
auto[36:39]	283	1			T8	2		T38	3		T39	2
auto[40:43]	349	1			T2	2		T8	2		T38	2
auto[44:47]	326	1			T1	3		T34	8		T39	3
auto[48:51]	324	1			T2	1		T7	1		T8	3
auto[52:55]	1745	1			T1	2		T2	6		T7	3
auto[56:59]	1387	1			T1	1		T2	4		T7	5
auto[60:63]	335	1			T2	2		T7	3		T8	2
auto[64:67]	319	1			T2	1		T7	1		T8	1
auto[68:71]	356	1			T7	3		T38	1		T34	4
auto[72:75]	351	1			T7	1		T39	2		T30	3
auto[76:79]	328	1			T7	1		T8	2		T34	3
auto[80:83]	298	1			T1	1		T7	2		T8	3
auto[84:87]	300	1			T1	2		T8	1		T34	2
auto[88:91]	1889	1			T1	4		T2	3		T7	1
auto[92:95]	321	1			T1	2		T8	1		T38	2
auto[96:99]	335	1			T8	4		T14	4		T34	1
auto[100:103]	368	1			T2	2		T7	1		T34	2
auto[104:107]	1273	1			T2	6		T4	2		T7	2
auto[108:111]	403	1			T1	3		T7	1		T8	2
auto[112:115]	305	1			T8	3		T23	4		T34	3
auto[116:119]	314	1			T7	2		T8	1		T24	2
auto[120:123]	421	1			T2	2		T7	2		T8	1
auto[124:127]	329	1			T7	2		T34	3		T30	2
auto[128:131]	334	1			T7	1		T8	4		T38	2
auto[132:135]	295	1			T7	1		T39	2		T30	1
auto[136:139]	324	1			T1	1		T2	2		T8	3
auto[140:143]	301	1			T8	2		T38	3		T34	2
auto[144:147]	295	1			T2	2		T7	1		T38	2
auto[148:151]	347	1			T7	1		T8	3		T38	2
auto[152:155]	320	1			T7	1		T8	6		T38	3
auto[156:159]	1859	1			T1	2		T2	4		T7	4
auto[160:163]	304	1			T2	1		T7	1		T8	2
auto[164:167]	308	1			T7	1		T34	3		T39	3
auto[168:171]	285	1			T1	2		T7	2		T8	4
auto[172:175]	299	1			T8	4		T38	1		T39	1
auto[176:179]	317	1			T38	1		T34	3		T39	1
auto[180:183]	1773	1			T1	2		T2	2		T3	4
auto[184:187]	1324	1			T2	4		T5	1		T7	3
auto[188:191]	321	1			T2	1		T8	2		T34	4
auto[192:195]	368	1			T7	4		T8	5		T34	3
auto[196:199]	347	1			T1	1		T24	2		T38	1
auto[200:203]	348	1			T1	1		T2	1		T7	1
auto[204:207]	328	1			T1	3		T2	2		T7	1
auto[208:211]	305	1			T2	1		T7	5		T8	1
auto[212:215]	306	1			T2	2		T38	1		T34	5
auto[216:219]	324	1			T39	4		T40	2		T30	6
auto[220:223]	339	1			T2	2		T7	2		T38	1
auto[224:227]	300	1			T38	1		T40	4		T30	1
auto[228:231]	377	1			T1	3		T7	1		T8	1
auto[232:235]	2755	1			T1	4		T2	7		T7	5
auto[236:239]	337	1			T8	2		T40	3		T32	2
auto[240:243]	339	1			T1	2		T7	1		T8	4
auto[244:247]	312	1			T1	2		T7	2		T38	3
auto[248:251]	337	1			T1	1		T8	6		T24	2
auto[252:255]	313	1			T2	1		T8	1		T38	3

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	511	1			T10	1		T13	4		T24	1
auto[0:3]	auto[1]	781	1			T1	1		T2	4		T7	1
auto[4:7]	auto[0]	5892	1			T2	5		T3	2		T14	1
auto[4:7]	auto[1]	16458	1			T1	6		T2	2		T3	2
auto[8:11]	auto[0]	494	1			T14	2		T24	1		T96	1
auto[8:11]	auto[1]	888	1			T1	1		T2	1		T7	1
auto[12:15]	auto[0]	74	1			T2	2		T44	1		T55	1
auto[12:15]	auto[1]	256	1			T2	2		T7	1		T34	1
auto[16:19]	auto[0]	82	1			T38	1		T39	2		T16	1
auto[16:19]	auto[1]	245	1			T1	1		T7	2		T8	2
auto[20:23]	auto[0]	474	1			T2	2		T14	1		T38	1
auto[20:23]	auto[1]	1405	1			T1	5		T2	1		T7	5
auto[24:27]	auto[0]	82	1			T14	1		T39	1		T46	1
auto[24:27]	auto[1]	236	1			T14	1		T34	4		T39	2
auto[28:31]	auto[0]	75	1			T46	1		T47	1		T55	3
auto[28:31]	auto[1]	244	1			T1	2		T8	5		T34	2
auto[32:35]	auto[0]	72	1			T47	1		T49	1		T202	1
auto[32:35]	auto[1]	243	1			T1	2		T8	3		T34	6
auto[36:39]	auto[0]	73	1			T38	3		T39	1		T32	2
auto[36:39]	auto[1]	210	1			T8	2		T39	1		T40	3
auto[40:43]	auto[0]	89	1			T2	2		T46	1		T206	1
auto[40:43]	auto[1]	260	1			T8	2		T38	2		T34	1
auto[44:47]	auto[0]	72	1			T46	1		T48	1		T49	1
auto[44:47]	auto[1]	254	1			T1	3		T34	8		T39	3
auto[48:51]	auto[0]	74	1			T2	1		T39	1		T46	1
auto[48:51]	auto[1]	250	1			T7	1		T8	3		T38	2
auto[52:55]	auto[0]	438	1			T2	5		T14	3		T24	2
auto[52:55]	auto[1]	1307	1			T1	2		T2	1		T7	3
auto[56:59]	auto[0]	483	1			T24	1		T38	2		T96	1
auto[56:59]	auto[1]	904	1			T1	1		T2	4		T7	5
auto[60:63]	auto[0]	80	1			T2	2		T38	1		T39	1
auto[60:63]	auto[1]	255	1			T7	3		T8	2		T34	6
auto[64:67]	auto[0]	81	1			T44	1		T46	4		T47	1
auto[64:67]	auto[1]	238	1			T2	1		T7	1		T8	1
auto[68:71]	auto[0]	92	1			T38	1		T46	1		T16	1
auto[68:71]	auto[1]	264	1			T7	3		T34	4		T39	2
auto[72:75]	auto[0]	85	1			T39	1		T46	1		T47	2
auto[72:75]	auto[1]	266	1			T7	1		T39	1		T30	3
auto[76:79]	auto[0]	76	1			T39	2		T32	2		T48	2
auto[76:79]	auto[1]	252	1			T7	1		T8	2		T34	3
auto[80:83]	auto[0]	68	1			T38	2		T46	1		T202	2
auto[80:83]	auto[1]	230	1			T1	1		T7	2		T8	3
auto[84:87]	auto[0]	75	1			T39	1		T32	1		T49	1
auto[84:87]	auto[1]	225	1			T1	2		T8	1		T34	2
auto[88:91]	auto[0]	482	1			T2	2		T38	2		T45	1
auto[88:91]	auto[1]	1407	1			T1	4		T2	1		T7	1
auto[92:95]	auto[0]	91	1			T39	2		T46	2		T47	1
auto[92:95]	auto[1]	230	1			T1	2		T8	1		T38	2
auto[96:99]	auto[0]	96	1			T14	2		T50	1		T170	1
auto[96:99]	auto[1]	239	1			T8	4		T14	2		T34	1
auto[100:103]	auto[0]	107	1			T46	4		T159	1		T47	4
auto[100:103]	auto[1]	261	1			T2	2		T7	1		T34	2
auto[104:107]	auto[0]	451	1			T2	3		T51	1		T38	5
auto[104:107]	auto[1]	822	1			T2	3		T4	2		T7	2
auto[108:111]	auto[0]	102	1			T39	5		T55	1		T202	1
auto[108:111]	auto[1]	301	1			T1	3		T7	1		T8	2
auto[112:115]	auto[0]	78	1			T23	2		T39	2		T48	2
auto[112:115]	auto[1]	227	1			T8	3		T23	2		T34	3
auto[116:119]	auto[0]	89	1			T24	1		T39	2		T47	1
auto[116:119]	auto[1]	225	1			T7	2		T8	1		T24	1
auto[120:123]	auto[0]	120	1			T2	2		T44	4		T39	2
auto[120:123]	auto[1]	301	1			T7	2		T8	1		T38	2
auto[124:127]	auto[0]	82	1			T32	1		T16	3		T202	6
auto[124:127]	auto[1]	247	1			T7	2		T34	3		T30	2
auto[128:131]	auto[0]	82	1			T38	2		T39	2		T46	1
auto[128:131]	auto[1]	252	1			T7	1		T8	4		T34	7
auto[132:135]	auto[0]	80	1			T32	2		T46	1		T49	2
auto[132:135]	auto[1]	215	1			T7	1		T39	2		T30	1
auto[136:139]	auto[0]	82	1			T32	1		T46	1		T48	1
auto[136:139]	auto[1]	242	1			T1	1		T2	2		T8	3
auto[140:143]	auto[0]	67	1			T38	1		T32	1		T47	1
auto[140:143]	auto[1]	234	1			T8	2		T38	2		T34	2
auto[144:147]	auto[0]	73	1			T38	2		T39	1		T47	2
auto[144:147]	auto[1]	222	1			T2	2		T7	1		T34	3
auto[148:151]	auto[0]	90	1			T38	2		T39	4		T49	1
auto[148:151]	auto[1]	257	1			T7	1		T8	3		T34	3
auto[152:155]	auto[0]	81	1			T38	1		T47	3		T233	1
auto[152:155]	auto[1]	239	1			T7	1		T8	6		T38	2
auto[156:159]	auto[0]	466	1			T2	4		T24	2		T51	1
auto[156:159]	auto[1]	1393	1			T1	2		T7	4		T8	13
auto[160:163]	auto[0]	75	1			T2	1		T39	1		T55	4
auto[160:163]	auto[1]	229	1			T7	1		T8	2		T34	3
auto[164:167]	auto[0]	70	1			T39	2		T46	1		T48	2
auto[164:167]	auto[1]	238	1			T7	1		T34	3		T39	1
auto[168:171]	auto[0]	63	1			T39	1		T32	1		T46	3
auto[168:171]	auto[1]	222	1			T1	2		T7	2		T8	4
auto[172:175]	auto[0]	71	1			T39	1		T46	1		T47	1
auto[172:175]	auto[1]	228	1			T8	4		T38	1		T40	1
auto[176:179]	auto[0]	73	1			T38	1		T39	1		T46	1
auto[176:179]	auto[1]	244	1			T34	3		T40	2		T32	2
auto[180:183]	auto[0]	462	1			T3	2		T38	3		T39	4
auto[180:183]	auto[1]	1311	1			T1	2		T2	2		T3	2
auto[184:187]	auto[0]	446	1			T2	4		T10	1		T13	2
auto[184:187]	auto[1]	878	1			T5	1		T7	3		T8	4
auto[188:191]	auto[0]	83	1			T39	1		T46	1		T206	1
auto[188:191]	auto[1]	238	1			T2	1		T8	2		T34	4
auto[192:195]	auto[0]	85	1			T47	2		T55	2		T17	1
auto[192:195]	auto[1]	283	1			T7	4		T8	5		T34	3
auto[196:199]	auto[0]	63	1			T24	1		T38	1		T32	2
auto[196:199]	auto[1]	284	1			T1	1		T24	1		T30	4
auto[200:203]	auto[0]	74	1			T2	1		T38	4		T44	1
auto[200:203]	auto[1]	274	1			T1	1		T7	1		T8	5
auto[204:207]	auto[0]	77	1			T2	2		T39	1		T46	2
auto[204:207]	auto[1]	251	1			T1	3		T7	1		T8	1
auto[208:211]	auto[0]	80	1			T2	1		T39	3		T202	1
auto[208:211]	auto[1]	225	1			T7	5		T8	1		T30	1
auto[212:215]	auto[0]	89	1			T2	2		T47	1		T16	1
auto[212:215]	auto[1]	217	1			T38	1		T34	5		T30	3
auto[216:219]	auto[0]	79	1			T48	2		T16	1		T186	1
auto[216:219]	auto[1]	245	1			T39	4		T40	2		T30	6
auto[220:223]	auto[0]	95	1			T2	2		T39	5		T32	2
auto[220:223]	auto[1]	244	1			T7	2		T38	1		T34	2
auto[224:227]	auto[0]	76	1			T38	1		T46	2		T47	1
auto[224:227]	auto[1]	224	1			T40	4		T30	1		T32	1
auto[228:231]	auto[0]	103	1			T38	1		T39	1		T32	2
auto[228:231]	auto[1]	274	1			T1	3		T7	1		T8	1
auto[232:235]	auto[0]	788	1			T2	3		T24	3		T38	5
auto[232:235]	auto[1]	1967	1			T1	4		T2	4		T7	5
auto[236:239]	auto[0]	82	1			T32	1		T49	1		T50	1
auto[236:239]	auto[1]	255	1			T8	2		T40	3		T32	1
auto[240:243]	auto[0]	84	1			T39	1		T49	2		T16	1
auto[240:243]	auto[1]	255	1			T1	2		T7	1		T8	4
auto[244:247]	auto[0]	69	1			T38	3		T55	1		T17	1
auto[244:247]	auto[1]	243	1			T1	2		T7	2		T34	3
auto[248:251]	auto[0]	99	1			T24	1		T38	2		T39	2
auto[248:251]	auto[1]	238	1			T1	1		T8	6		T24	1
auto[252:255]	auto[0]	85	1			T2	1		T38	1		T39	1
auto[252:255]	auto[1]	228	1			T8	1		T38	2		T34	3