Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

15417

1

T1

4

T4

54

T5

94

auto[1]

46149

1

T1

4

T4

51

T5

166

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1237	1			T4	2		T5	8		T7	3
auto[4:7]	24740	1			T1	4		T4	38		T5	137
auto[8:11]	1320	1			T4	3		T5	1		T7	12
auto[12:15]	300	1			T4	2		T5	1		T7	1
auto[16:19]	360	1			T39	2		T29	1		T40	3
auto[20:23]	1936	1			T4	2		T5	7		T7	7
auto[24:27]	318	1			T5	2		T8	1		T39	5
auto[28:31]	336	1			T4	1		T5	2		T7	3
auto[32:35]	341	1			T5	2		T7	2		T28	4
auto[36:39]	343	1			T4	1		T7	1		T14	1
auto[40:43]	347	1			T5	3		T8	1		T39	2
auto[44:47]	310	1			T39	3		T40	2		T30	1
auto[48:51]	346	1			T5	2		T7	1		T8	1
auto[52:55]	1976	1			T4	2		T5	6		T7	5
auto[56:59]	1345	1			T4	2		T5	5		T7	7
auto[60:63]	321	1			T8	2		T28	2		T40	4
auto[64:67]	323	1			T5	4		T8	3		T39	1
auto[68:71]	351	1			T5	2		T7	1		T39	3
auto[72:75]	331	1			T8	1		T39	3		T40	4
auto[76:79]	360	1			T5	2		T39	3		T40	1
auto[80:83]	362	1			T8	1		T39	3		T40	4
auto[84:87]	335	1			T39	1		T40	1		T30	7
auto[88:91]	1936	1			T4	2		T5	6		T7	10
auto[92:95]	323	1			T4	1		T5	3		T14	1
auto[96:99]	340	1			T7	3		T8	1		T14	1
auto[100:103]	331	1			T4	1		T5	1		T7	2
auto[104:107]	1401	1			T4	5		T5	5		T7	2
auto[108:111]	374	1			T5	4		T7	2		T30	4
auto[112:115]	315	1			T4	2		T39	7		T40	1
auto[116:119]	413	1			T5	4		T7	5		T39	1
auto[120:123]	319	1			T4	1		T5	2		T7	1
auto[124:127]	370	1			T4	2		T5	1		T7	1
auto[128:131]	336	1			T4	1		T7	2		T8	1
auto[132:135]	312	1			T7	1		T39	1		T40	3
auto[136:139]	323	1			T7	2		T8	1		T30	2
auto[140:143]	288	1			T4	1		T5	2		T39	2
auto[144:147]	316	1			T7	1		T39	1		T40	2
auto[148:151]	362	1			T4	1		T5	1		T8	1
auto[152:155]	329	1			T5	2		T7	1		T8	1
auto[156:159]	1879	1			T4	2		T5	5		T7	8
auto[160:163]	346	1			T4	1		T5	1		T8	1
auto[164:167]	328	1			T4	1		T7	2		T39	2
auto[168:171]	366	1			T4	2		T5	4		T14	1
auto[172:175]	303	1			T4	1		T29	1		T40	1
auto[176:179]	362	1			T8	1		T30	4		T16	3
auto[180:183]	1881	1			T1	2		T4	2		T5	9
auto[184:187]	1388	1			T4	6		T5	3		T7	6
auto[188:191]	325	1			T4	4		T5	1		T7	4
auto[192:195]	389	1			T4	1		T5	1		T7	4
auto[196:199]	365	1			T4	1		T39	1		T40	6
auto[200:203]	333	1			T4	2		T7	2		T39	1
auto[204:207]	334	1			T7	1		T39	3		T29	2
auto[208:211]	359	1			T7	3		T8	1		T97	2
auto[212:215]	391	1			T4	4		T40	4		T30	1
auto[216:219]	346	1			T7	3		T39	2		T179	2
auto[220:223]	336	1			T5	1		T7	1		T39	3
auto[224:227]	350	1			T5	2		T7	3		T39	4
auto[228:231]	312	1			T5	1		T7	4		T14	1
auto[232:235]	2889	1			T1	2		T4	5		T5	7
auto[236:239]	343	1			T5	2		T7	2		T8	2
auto[240:243]	329	1			T5	1		T7	2		T30	1
auto[244:247]	309	1			T4	3		T7	1		T8	2
auto[248:251]	334	1			T5	5		T39	3		T30	6
auto[252:255]	343	1			T5	2		T8	1		T39	3

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	449	1			T4	2		T5	8		T7	2
auto[0:3]	auto[1]	788	1			T7	1		T39	2		T40	3
auto[4:7]	auto[0]	5796	1			T1	2		T4	16		T5	30
auto[4:7]	auto[1]	18944	1			T1	2		T4	22		T5	107
auto[8:11]	auto[0]	449	1			T5	1		T7	8		T28	2
auto[8:11]	auto[1]	871	1			T4	3		T7	4		T8	1
auto[12:15]	auto[0]	81	1			T5	1		T41	3		T44	1
auto[12:15]	auto[1]	219	1			T4	2		T7	1		T8	3
auto[16:19]	auto[0]	79	1			T39	1		T29	1		T40	1
auto[16:19]	auto[1]	281	1			T39	1		T40	2		T30	3
auto[20:23]	auto[0]	499	1			T4	1		T5	4		T7	5
auto[20:23]	auto[1]	1437	1			T4	1		T5	3		T7	2
auto[24:27]	auto[0]	73	1			T5	2		T39	3		T40	1
auto[24:27]	auto[1]	245	1			T8	1		T39	2		T30	2
auto[28:31]	auto[0]	76	1			T5	2		T7	2		T54	1
auto[28:31]	auto[1]	260	1			T4	1		T7	1		T14	3
auto[32:35]	auto[0]	76	1			T5	1		T7	1		T28	2
auto[32:35]	auto[1]	265	1			T5	1		T7	1		T28	2
auto[36:39]	auto[0]	63	1			T28	2		T41	1		T42	2
auto[36:39]	auto[1]	280	1			T4	1		T7	1		T14	1
auto[40:43]	auto[0]	78	1			T5	2		T39	2		T54	1
auto[40:43]	auto[1]	269	1			T5	1		T8	1		T41	1
auto[44:47]	auto[0]	80	1			T40	1		T41	3		T42	1
auto[44:47]	auto[1]	230	1			T39	3		T40	1		T30	1
auto[48:51]	auto[0]	79	1			T7	1		T28	2		T39	2
auto[48:51]	auto[1]	267	1			T5	2		T8	1		T28	2
auto[52:55]	auto[0]	461	1			T4	2		T5	1		T7	3
auto[52:55]	auto[1]	1515	1			T5	5		T7	2		T8	4
auto[56:59]	auto[0]	473	1			T5	2		T7	2		T15	2
auto[56:59]	auto[1]	872	1			T4	2		T5	3		T7	5
auto[60:63]	auto[0]	83	1			T28	1		T40	3		T89	1
auto[60:63]	auto[1]	238	1			T8	2		T28	1		T40	1
auto[64:67]	auto[0]	72	1			T41	1		T42	3		T19	3
auto[64:67]	auto[1]	251	1			T5	4		T8	3		T39	1
auto[68:71]	auto[0]	73	1			T5	2		T44	1		T34	1
auto[68:71]	auto[1]	278	1			T7	1		T39	3		T30	3
auto[72:75]	auto[0]	98	1			T39	2		T40	1		T42	2
auto[72:75]	auto[1]	233	1			T8	1		T39	1		T40	3
auto[76:79]	auto[0]	66	1			T5	2		T39	1		T16	3
auto[76:79]	auto[1]	294	1			T39	2		T40	1		T30	1
auto[80:83]	auto[0]	98	1			T39	3		T40	2		T186	2
auto[80:83]	auto[1]	264	1			T8	1		T40	2		T30	3
auto[84:87]	auto[0]	91	1			T41	1		T76	1		T251	2
auto[84:87]	auto[1]	244	1			T39	1		T40	1		T30	7
auto[88:91]	auto[0]	494	1			T4	1		T5	4		T7	6
auto[88:91]	auto[1]	1442	1			T4	1		T5	2		T7	4
auto[92:95]	auto[0]	75	1			T4	1		T15	1		T40	2
auto[92:95]	auto[1]	248	1			T5	3		T14	1		T15	1
auto[96:99]	auto[0]	72	1			T7	3		T39	2		T41	2
auto[96:99]	auto[1]	268	1			T8	1		T14	1		T39	2
auto[100:103]	auto[0]	84	1			T4	1		T39	1		T40	1
auto[100:103]	auto[1]	247	1			T5	1		T7	2		T39	1
auto[104:107]	auto[0]	487	1			T4	3		T5	4		T7	1
auto[104:107]	auto[1]	914	1			T4	2		T5	1		T7	1
auto[108:111]	auto[0]	70	1			T5	2		T7	1		T19	1
auto[108:111]	auto[1]	304	1			T5	2		T7	1		T30	4
auto[112:115]	auto[0]	84	1			T4	2		T39	3		T40	1
auto[112:115]	auto[1]	231	1			T39	4		T30	1		T16	6
auto[116:119]	auto[0]	84	1			T5	4		T7	5		T39	1
auto[116:119]	auto[1]	329	1			T30	1		T16	4		T77	2
auto[120:123]	auto[0]	90	1			T4	1		T5	2		T39	1
auto[120:123]	auto[1]	229	1			T7	1		T30	2		T16	1
auto[124:127]	auto[0]	89	1			T4	2		T39	1		T42	1
auto[124:127]	auto[1]	281	1			T5	1		T7	1		T39	2
auto[128:131]	auto[0]	86	1			T4	1		T39	3		T41	2
auto[128:131]	auto[1]	250	1			T7	2		T8	1		T39	1
auto[132:135]	auto[0]	89	1			T16	1		T42	1		T43	1
auto[132:135]	auto[1]	223	1			T7	1		T39	1		T40	3
auto[136:139]	auto[0]	75	1			T7	2		T41	1		T69	5
auto[136:139]	auto[1]	248	1			T8	1		T30	2		T16	2
auto[140:143]	auto[0]	64	1			T41	1		T44	2		T20	2
auto[140:143]	auto[1]	224	1			T4	1		T5	2		T39	2
auto[144:147]	auto[0]	68	1			T7	1		T39	1		T41	2
auto[144:147]	auto[1]	248	1			T40	2		T30	3		T16	5
auto[148:151]	auto[0]	65	1			T5	1		T42	1		T44	1
auto[148:151]	auto[1]	297	1			T4	1		T8	1		T40	2
auto[152:155]	auto[0]	76	1			T40	1		T16	1		T41	3
auto[152:155]	auto[1]	253	1			T5	2		T7	1		T8	1
auto[156:159]	auto[0]	451	1			T4	1		T5	1		T7	5
auto[156:159]	auto[1]	1428	1			T4	1		T5	4		T7	3
auto[160:163]	auto[0]	95	1			T5	1		T15	2		T97	1
auto[160:163]	auto[1]	251	1			T4	1		T8	1		T15	2
auto[164:167]	auto[0]	77	1			T4	1		T7	1		T39	1
auto[164:167]	auto[1]	251	1			T7	1		T39	1		T30	7
auto[168:171]	auto[0]	81	1			T4	2		T29	1		T40	1
auto[168:171]	auto[1]	285	1			T5	4		T14	1		T39	3
auto[172:175]	auto[0]	73	1			T4	1		T29	1		T40	1
auto[172:175]	auto[1]	230	1			T30	2		T16	2		T41	1
auto[176:179]	auto[0]	72	1			T42	1		T76	1		T44	1
auto[176:179]	auto[1]	290	1			T8	1		T30	4		T16	3
auto[180:183]	auto[0]	462	1			T1	1		T4	2		T5	4
auto[180:183]	auto[1]	1419	1			T1	1		T5	5		T7	3
auto[184:187]	auto[0]	482	1			T4	3		T5	1		T7	3
auto[184:187]	auto[1]	906	1			T4	3		T5	2		T7	3
auto[188:191]	auto[0]	80	1			T4	1		T7	1		T39	2
auto[188:191]	auto[1]	245	1			T4	3		T5	1		T7	3
auto[192:195]	auto[0]	97	1			T7	2		T43	3		T190	1
auto[192:195]	auto[1]	292	1			T4	1		T5	1		T7	2
auto[196:199]	auto[0]	75	1			T4	1		T40	2		T16	1
auto[196:199]	auto[1]	290	1			T39	1		T40	4		T30	2
auto[200:203]	auto[0]	66	1			T7	1		T41	3		T44	1
auto[200:203]	auto[1]	267	1			T4	2		T7	1		T39	1
auto[204:207]	auto[0]	80	1			T39	1		T54	1		T19	2
auto[204:207]	auto[1]	254	1			T7	1		T39	2		T29	2
auto[208:211]	auto[0]	78	1			T7	1		T97	1		T40	3
auto[208:211]	auto[1]	281	1			T7	2		T8	1		T97	1
auto[212:215]	auto[0]	78	1			T4	4		T40	3		T41	1
auto[212:215]	auto[1]	313	1			T40	1		T30	1		T16	2
auto[216:219]	auto[0]	73	1			T7	2		T39	1		T179	1
auto[216:219]	auto[1]	273	1			T7	1		T39	1		T179	1
auto[220:223]	auto[0]	91	1			T5	1		T7	1		T39	2
auto[220:223]	auto[1]	245	1			T39	1		T29	1		T40	4
auto[224:227]	auto[0]	84	1			T7	3		T39	4		T75	1
auto[224:227]	auto[1]	266	1			T5	2		T54	2		T30	4
auto[228:231]	auto[0]	60	1			T5	1		T41	2		T42	2
auto[228:231]	auto[1]	252	1			T7	4		T14	1		T39	1
auto[232:235]	auto[0]	829	1			T1	1		T4	4		T5	3
auto[232:235]	auto[1]	2060	1			T1	1		T4	1		T5	4
auto[236:239]	auto[0]	74	1			T5	2		T7	1		T43	2
auto[236:239]	auto[1]	269	1			T7	1		T8	2		T30	5
auto[240:243]	auto[0]	83	1			T76	2		T43	1		T20	6
auto[240:243]	auto[1]	246	1			T5	1		T7	2		T30	1
auto[244:247]	auto[0]	66	1			T4	1		T29	1		T40	4
auto[244:247]	auto[1]	243	1			T4	2		T7	1		T8	2
auto[248:251]	auto[0]	86	1			T5	3		T39	2		T44	3
auto[248:251]	auto[1]	248	1			T5	2		T39	1		T30	6
auto[252:255]	auto[0]	79	1			T5	2		T39	2		T40	4
auto[252:255]	auto[1]	264	1			T8	1		T39	1		T40	1