Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

16330

1

T1

161

T2

82

T3

7

auto[1]

47484

1

T1

197

T2

97

T3

7

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1288	1			T1	14		T2	8		T3	2
auto[4:7]	27005	1			T1	74		T2	44		T4	10
auto[8:11]	1260	1			T1	13		T2	4		T4	3
auto[12:15]	323	1			T1	3		T2	2		T9	2
auto[16:19]	297	1			T1	3		T2	1		T9	3
auto[20:23]	1951	1			T1	12		T2	5		T4	3
auto[24:27]	349	1			T1	1		T2	1		T9	1
auto[28:31]	315	1			T1	4		T2	1		T9	2
auto[32:35]	312	1			T1	4		T2	3		T9	2
auto[36:39]	302	1			T1	1		T2	1		T9	3
auto[40:43]	391	1			T1	5		T2	2		T9	3
auto[44:47]	315	1			T1	1		T9	4		T17	1
auto[48:51]	284	1			T1	3		T2	1		T15	3
auto[52:55]	1881	1			T1	13		T2	9		T4	1
auto[56:59]	1355	1			T1	16		T2	7		T9	6
auto[60:63]	366	1			T1	3		T2	2		T3	2
auto[64:67]	313	1			T1	3		T2	1		T3	4
auto[68:71]	345	1			T9	6		T16	1		T29	1
auto[72:75]	358	1			T1	1		T2	1		T15	2
auto[76:79]	361	1			T1	3		T2	2		T15	2
auto[80:83]	336	1			T1	5		T2	2		T9	2
auto[84:87]	369	1			T4	3		T9	7		T15	2
auto[88:91]	1901	1			T1	11		T2	3		T4	4
auto[92:95]	340	1			T1	2		T4	2		T9	1
auto[96:99]	289	1			T1	2		T9	2		T15	2
auto[100:103]	339	1			T1	4		T2	1		T4	1
auto[104:107]	1280	1			T1	11		T2	5		T3	2
auto[108:111]	358	1			T1	2		T2	1		T9	2
auto[112:115]	382	1			T1	5		T4	1		T28	1
auto[116:119]	334	1			T9	2		T15	1		T29	1
auto[120:123]	333	1			T1	1		T2	4		T4	1
auto[124:127]	389	1			T1	2		T4	1		T9	3
auto[128:131]	351	1			T1	1		T2	4		T9	1
auto[132:135]	371	1			T2	4		T9	4		T15	2
auto[136:139]	365	1			T2	2		T9	5		T15	2
auto[140:143]	300	1			T1	4		T2	1		T9	3
auto[144:147]	310	1			T1	1		T2	3		T9	6
auto[148:151]	394	1			T1	3		T4	1		T9	4
auto[152:155]	342	1			T1	5		T2	5		T4	2
auto[156:159]	1928	1			T1	8		T2	7		T4	3
auto[160:163]	395	1			T1	2		T9	5		T29	1
auto[164:167]	369	1			T1	2		T4	1		T15	2
auto[168:171]	333	1			T1	2		T2	1		T4	1
auto[172:175]	330	1			T1	5		T2	1		T4	1
auto[176:179]	340	1			T1	3		T2	3		T4	1
auto[180:183]	1924	1			T1	11		T2	3		T3	2
auto[184:187]	1363	1			T1	15		T2	7		T4	2
auto[188:191]	337	1			T2	2		T3	2		T9	4
auto[192:195]	300	1			T1	1		T9	2		T15	1
auto[196:199]	351	1			T1	4		T2	2		T4	4
auto[200:203]	331	1			T1	3		T2	2		T9	2
auto[204:207]	391	1			T1	2		T9	2		T29	1
auto[208:211]	311	1			T4	1		T9	1		T15	3
auto[212:215]	294	1			T1	6		T9	4		T15	2
auto[216:219]	357	1			T1	1		T2	1		T9	1
auto[220:223]	352	1			T1	1		T2	1		T15	4
auto[224:227]	360	1			T1	6		T2	1		T9	1
auto[228:231]	339	1			T1	6		T2	1		T9	8
auto[232:235]	2953	1			T1	28		T2	11		T4	10
auto[236:239]	336	1			T1	2		T9	4		T15	1
auto[240:243]	353	1			T1	3		T2	2		T9	8
auto[244:247]	319	1			T1	8		T9	1		T15	4
auto[248:251]	345	1			T1	2		T2	3		T9	7
auto[252:255]	349	1			T1	1		T2	1		T4	1

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	446	1			T1	7		T2	4		T3	1
auto[0:3]	auto[1]	842	1			T1	7		T2	4		T3	1
auto[4:7]	auto[0]	6634	1			T1	39		T2	17		T4	1
auto[4:7]	auto[1]	20371	1			T1	35		T2	27		T4	9
auto[8:11]	auto[0]	385	1			T1	2		T2	1		T4	1
auto[8:11]	auto[1]	875	1			T1	11		T2	3		T4	2
auto[12:15]	auto[0]	83	1			T1	2		T2	2		T15	2
auto[12:15]	auto[1]	240	1			T1	1		T9	2		T15	2
auto[16:19]	auto[0]	69	1			T1	3		T2	1		T15	1
auto[16:19]	auto[1]	228	1			T9	3		T68	2		T47	2
auto[20:23]	auto[0]	487	1			T1	5		T2	4		T4	3
auto[20:23]	auto[1]	1464	1			T1	7		T2	1		T9	12
auto[24:27]	auto[0]	76	1			T2	1		T15	1		T18	1
auto[24:27]	auto[1]	273	1			T1	1		T9	1		T29	2
auto[28:31]	auto[0]	69	1			T1	2		T15	3		T29	1
auto[28:31]	auto[1]	246	1			T1	2		T2	1		T9	2
auto[32:35]	auto[0]	93	1			T1	3		T2	2		T15	2
auto[32:35]	auto[1]	219	1			T1	1		T2	1		T9	2
auto[36:39]	auto[0]	70	1			T1	1		T17	1		T19	1
auto[36:39]	auto[1]	232	1			T2	1		T9	3		T15	4
auto[40:43]	auto[0]	87	1			T1	3		T2	1		T29	2
auto[40:43]	auto[1]	304	1			T1	2		T2	1		T9	3
auto[44:47]	auto[0]	65	1			T1	1		T17	1		T34	3
auto[44:47]	auto[1]	250	1			T9	4		T36	3		T68	1
auto[48:51]	auto[0]	62	1			T15	1		T18	3		T47	2
auto[48:51]	auto[1]	222	1			T1	3		T2	1		T15	2
auto[52:55]	auto[0]	434	1			T1	7		T2	6		T4	1
auto[52:55]	auto[1]	1447	1			T1	6		T2	3		T9	8
auto[56:59]	auto[0]	465	1			T1	8		T2	3		T15	7
auto[56:59]	auto[1]	890	1			T1	8		T2	4		T9	6
auto[60:63]	auto[0]	83	1			T1	3		T3	1		T15	2
auto[60:63]	auto[1]	283	1			T2	2		T3	1		T9	3
auto[64:67]	auto[0]	81	1			T2	1		T3	2		T17	3
auto[64:67]	auto[1]	232	1			T1	3		T3	2		T4	3
auto[68:71]	auto[0]	91	1			T17	1		T18	1		T34	3
auto[68:71]	auto[1]	254	1			T9	6		T16	1		T29	1
auto[72:75]	auto[0]	78	1			T1	1		T29	1		T42	1
auto[72:75]	auto[1]	280	1			T2	1		T15	2		T17	1
auto[76:79]	auto[0]	99	1			T15	1		T17	1		T18	1
auto[76:79]	auto[1]	262	1			T1	3		T2	2		T15	1
auto[80:83]	auto[0]	74	1			T1	1		T29	1		T17	1
auto[80:83]	auto[1]	262	1			T1	4		T2	2		T9	2
auto[84:87]	auto[0]	94	1			T4	3		T15	2		T17	4
auto[84:87]	auto[1]	275	1			T9	7		T29	1		T36	1
auto[88:91]	auto[0]	476	1			T1	3		T2	1		T4	1
auto[88:91]	auto[1]	1425	1			T1	8		T2	2		T4	3
auto[92:95]	auto[0]	80	1			T1	1		T4	2		T42	1
auto[92:95]	auto[1]	260	1			T1	1		T9	1		T29	1
auto[96:99]	auto[0]	72	1			T15	1		T18	1		T80	1
auto[96:99]	auto[1]	217	1			T1	2		T9	2		T15	1
auto[100:103]	auto[0]	79	1			T2	1		T4	1		T15	1
auto[100:103]	auto[1]	260	1			T1	4		T9	2		T15	1
auto[104:107]	auto[0]	477	1			T1	6		T2	3		T3	1
auto[104:107]	auto[1]	803	1			T1	5		T2	2		T3	1
auto[108:111]	auto[0]	96	1			T2	1		T28	2		T29	4
auto[108:111]	auto[1]	262	1			T1	2		T9	2		T15	2
auto[112:115]	auto[0]	76	1			T1	1		T4	1		T29	2
auto[112:115]	auto[1]	306	1			T1	4		T28	1		T68	2
auto[116:119]	auto[0]	71	1			T29	1		T47	1		T20	3
auto[116:119]	auto[1]	263	1			T9	2		T15	1		T68	3
auto[120:123]	auto[0]	71	1			T2	2		T4	1		T18	1
auto[120:123]	auto[1]	262	1			T1	1		T2	2		T9	7
auto[124:127]	auto[0]	98	1			T1	1		T4	1		T15	2
auto[124:127]	auto[1]	291	1			T1	1		T9	3		T15	2
auto[128:131]	auto[0]	98	1			T15	3		T29	1		T17	1
auto[128:131]	auto[1]	253	1			T1	1		T2	4		T9	1
auto[132:135]	auto[0]	81	1			T15	2		T18	1		T47	2
auto[132:135]	auto[1]	290	1			T2	4		T9	4		T17	1
auto[136:139]	auto[0]	102	1			T2	1		T15	2		T29	3
auto[136:139]	auto[1]	263	1			T2	1		T9	5		T17	1
auto[140:143]	auto[0]	54	1			T1	1		T2	1		T15	1
auto[140:143]	auto[1]	246	1			T1	3		T9	3		T17	1
auto[144:147]	auto[0]	80	1			T1	1		T2	2		T29	1
auto[144:147]	auto[1]	230	1			T2	1		T9	6		T15	1
auto[148:151]	auto[0]	106	1			T15	5		T18	2		T34	1
auto[148:151]	auto[1]	288	1			T1	3		T4	1		T9	4
auto[152:155]	auto[0]	94	1			T1	3		T2	5		T4	2
auto[152:155]	auto[1]	248	1			T1	2		T36	1		T68	5
auto[156:159]	auto[0]	447	1			T1	3		T2	4		T4	1
auto[156:159]	auto[1]	1481	1			T1	5		T2	3		T4	2
auto[160:163]	auto[0]	90	1			T1	2		T29	1		T18	3
auto[160:163]	auto[1]	305	1			T9	5		T68	1		T18	2
auto[164:167]	auto[0]	102	1			T4	1		T15	2		T17	2
auto[164:167]	auto[1]	267	1			T1	2		T29	2		T36	1
auto[168:171]	auto[0]	67	1			T4	1		T29	1		T18	1
auto[168:171]	auto[1]	266	1			T1	2		T2	1		T17	1
auto[172:175]	auto[0]	50	1			T1	2		T15	1		T17	1
auto[172:175]	auto[1]	280	1			T1	3		T2	1		T4	1
auto[176:179]	auto[0]	82	1			T1	1		T2	2		T4	1
auto[176:179]	auto[1]	258	1			T1	2		T2	1		T9	3
auto[180:183]	auto[0]	500	1			T1	2		T2	1		T3	1
auto[180:183]	auto[1]	1424	1			T1	9		T2	2		T3	1
auto[184:187]	auto[0]	528	1			T1	7		T2	2		T4	2
auto[184:187]	auto[1]	835	1			T1	8		T2	5		T9	3
auto[188:191]	auto[0]	97	1			T2	1		T3	1		T15	3
auto[188:191]	auto[1]	240	1			T2	1		T3	1		T9	4
auto[192:195]	auto[0]	74	1			T15	1		T18	3		T34	2
auto[192:195]	auto[1]	226	1			T1	1		T9	2		T36	2
auto[196:199]	auto[0]	72	1			T1	1		T4	4		T17	3
auto[196:199]	auto[1]	279	1			T1	3		T2	2		T9	1
auto[200:203]	auto[0]	90	1			T1	1		T2	2		T28	1
auto[200:203]	auto[1]	241	1			T1	2		T9	2		T28	1
auto[204:207]	auto[0]	95	1			T1	2		T29	1		T17	1
auto[204:207]	auto[1]	296	1			T9	2		T17	2		T36	2
auto[208:211]	auto[0]	69	1			T4	1		T15	2		T148	1
auto[208:211]	auto[1]	242	1			T9	1		T15	1		T17	1
auto[212:215]	auto[0]	84	1			T1	4		T29	2		T17	5
auto[212:215]	auto[1]	210	1			T1	2		T9	4		T15	2
auto[216:219]	auto[0]	77	1			T1	1		T10	1		T15	3
auto[216:219]	auto[1]	280	1			T2	1		T9	1		T10	1
auto[220:223]	auto[0]	58	1			T15	1		T28	2		T17	1
auto[220:223]	auto[1]	294	1			T1	1		T2	1		T15	3
auto[224:227]	auto[0]	84	1			T1	3		T2	1		T29	2
auto[224:227]	auto[1]	276	1			T1	3		T9	1		T17	1
auto[228:231]	auto[0]	73	1			T1	5		T2	1		T17	1
auto[228:231]	auto[1]	266	1			T1	1		T9	8		T15	1
auto[232:235]	auto[0]	839	1			T1	14		T2	6		T4	2
auto[232:235]	auto[1]	2114	1			T1	14		T2	5		T4	8
auto[236:239]	auto[0]	92	1			T29	2		T42	1		T34	5
auto[236:239]	auto[1]	244	1			T1	2		T9	4		T15	1
auto[240:243]	auto[0]	74	1			T1	3		T2	2		T17	1
auto[240:243]	auto[1]	279	1			T9	8		T29	2		T17	1
auto[244:247]	auto[0]	75	1			T1	4		T15	1		T18	1
auto[244:247]	auto[1]	244	1			T1	4		T9	1		T15	3
auto[248:251]	auto[0]	88	1			T15	2		T80	2		T79	2
auto[248:251]	auto[1]	257	1			T1	2		T2	3		T9	7
auto[252:255]	auto[0]	87	1			T1	1		T4	1		T15	1
auto[252:255]	auto[1]	262	1			T2	1		T9	1		T29	1