Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
99.32	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	1	127	99.22

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	1	127	99.22	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4821	1			T1	54		T15	48		T28	20
values[1]	4289	1			T1	63		T2	20		T4	22
values[2]	4325	1			T1	99		T2	20		T15	27
values[3]	3521	1			T1	41		T3	14		T29	227
values[4]	3882	1			T1	40		T2	20		T4	25
values[5]	4336	1			T2	52		T10	4		T15	128
values[6]	2901	1			T2	47		T4	20		T15	62
values[7]	3236	1			T1	41		T2	20		T15	67

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4373	1			T1	80		T2	20		T4	25
values[1]	4057	1			T1	40		T15	85		T28	20
values[2]	4350	1			T1	96		T15	187		T18	40
values[3]	3364	1			T28	20		T29	51		T17	49
values[4]	3540	1			T1	41		T2	21		T3	14
values[5]	4155	1			T2	87		T4	22		T11	6
values[6]	3646	1			T1	61		T2	20		T13	8
values[7]	3826	1			T1	20		T2	31		T15	101

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

30550

1

T1

323

T2

176

T3

14

auto[1]

761

1

T1

15

T2

3

T4

3

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	1	127	99.22	1

Automatically Generated Cross Bins for cr_all

Uncovered bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	[values[6]]	[values[3]]	0	1	1

Covered bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	672	1			T29	143		T114	19		T116	71
auto[0]	values[0]	values[1]	571	1			T28	17		T79	19		T20	58
auto[0]	values[0]	values[2]	414	1			T1	33		T76	28		T151	22
auto[0]	values[0]	values[3]	564	1			T19	19		T34	26		T152	38
auto[0]	values[0]	values[4]	543	1			T1	20		T15	20		T47	29
auto[0]	values[0]	values[5]	484	1			T72	20		T47	20		T153	6
auto[0]	values[0]	values[6]	821	1			T47	27		T154	8		T155	20
auto[0]	values[0]	values[7]	636	1			T15	26		T18	93		T34	20
auto[0]	values[1]	values[0]	587	1			T1	19		T29	20		T18	74
auto[0]	values[1]	values[1]	452	1			T75	18		T156	20		T152	36
auto[0]	values[1]	values[2]	693	1			T15	147		T22	25		T157	14
auto[0]	values[1]	values[3]	435	1			T18	19		T158	12		T159	34
auto[0]	values[1]	values[4]	458	1			T1	21		T17	25		T160	10
auto[0]	values[1]	values[5]	685	1			T2	19		T4	20		T11	6
auto[0]	values[1]	values[6]	384	1			T1	21		T34	55		T161	6
auto[0]	values[1]	values[7]	484	1			T162	8		T163	19		T164	6
auto[0]	values[2]	values[0]	660	1			T1	51		T15	27		T18	20
auto[0]	values[2]	values[1]	362	1			T1	18		T34	49		T20	20
auto[0]	values[2]	values[2]	657	1			T165	19		T22	20		T166	21
auto[0]	values[2]	values[3]	571	1			T28	20		T17	46		T47	50
auto[0]	values[2]	values[4]	465	1			T79	20		T20	17		T167	42
auto[0]	values[2]	values[5]	689	1			T18	20		T168	129		T169	20
auto[0]	values[2]	values[6]	401	1			T1	20		T2	20		T20	20
auto[0]	values[2]	values[7]	424	1			T20	18		T165	21		T170	20
auto[0]	values[3]	values[0]	489	1			T17	19		T171	10		T172	35
auto[0]	values[3]	values[1]	415	1			T30	22		T173	23		T174	8
auto[0]	values[3]	values[2]	489	1			T1	41		T175	20		T167	19
auto[0]	values[3]	values[3]	315	1			T29	51		T18	40		T156	17
auto[0]	values[3]	values[4]	233	1			T3	14		T176	2		T177	2
auto[0]	values[3]	values[5]	659	1			T29	176		T17	26		T178	20
auto[0]	values[3]	values[6]	406	1			T17	24		T19	24		T80	16
auto[0]	values[3]	values[7]	419	1			T148	44		T179	4		T75	19
auto[0]	values[4]	values[0]	384	1			T4	24		T79	18		T180	2
auto[0]	values[4]	values[1]	474	1			T1	20		T20	20		T166	43
auto[0]	values[4]	values[2]	579	1			T15	34		T20	28		T181	24
auto[0]	values[4]	values[3]	444	1			T182	6		T20	29		T183	12
auto[0]	values[4]	values[4]	517	1			T45	6		T166	43		T114	31
auto[0]	values[4]	values[5]	533	1			T2	20		T47	20		T20	20
auto[0]	values[4]	values[6]	464	1			T1	18		T13	8		T18	20
auto[0]	values[4]	values[7]	383	1			T15	23		T184	20		T185	14
auto[0]	values[5]	values[0]	651	1			T10	4		T17	37		T34	20
auto[0]	values[5]	values[1]	610	1			T15	81		T34	35		T47	21
auto[0]	values[5]	values[2]	662	1			T186	16		T114	80		T173	20
auto[0]	values[5]	values[3]	591	1			T34	97		T20	82		T187	2
auto[0]	values[5]	values[4]	513	1			T2	20		T15	39		T29	84
auto[0]	values[5]	values[5]	415	1			T28	18		T29	20		T20	28
auto[0]	values[5]	values[6]	413	1			T188	6		T19	36		T189	12
auto[0]	values[5]	values[7]	357	1			T2	31		T18	23		T34	26
auto[0]	values[6]	values[0]	215	1			T190	8		T191	18		T159	19
auto[0]	values[6]	values[1]	627	1			T29	168		T17	20		T47	20
auto[0]	values[6]	values[2]	432	1			T156	27		T163	20		T147	19
auto[0]	values[6]	values[3]	56	1			T61	8		T192	14		T193	20
auto[0]	values[6]	values[4]	353	1			T4	20		T17	20		T159	20
auto[0]	values[6]	values[5]	328	1			T2	46		T15	19		T20	20
auto[0]	values[6]	values[6]	239	1			T15	18		T47	21		T194	16
auto[0]	values[6]	values[7]	594	1			T15	21		T17	33		T195	14
auto[0]	values[7]	values[0]	604	1			T2	20		T29	20		T34	121
auto[0]	values[7]	values[1]	469	1			T165	26		T166	50		T119	10
auto[0]	values[7]	values[2]	321	1			T1	21		T18	37		T166	22
auto[0]	values[7]	values[3]	292	1			T196	4		T197	2		T166	21
auto[0]	values[7]	values[4]	374	1			T15	39		T20	21		T155	20
auto[0]	values[7]	values[5]	274	1			T18	25		T20	27		T198	19
auto[0]	values[7]	values[6]	421	1			T20	59		T199	4		T173	20
auto[0]	values[7]	values[7]	424	1			T1	20		T15	27		T17	20
auto[1]	values[0]	values[0]	18	1			T29	3		T114	1		T200	2
auto[1]	values[0]	values[1]	17	1			T28	3		T79	1		T20	1
auto[1]	values[0]	values[2]	6	1			T1	1		T201	1		T202	2
auto[1]	values[0]	values[3]	16	1			T19	1		T34	2		T152	3
auto[1]	values[0]	values[4]	12	1			T47	2		T22	2		T203	1
auto[1]	values[0]	values[5]	11	1			T22	3		T75	1		T204	2
auto[1]	values[0]	values[6]	22	1			T47	3		T184	1		T205	1
auto[1]	values[0]	values[7]	14	1			T15	2		T18	1		T206	2
auto[1]	values[1]	values[0]	23	1			T1	2		T18	3		T207	1
auto[1]	values[1]	values[1]	7	1			T75	2		T152	1		T208	2
auto[1]	values[1]	values[2]	16	1			T15	5		T114	1		T209	1
auto[1]	values[1]	values[3]	16	1			T18	1		T172	3		T210	2
auto[1]	values[1]	values[4]	7	1			T17	1		T75	1		T151	1
auto[1]	values[1]	values[5]	18	1			T2	1		T4	2		T184	4
auto[1]	values[1]	values[6]	8	1			T34	2		T184	3		T210	1
auto[1]	values[1]	values[7]	16	1			T163	1		T211	1		T212	3
auto[1]	values[2]	values[0]	16	1			T1	8		T213	2		T147	3
auto[1]	values[2]	values[1]	6	1			T1	2		T147	1		T214	1
auto[1]	values[2]	values[2]	15	1			T165	1		T166	1		T200	2
auto[1]	values[2]	values[3]	18	1			T17	3		T47	3		T156	1
auto[1]	values[2]	values[4]	9	1			T20	3		T178	1		T215	1
auto[1]	values[2]	values[5]	9	1			T216	1		T203	1		T217	1
auto[1]	values[2]	values[6]	9	1			T22	1		T166	2		T209	2
auto[1]	values[2]	values[7]	14	1			T20	3		T165	1		T178	1
auto[1]	values[3]	values[0]	14	1			T17	1		T218	2		T193	4
auto[1]	values[3]	values[1]	4	1			T59	1		T208	2		T209	1
auto[1]	values[3]	values[2]	13	1			T167	1		T75	1		T155	3
auto[1]	values[3]	values[3]	15	1			T18	2		T156	3		T219	1
auto[1]	values[3]	values[4]	5	1			T210	1		T38	3		T220	1
auto[1]	values[3]	values[5]	13	1			T17	1		T213	5		T221	4
auto[1]	values[3]	values[6]	17	1			T17	2		T178	1		T203	1
auto[1]	values[3]	values[7]	15	1			T148	2		T75	1		T38	1
auto[1]	values[4]	values[0]	13	1			T4	1		T79	2		T198	1
auto[1]	values[4]	values[1]	8	1			T166	3		T178	1		T222	1
auto[1]	values[4]	values[2]	21	1			T15	1		T20	4		T198	2
auto[1]	values[4]	values[3]	15	1			T20	3		T223	4		T208	2
auto[1]	values[4]	values[4]	20	1			T166	1		T114	1		T156	1
auto[1]	values[4]	values[5]	9	1			T167	3		T156	4		T170	1
auto[1]	values[4]	values[6]	10	1			T1	2		T159	1		T224	2
auto[1]	values[4]	values[7]	8	1			T15	1		T208	1		T193	1
auto[1]	values[5]	values[0]	14	1			T208	2		T193	2		T225	1
auto[1]	values[5]	values[1]	19	1			T15	4		T34	1		T47	2
auto[1]	values[5]	values[2]	18	1			T172	2		T209	1		T163	3
auto[1]	values[5]	values[3]	11	1			T170	1		T226	1		T145	1
auto[1]	values[5]	values[4]	16	1			T2	1		T15	4		T29	2
auto[1]	values[5]	values[5]	11	1			T28	2		T143	1		T193	2
auto[1]	values[5]	values[6]	19	1			T19	2		T184	1		T208	1
auto[1]	values[5]	values[7]	16	1			T18	1		T34	2		T147	1
auto[1]	values[6]	values[0]	6	1			T159	1		T145	1		T227	1
auto[1]	values[6]	values[1]	7	1			T29	1		T156	2		T155	1
auto[1]	values[6]	values[2]	9	1			T156	3		T147	1		T228	3
auto[1]	values[6]	values[4]	5	1			T229	5		-	-		-	-
auto[1]	values[6]	values[5]	12	1			T2	1		T15	1		T75	1
auto[1]	values[6]	values[6]	2	1			T15	2		-	-		-	-
auto[1]	values[6]	values[7]	16	1			T15	1		T17	4		T213	1
auto[1]	values[7]	values[0]	7	1			T34	1		T151	1		T230	2
auto[1]	values[7]	values[1]	9	1			T75	1		T147	3		T231	5
auto[1]	values[7]	values[2]	5	1			T18	3		T232	2		-	-
auto[1]	values[7]	values[3]	5	1			T121	1		T218	1		T212	1
auto[1]	values[7]	values[4]	10	1			T15	1		T230	3		T233	2
auto[1]	values[7]	values[5]	5	1			T18	1		T198	1		T234	3
auto[1]	values[7]	values[6]	10	1			T170	3		T235	1		T236	1
auto[1]	values[7]	values[7]	6	1			T20	2		T216	3		T214	1