Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4496	1			T1	88		T55	20		T56	47
values[1]	3812	1			T44	45		T55	20		T101	10
values[2]	4189	1			T4	22		T5	8		T14	40
values[3]	3764	1			T14	26		T44	20		T56	38
values[4]	4551	1			T13	2		T14	51		T53	10
values[5]	3760	1			T11	4		T14	80		T55	20
values[6]	4921	1			T14	49		T52	12		T44	110
values[7]	3823	1			T3	20		T14	74		T44	34

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4759	1			T13	2		T14	73		T44	100
values[1]	3637	1			T14	50		T55	20		T31	20
values[2]	3400	1			T14	41		T44	20		T56	32
values[3]	4519	1			T14	20		T44	35		T182	18
values[4]	4033	1			T1	88		T11	4		T14	69
values[5]	3780	1			T3	20		T4	22		T53	10
values[6]	4692	1			T5	8		T14	20		T52	12
values[7]	4496	1			T14	47		T44	130		T31	27

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

32478

1

T1

88

T3

20

T4

12

auto[1]

838

1

T4

10

T14

10

T44

4

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	970	1			T56	25		T57	22		T43	36
auto[0]	values[0]	values[1]	423	1			T16	20		T196	19		T22	39
auto[0]	values[0]	values[2]	503	1			T218	22		T43	20		T45	20
auto[0]	values[0]	values[3]	479	1			T43	19		T204	50		T19	20
auto[0]	values[0]	values[4]	555	1			T1	88		T45	19		T261	2
auto[0]	values[0]	values[5]	314	1			T55	18		T43	20		T45	17
auto[0]	values[0]	values[6]	574	1			T56	20		T58	32		T247	20
auto[0]	values[0]	values[7]	562	1			T247	30		T140	40		T197	108
auto[0]	values[1]	values[0]	657	1			T44	25		T58	20		T23	30
auto[0]	values[1]	values[1]	280	1			T23	77		T22	20		T205	20
auto[0]	values[1]	values[2]	414	1			T56	31		T213	6		T201	19
auto[0]	values[1]	values[3]	542	1			T58	52		T207	18		T17	43
auto[0]	values[1]	values[4]	430	1			T44	20		T101	10		T228	20
auto[0]	values[1]	values[5]	517	1			T55	20		T245	6		T17	22
auto[0]	values[1]	values[6]	566	1			T54	20		T232	16		T23	95
auto[0]	values[1]	values[7]	313	1			T195	20		T22	20		T231	19
auto[0]	values[2]	values[0]	770	1			T14	20		T249	58		T45	20
auto[0]	values[2]	values[1]	522	1			T57	20		T43	46		T243	8
auto[0]	values[2]	values[2]	481	1			T177	18		T201	20		T223	6
auto[0]	values[2]	values[3]	448	1			T56	20		T88	40		T202	20
auto[0]	values[2]	values[4]	362	1			T45	40		T177	18		T197	45
auto[0]	values[2]	values[5]	240	1			T4	12		T45	20		T140	54
auto[0]	values[2]	values[6]	497	1			T5	8		T14	20		T54	20
auto[0]	values[2]	values[7]	753	1			T44	96		T43	79		T26	26
auto[0]	values[3]	values[0]	321	1			T228	20		T262	2		T149	20
auto[0]	values[3]	values[1]	553	1			T215	20		T177	16		T19	20
auto[0]	values[3]	values[2]	312	1			T44	19		T23	38		T19	47
auto[0]	values[3]	values[3]	367	1			T236	23		T204	46		T197	34
auto[0]	values[3]	values[4]	518	1			T57	28		T58	150		T236	20
auto[0]	values[3]	values[5]	342	1			T234	14		T221	14		T45	18
auto[0]	values[3]	values[6]	536	1			T58	29		T17	42		T149	23
auto[0]	values[3]	values[7]	715	1			T14	23		T56	38		T43	27
auto[0]	values[4]	values[0]	662	1			T13	2		T31	16		T54	129
auto[0]	values[4]	values[1]	331	1			T14	30		T31	20		T246	2
auto[0]	values[4]	values[2]	496	1			T39	14		T252	4		T204	26
auto[0]	values[4]	values[3]	527	1			T182	18		T57	70		T198	18
auto[0]	values[4]	values[4]	432	1			T14	21		T19	19		T201	34
auto[0]	values[4]	values[5]	1015	1			T53	10		T55	20		T31	20
auto[0]	values[4]	values[6]	591	1			T57	19		T23	87		T37	20
auto[0]	values[4]	values[7]	386	1			T31	27		T45	20		T263	2
auto[0]	values[5]	values[0]	359	1			T16	25		T23	20		T264	12
auto[0]	values[5]	values[1]	452	1			T14	20		T55	19		T45	18
auto[0]	values[5]	values[2]	323	1			T14	20		T225	4		T23	65
auto[0]	values[5]	values[3]	416	1			T14	20		T37	19		T19	26
auto[0]	values[5]	values[4]	597	1			T11	4		T14	20		T57	32
auto[0]	values[5]	values[5]	342	1			T16	24		T248	2		T236	22
auto[0]	values[5]	values[6]	819	1			T31	24		T56	47		T260	10
auto[0]	values[5]	values[7]	372	1			T236	25		T177	18		T205	19
auto[0]	values[6]	values[0]	449	1			T44	74		T206	8		T19	49
auto[0]	values[6]	values[1]	581	1			T16	20		T37	20		T205	20
auto[0]	values[6]	values[2]	372	1			T14	20		T222	10		T43	20
auto[0]	values[6]	values[3]	797	1			T44	34		T56	42		T43	27
auto[0]	values[6]	values[4]	562	1			T14	25		T45	19		T37	20
auto[0]	values[6]	values[5]	515	1			T43	73		T204	20		T265	10
auto[0]	values[6]	values[6]	547	1			T52	12		T226	8		T58	20
auto[0]	values[6]	values[7]	975	1			T23	217		T37	19		T204	20
auto[0]	values[7]	values[0]	458	1			T14	50		T31	20		T17	30
auto[0]	values[7]	values[1]	415	1			T58	80		T229	8		T201	19
auto[0]	values[7]	values[2]	420	1			T266	6		T201	20		T267	20
auto[0]	values[7]	values[3]	817	1			T45	19		T23	20		T201	25
auto[0]	values[7]	values[4]	478	1			T100	140		T37	20		T204	42
auto[0]	values[7]	values[5]	373	1			T3	20		T43	28		T236	24
auto[0]	values[7]	values[6]	443	1			T43	20		T23	96		T207	19
auto[0]	values[7]	values[7]	320	1			T14	21		T44	33		T247	20
auto[1]	values[0]	values[0]	32	1			T56	2		T57	1		T43	1
auto[1]	values[0]	values[1]	12	1			T196	1		T268	2		T269	1
auto[1]	values[0]	values[2]	5	1			T43	2		T177	2		T267	1
auto[1]	values[0]	values[3]	18	1			T43	3		T204	1		T140	1
auto[1]	values[0]	values[4]	18	1			T45	1		T261	4		T255	4
auto[1]	values[0]	values[5]	5	1			T55	2		T45	3		-	-
auto[1]	values[0]	values[6]	17	1			T149	1		T150	2		T270	2
auto[1]	values[0]	values[7]	9	1			T197	2		T203	1		T211	2
auto[1]	values[1]	values[0]	11	1			T205	3		T197	2		T253	1
auto[1]	values[1]	values[1]	7	1			T23	2		T271	1		T41	3
auto[1]	values[1]	values[2]	8	1			T56	1		T201	1		T202	1
auto[1]	values[1]	values[3]	23	1			T207	2		T17	3		T236	1
auto[1]	values[1]	values[4]	8	1			T236	1		T224	1		T272	3
auto[1]	values[1]	values[5]	15	1			T17	2		T19	2		T273	2
auto[1]	values[1]	values[6]	16	1			T23	1		T228	1		T204	3
auto[1]	values[1]	values[7]	5	1			T231	1		T274	1		T275	1
auto[1]	values[2]	values[0]	20	1			T276	2		T224	3		T168	1
auto[1]	values[2]	values[1]	16	1			T57	1		T43	1		T16	2
auto[1]	values[2]	values[2]	16	1			T177	2		T149	1		T227	2
auto[1]	values[2]	values[3]	9	1			T168	6		T277	3		-	-
auto[1]	values[2]	values[4]	8	1			T177	2		T197	1		T151	2
auto[1]	values[2]	values[5]	19	1			T4	10		T140	3		T278	3
auto[1]	values[2]	values[6]	13	1			T204	2		T256	2		T271	3
auto[1]	values[2]	values[7]	15	1			T43	2		T204	1		T140	1
auto[1]	values[3]	values[0]	5	1			T279	2		T169	1		T280	2
auto[1]	values[3]	values[1]	12	1			T177	4		T140	2		T281	4
auto[1]	values[3]	values[2]	12	1			T44	1		T23	2		T231	2
auto[1]	values[3]	values[3]	14	1			T204	3		T197	1		T282	2
auto[1]	values[3]	values[4]	10	1			T57	2		T58	3		T144	2
auto[1]	values[3]	values[5]	12	1			T45	2		T238	4		T283	3
auto[1]	values[3]	values[6]	11	1			T151	1		T238	1		T278	1
auto[1]	values[3]	values[7]	24	1			T14	3		T43	2		T215	2
auto[1]	values[4]	values[0]	17	1			T31	4		T284	2		T285	1
auto[1]	values[4]	values[1]	8	1			T168	1		T238	2		T273	2
auto[1]	values[4]	values[2]	13	1			T204	1		T224	1		T268	3
auto[1]	values[4]	values[3]	13	1			T57	2		T37	2		T286	1
auto[1]	values[4]	values[4]	17	1			T19	1		T201	1		T231	2
auto[1]	values[4]	values[5]	30	1			T31	1		T58	1		T207	3
auto[1]	values[4]	values[6]	10	1			T57	1		T287	1		T269	2
auto[1]	values[4]	values[7]	3	1			T144	1		T227	1		T270	1
auto[1]	values[5]	values[0]	7	1			T16	1		T195	2		T149	2
auto[1]	values[5]	values[1]	6	1			T55	1		T45	2		T195	1
auto[1]	values[5]	values[2]	4	1			T288	1		T289	2		T290	1
auto[1]	values[5]	values[3]	8	1			T37	1		T239	1		T211	1
auto[1]	values[5]	values[4]	16	1			T197	1		T253	4		T211	4
auto[1]	values[5]	values[5]	10	1			T236	2		T99	2		T289	1
auto[1]	values[5]	values[6]	17	1			T56	1		T260	2		T150	3
auto[1]	values[5]	values[7]	12	1			T236	2		T177	2		T205	1
auto[1]	values[6]	values[0]	8	1			T44	1		T291	1		T41	3
auto[1]	values[6]	values[1]	11	1			T203	3		T227	1		T238	1
auto[1]	values[6]	values[2]	5	1			T14	1		T43	1		T253	1
auto[1]	values[6]	values[3]	14	1			T44	1		T43	2		T201	1
auto[1]	values[6]	values[4]	14	1			T14	3		T45	1		T244	1
auto[1]	values[6]	values[5]	23	1			T43	3		T259	1		T239	2
auto[1]	values[6]	values[6]	22	1			T16	1		T257	2		T278	1
auto[1]	values[6]	values[7]	26	1			T23	3		T37	1		T292	6
auto[1]	values[7]	values[0]	13	1			T14	3		T177	2		T19	1
auto[1]	values[7]	values[1]	8	1			T201	1		T149	1		T287	1
auto[1]	values[7]	values[2]	16	1			T224	1		T214	2		T288	1
auto[1]	values[7]	values[3]	27	1			T45	1		T293	2		T211	2
auto[1]	values[7]	values[4]	8	1			T204	2		T19	1		T294	4
auto[1]	values[7]	values[5]	8	1			T177	2		T253	1		T291	1
auto[1]	values[7]	values[6]	13	1			T43	1		T207	1		T149	2
auto[1]	values[7]	values[7]	6	1			T44	1		T293	2		T288	1