Group : spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg
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Group : spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv



Summary for Group spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_opcode 6 0 6 100.00 100 1 1 0


Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
read_ops[0x03] 37 1 T84 4 T306 3 T303 6
read_ops[0x0b] 46 1 T78 4 T84 1 T312 3
read_ops[0x3b] 35 1 T78 2 T85 3 T302 1
read_ops[0x6b] 49 1 T78 5 T84 3 T85 5
read_ops[0xbb] 31 1 T84 1 T302 2 T296 1
read_ops[0xeb] 31 1 T78 3 T84 2 T85 2

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%