Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
dashboard | hierarchy | modlist | groups | tests | asserts


Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 66 0 66 100.00
Crosses 128 0 128 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_filtered 2 0 2 100.00 100 1 1 2
cp_opcode 64 0 64 100.00 100 1 1 64


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 128 0 128 100.00 100 1 1 0


Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_filtered

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1570 1 T2 14 T3 1 T11 3
auto[1] 2149 1 T2 14 T3 1 T5 3



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 64 0 64 100.00


Automatically Generated Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] 234 1 T12 4 T44 2 T65 2
auto[4:7] 236 1 T44 2 T22 4 T93 2
auto[8:11] 250 1 T2 2 T12 4 T45 2
auto[12:15] 16 1 T195 2 T75 2 T219 6
auto[16:19] 8 1 T176 2 T193 2 T72 2
auto[20:23] 194 1 T2 2 T45 2 T94 4
auto[24:27] 16 1 T237 2 T232 2 T207 2
auto[28:31] 16 1 T25 2 T281 2 T291 2
auto[32:35] 10 1 T228 2 T350 6 T326 2
auto[36:39] 22 1 T67 2 T73 6 T210 2
auto[40:43] 24 1 T178 2 T176 4 T222 2
auto[44:47] 8 1 T290 2 T343 2 T372 4
auto[48:51] 10 1 T263 4 T350 2 T357 2
auto[52:55] 220 1 T3 2 T44 2 T45 2
auto[56:59] 314 1 T7 3 T58 4 T61 8
auto[60:63] 18 1 T25 2 T189 6 T274 2
auto[64:67] 18 1 T2 2 T12 4 T58 2
auto[68:71] 24 1 T94 2 T66 2 T210 2
auto[72:75] 14 1 T266 2 T181 2 T284 6
auto[76:79] 22 1 T72 4 T258 2 T212 2
auto[80:83] 10 1 T181 2 T191 2 T82 2
auto[84:87] 12 1 T254 2 T222 2 T219 4
auto[88:91] 170 1 T12 6 T45 4 T62 4
auto[92:95] 16 1 T194 4 T373 6 T214 2
auto[96:99] 36 1 T12 2 T58 2 T94 2
auto[100:103] 18 1 T86 2 T228 2 T184 2
auto[104:107] 265 1 T2 4 T12 2 T61 4
auto[108:111] 26 1 T64 2 T254 2 T191 2
auto[112:115] 16 1 T63 2 T64 2 T225 4
auto[116:119] 2 1 T373 2 - - - -
auto[120:123] 14 1 T58 2 T189 2 T239 2
auto[124:127] 10 1 T63 2 T225 2 T326 6
auto[128:131] 6 1 T213 4 T330 2 - -
auto[132:135] 18 1 T189 2 T195 2 T340 4
auto[136:139] 22 1 T94 4 T68 6 T232 4
auto[140:143] 28 1 T11 2 T62 4 T66 2
auto[144:147] 28 1 T63 2 T239 2 T191 2
auto[148:151] 18 1 T65 2 T178 8 T235 2
auto[152:155] 32 1 T63 4 T25 4 T223 2
auto[156:159] 178 1 T2 10 T12 2 T58 2
auto[160:163] 24 1 T12 4 T62 2 T266 6
auto[164:167] 16 1 T58 4 T242 4 T212 2
auto[168:171] 26 1 T176 4 T242 4 T229 2
auto[172:175] 22 1 T79 2 T25 2 T67 2
auto[176:179] 22 1 T64 2 T94 2 T191 4
auto[180:183] 82 1 T22 4 T62 2 T23 2
auto[184:187] 276 1 T178 4 T84 6 T175 8
auto[188:191] 28 1 T58 4 T63 2 T65 4
auto[192:195] 6 1 T176 2 T223 2 T342 2
auto[196:199] 14 1 T2 4 T69 2 T374 6
auto[200:203] 12 1 T12 4 T281 2 T73 2
auto[204:207] 28 1 T63 2 T69 2 T266 2
auto[208:211] 20 1 T11 2 T225 4 T269 6
auto[212:215] 8 1 T225 2 T319 2 T212 4
auto[216:219] 4 1 T190 2 T339 2 - -
auto[220:223] 6 1 T67 2 T286 2 T232 2
auto[224:227] 10 1 T209 2 T195 2 T75 2
auto[228:231] 24 1 T223 6 T279 2 T269 2
auto[232:235] 382 1 T2 4 T5 3 T58 2
auto[236:239] 10 1 T70 4 T194 2 T291 2
auto[240:243] 44 1 T178 2 T222 2 T190 6
auto[244:247] 18 1 T209 2 T286 2 T236 2
auto[248:251] 18 1 T242 6 T266 2 T282 2
auto[252:255] 20 1 T11 2 T254 2 T229 2



Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for cr_all

Bins
cp_opcodecp_filteredCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] auto[0] 73 1 T12 2 T44 1 T65 1
auto[0:3] auto[1] 161 1 T12 2 T44 1 T65 1
auto[4:7] auto[0] 118 1 T44 1 T22 2 T93 1
auto[4:7] auto[1] 118 1 T44 1 T22 2 T93 1
auto[8:11] auto[0] 74 1 T2 1 T12 2 T45 1
auto[8:11] auto[1] 176 1 T2 1 T12 2 T45 1
auto[12:15] auto[0] 8 1 T195 1 T75 1 T219 3
auto[12:15] auto[1] 8 1 T195 1 T75 1 T219 3
auto[16:19] auto[0] 4 1 T176 1 T193 1 T72 1
auto[16:19] auto[1] 4 1 T176 1 T193 1 T72 1
auto[20:23] auto[0] 97 1 T2 1 T45 1 T94 2
auto[20:23] auto[1] 97 1 T2 1 T45 1 T94 2
auto[24:27] auto[0] 8 1 T237 1 T232 1 T207 1
auto[24:27] auto[1] 8 1 T237 1 T232 1 T207 1
auto[28:31] auto[0] 8 1 T25 1 T281 1 T291 1
auto[28:31] auto[1] 8 1 T25 1 T281 1 T291 1
auto[32:35] auto[0] 5 1 T228 1 T350 3 T326 1
auto[32:35] auto[1] 5 1 T228 1 T350 3 T326 1
auto[36:39] auto[0] 11 1 T67 1 T73 3 T210 1
auto[36:39] auto[1] 11 1 T67 1 T73 3 T210 1
auto[40:43] auto[0] 12 1 T178 1 T176 2 T222 1
auto[40:43] auto[1] 12 1 T178 1 T176 2 T222 1
auto[44:47] auto[0] 4 1 T290 1 T343 1 T372 2
auto[44:47] auto[1] 4 1 T290 1 T343 1 T372 2
auto[48:51] auto[0] 5 1 T263 2 T350 1 T357 1
auto[48:51] auto[1] 5 1 T263 2 T350 1 T357 1
auto[52:55] auto[0] 110 1 T3 1 T44 1 T45 1
auto[52:55] auto[1] 110 1 T3 1 T44 1 T45 1
auto[56:59] auto[0] 104 1 T58 2 T45 2 T63 1
auto[56:59] auto[1] 210 1 T7 3 T58 2 T61 8
auto[60:63] auto[0] 9 1 T25 1 T189 3 T274 1
auto[60:63] auto[1] 9 1 T25 1 T189 3 T274 1
auto[64:67] auto[0] 9 1 T2 1 T12 2 T58 1
auto[64:67] auto[1] 9 1 T2 1 T12 2 T58 1
auto[68:71] auto[0] 12 1 T94 1 T66 1 T210 1
auto[68:71] auto[1] 12 1 T94 1 T66 1 T210 1
auto[72:75] auto[0] 7 1 T266 1 T181 1 T284 3
auto[72:75] auto[1] 7 1 T266 1 T181 1 T284 3
auto[76:79] auto[0] 11 1 T72 2 T258 1 T212 1
auto[76:79] auto[1] 11 1 T72 2 T258 1 T212 1
auto[80:83] auto[0] 5 1 T181 1 T191 1 T82 1
auto[80:83] auto[1] 5 1 T181 1 T191 1 T82 1
auto[84:87] auto[0] 6 1 T254 1 T222 1 T219 2
auto[84:87] auto[1] 6 1 T254 1 T222 1 T219 2
auto[88:91] auto[0] 85 1 T12 3 T45 2 T62 2
auto[88:91] auto[1] 85 1 T12 3 T45 2 T62 2
auto[92:95] auto[0] 8 1 T194 2 T373 3 T214 1
auto[92:95] auto[1] 8 1 T194 2 T373 3 T214 1
auto[96:99] auto[0] 18 1 T12 1 T58 1 T94 1
auto[96:99] auto[1] 18 1 T12 1 T58 1 T94 1
auto[100:103] auto[0] 9 1 T86 1 T228 1 T184 1
auto[100:103] auto[1] 9 1 T86 1 T228 1 T184 1
auto[104:107] auto[0] 73 1 T2 2 T12 1 T124 1
auto[104:107] auto[1] 192 1 T2 2 T12 1 T61 4
auto[108:111] auto[0] 13 1 T64 1 T254 1 T191 1
auto[108:111] auto[1] 13 1 T64 1 T254 1 T191 1
auto[112:115] auto[0] 8 1 T63 1 T64 1 T225 2
auto[112:115] auto[1] 8 1 T63 1 T64 1 T225 2
auto[116:119] auto[0] 1 1 T373 1 - - - -
auto[116:119] auto[1] 1 1 T373 1 - - - -
auto[120:123] auto[0] 7 1 T58 1 T189 1 T239 1
auto[120:123] auto[1] 7 1 T58 1 T189 1 T239 1
auto[124:127] auto[0] 5 1 T63 1 T225 1 T326 3
auto[124:127] auto[1] 5 1 T63 1 T225 1 T326 3
auto[128:131] auto[0] 3 1 T213 2 T330 1 - -
auto[128:131] auto[1] 3 1 T213 2 T330 1 - -
auto[132:135] auto[0] 9 1 T189 1 T195 1 T340 2
auto[132:135] auto[1] 9 1 T189 1 T195 1 T340 2
auto[136:139] auto[0] 11 1 T94 2 T68 3 T232 2
auto[136:139] auto[1] 11 1 T94 2 T68 3 T232 2
auto[140:143] auto[0] 14 1 T11 1 T62 2 T66 1
auto[140:143] auto[1] 14 1 T11 1 T62 2 T66 1
auto[144:147] auto[0] 14 1 T63 1 T239 1 T191 1
auto[144:147] auto[1] 14 1 T63 1 T239 1 T191 1
auto[148:151] auto[0] 9 1 T65 1 T178 4 T235 1
auto[148:151] auto[1] 9 1 T65 1 T178 4 T235 1
auto[152:155] auto[0] 16 1 T63 2 T25 2 T223 1
auto[152:155] auto[1] 16 1 T63 2 T25 2 T223 1
auto[156:159] auto[0] 89 1 T2 5 T12 1 T58 1
auto[156:159] auto[1] 89 1 T2 5 T12 1 T58 1
auto[160:163] auto[0] 12 1 T12 2 T62 1 T266 3
auto[160:163] auto[1] 12 1 T12 2 T62 1 T266 3
auto[164:167] auto[0] 8 1 T58 2 T242 2 T212 1
auto[164:167] auto[1] 8 1 T58 2 T242 2 T212 1
auto[168:171] auto[0] 13 1 T176 2 T242 2 T229 1
auto[168:171] auto[1] 13 1 T176 2 T242 2 T229 1
auto[172:175] auto[0] 11 1 T79 1 T25 1 T67 1
auto[172:175] auto[1] 11 1 T79 1 T25 1 T67 1
auto[176:179] auto[0] 11 1 T64 1 T94 1 T191 2
auto[176:179] auto[1] 11 1 T64 1 T94 1 T191 2
auto[180:183] auto[0] 41 1 T22 2 T62 1 T23 1
auto[180:183] auto[1] 41 1 T22 2 T62 1 T23 1
auto[184:187] auto[0] 95 1 T178 2 T175 4 T189 5
auto[184:187] auto[1] 181 1 T178 2 T84 6 T175 4
auto[188:191] auto[0] 14 1 T58 2 T63 1 T65 2
auto[188:191] auto[1] 14 1 T58 2 T63 1 T65 2
auto[192:195] auto[0] 3 1 T176 1 T223 1 T342 1
auto[192:195] auto[1] 3 1 T176 1 T223 1 T342 1
auto[196:199] auto[0] 7 1 T2 2 T69 1 T374 3
auto[196:199] auto[1] 7 1 T2 2 T69 1 T374 3
auto[200:203] auto[0] 6 1 T12 2 T281 1 T73 1
auto[200:203] auto[1] 6 1 T12 2 T281 1 T73 1
auto[204:207] auto[0] 14 1 T63 1 T69 1 T266 1
auto[204:207] auto[1] 14 1 T63 1 T69 1 T266 1
auto[208:211] auto[0] 10 1 T11 1 T225 2 T269 3
auto[208:211] auto[1] 10 1 T11 1 T225 2 T269 3
auto[212:215] auto[0] 4 1 T225 1 T319 1 T212 2
auto[212:215] auto[1] 4 1 T225 1 T319 1 T212 2
auto[216:219] auto[0] 2 1 T190 1 T339 1 - -
auto[216:219] auto[1] 2 1 T190 1 T339 1 - -
auto[220:223] auto[0] 3 1 T67 1 T286 1 T232 1
auto[220:223] auto[1] 3 1 T67 1 T286 1 T232 1
auto[224:227] auto[0] 5 1 T209 1 T195 1 T75 1
auto[224:227] auto[1] 5 1 T209 1 T195 1 T75 1
auto[228:231] auto[0] 12 1 T223 3 T279 1 T269 1
auto[228:231] auto[1] 12 1 T223 3 T279 1 T269 1
auto[232:235] auto[0] 152 1 T2 2 T58 1 T45 3
auto[232:235] auto[1] 230 1 T2 2 T5 3 T58 1
auto[236:239] auto[0] 5 1 T70 2 T194 1 T291 1
auto[236:239] auto[1] 5 1 T70 2 T194 1 T291 1
auto[240:243] auto[0] 22 1 T178 1 T222 1 T190 3
auto[240:243] auto[1] 22 1 T178 1 T222 1 T190 3
auto[244:247] auto[0] 9 1 T209 1 T286 1 T236 1
auto[244:247] auto[1] 9 1 T209 1 T286 1 T236 1
auto[248:251] auto[0] 9 1 T242 3 T266 1 T282 1
auto[248:251] auto[1] 9 1 T242 3 T266 1 T282 1
auto[252:255] auto[0] 10 1 T11 1 T254 1 T229 1
auto[252:255] auto[1] 10 1 T11 1 T254 1 T229 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%