Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1614

1

T3

7

T4

3

T5

9

auto[1]

2158

1

T3

7

T4

3

T5

9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	255	1			T3	4		T8	2		T12	4
auto[4:7]	299	1			T3	2		T4	2		T5	2
auto[8:11]	267	1			T5	6		T9	2		T11	1
auto[12:15]	12	1			T232	2		T279	2		T257	4
auto[16:19]	18	1			T200	4		T91	2		T353	2
auto[20:23]	155	1			T4	2		T10	4		T12	6
auto[24:27]	24	1			T10	4		T187	4		T200	8
auto[28:31]	11	1			T248	2		T27	3		T29	2
auto[32:35]	8	1			T214	2		T199	4		T273	2
auto[36:39]	12	1			T279	2		T293	2		T215	2
auto[40:43]	14	1			T233	2		T85	2		T270	2
auto[44:47]	18	1			T82	2		T232	2		T237	4
auto[48:51]	30	1			T78	2		T251	2		T304	2
auto[52:55]	196	1			T12	4		T183	2		T96	2
auto[56:59]	272	1			T5	2		T8	9		T11	4
auto[60:63]	12	1			T26	4		T248	2		T256	2
auto[64:67]	20	1			T73	8		T85	2		T204	2
auto[68:71]	16	1			T79	2		T73	2		T232	2
auto[72:75]	14	1			T10	2		T260	4		T86	2
auto[76:79]	17	1			T83	4		T27	3		T287	2
auto[80:83]	28	1			T80	2		T303	4		T275	2
auto[84:87]	16	1			T73	4		T325	2		T213	2
auto[88:91]	182	1			T5	2		T10	2		T98	2
auto[92:95]	8	1			T91	4		T228	2		T268	2
auto[96:99]	26	1			T10	8		T78	2		T278	2
auto[100:103]	12	1			T4	2		T190	2		T87	2
auto[104:107]	263	1			T3	2		T72	2		T81	4
auto[108:111]	28	1			T187	2		T259	6		T290	2
auto[112:115]	8	1			T260	2		T247	2		T298	2
auto[116:119]	22	1			T303	6		T84	2		T87	2
auto[120:123]	28	1			T9	4		T80	2		T262	2
auto[124:127]	18	1			T9	2		T260	2		T53	2
auto[128:131]	20	1			T5	4		T186	4		T303	2
auto[132:135]	12	1			T26	2		T187	6		T347	2
auto[136:139]	18	1			T83	2		T284	2		T214	2
auto[140:143]	20	1			T79	2		T236	2		T217	4
auto[144:147]	16	1			T80	2		T207	4		T296	8
auto[148:151]	4	1			T353	2		T288	2		-	-
auto[152:155]	26	1			T71	2		T74	2		T207	4
auto[156:159]	220	1			T71	2		T44	8		T72	2
auto[160:163]	12	1			T75	2		T53	2		T205	2
auto[164:167]	18	1			T207	2		T236	2		T214	2
auto[168:171]	20	1			T26	4		T77	2		T304	2
auto[172:175]	12	1			T291	2		T252	2		T334	4
auto[176:179]	36	1			T29	2		T84	8		T239	4
auto[180:183]	93	1			T26	2		T24	6		T27	1
auto[184:187]	280	1			T3	6		T5	2		T8	1
auto[188:191]	31	1			T27	1		T260	4		T278	4
auto[192:195]	31	1			T27	1		T249	6		T228	4
auto[196:199]	36	1			T10	2		T96	2		T80	2
auto[200:203]	29	1			T27	1		T249	6		T75	2
auto[204:207]	20	1			T278	6		T214	4		T340	4
auto[208:211]	18	1			T284	4		T27	2		T249	4
auto[212:215]	16	1			T71	4		T77	2		T304	4
auto[216:219]	14	1			T278	2		T200	2		T304	6
auto[220:223]	22	1			T81	6		T251	2		T76	2
auto[224:227]	12	1			T248	2		T278	4		T77	2
auto[228:231]	14	1			T72	2		T233	2		T275	6
auto[232:235]	335	1			T8	9		T10	2		T12	6
auto[236:239]	14	1			T72	2		T76	4		T214	2
auto[240:243]	10	1			T82	2		T240	2		T338	2
auto[244:247]	8	1			T77	2		T304	4		T300	2
auto[248:251]	18	1			T84	4		T204	2		T296	2
auto[252:255]	28	1			T81	4		T232	2		T83	6

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	82	1			T3	2		T12	2		T82	2
auto[0:3]	auto[1]	173	1			T3	2		T8	2		T12	2
auto[4:7]	auto[0]	149	1			T3	1		T4	1		T5	1
auto[4:7]	auto[1]	150	1			T3	1		T4	1		T5	1
auto[8:11]	auto[0]	86	1			T5	3		T9	1		T78	1
auto[8:11]	auto[1]	181	1			T5	3		T9	1		T11	1
auto[12:15]	auto[0]	6	1			T232	1		T279	1		T257	2
auto[12:15]	auto[1]	6	1			T232	1		T279	1		T257	2
auto[16:19]	auto[0]	9	1			T200	2		T91	1		T353	1
auto[16:19]	auto[1]	9	1			T200	2		T91	1		T353	1
auto[20:23]	auto[0]	77	1			T4	1		T10	2		T12	3
auto[20:23]	auto[1]	78	1			T4	1		T10	2		T12	3
auto[24:27]	auto[0]	12	1			T10	2		T187	2		T200	4
auto[24:27]	auto[1]	12	1			T10	2		T187	2		T200	4
auto[28:31]	auto[0]	4	1			T248	1		T29	1		T205	1
auto[28:31]	auto[1]	7	1			T248	1		T27	3		T29	1
auto[32:35]	auto[0]	4	1			T214	1		T199	2		T273	1
auto[32:35]	auto[1]	4	1			T214	1		T199	2		T273	1
auto[36:39]	auto[0]	6	1			T279	1		T293	1		T215	1
auto[36:39]	auto[1]	6	1			T279	1		T293	1		T215	1
auto[40:43]	auto[0]	7	1			T233	1		T85	1		T270	1
auto[40:43]	auto[1]	7	1			T233	1		T85	1		T270	1
auto[44:47]	auto[0]	9	1			T82	1		T232	1		T237	2
auto[44:47]	auto[1]	9	1			T82	1		T232	1		T237	2
auto[48:51]	auto[0]	15	1			T78	1		T251	1		T304	1
auto[48:51]	auto[1]	15	1			T78	1		T251	1		T304	1
auto[52:55]	auto[0]	97	1			T12	2		T183	1		T96	1
auto[52:55]	auto[1]	99	1			T12	2		T183	1		T96	1
auto[56:59]	auto[0]	90	1			T5	1		T95	1		T96	1
auto[56:59]	auto[1]	182	1			T5	1		T8	9		T11	4
auto[60:63]	auto[0]	6	1			T26	2		T248	1		T256	1
auto[60:63]	auto[1]	6	1			T26	2		T248	1		T256	1
auto[64:67]	auto[0]	10	1			T73	4		T85	1		T204	1
auto[64:67]	auto[1]	10	1			T73	4		T85	1		T204	1
auto[68:71]	auto[0]	8	1			T79	1		T73	1		T232	1
auto[68:71]	auto[1]	8	1			T79	1		T73	1		T232	1
auto[72:75]	auto[0]	7	1			T10	1		T260	2		T86	1
auto[72:75]	auto[1]	7	1			T10	1		T260	2		T86	1
auto[76:79]	auto[0]	7	1			T83	2		T287	1		T211	1
auto[76:79]	auto[1]	10	1			T83	2		T27	3		T287	1
auto[80:83]	auto[0]	14	1			T80	1		T303	2		T275	1
auto[80:83]	auto[1]	14	1			T80	1		T303	2		T275	1
auto[84:87]	auto[0]	8	1			T73	2		T325	1		T213	1
auto[84:87]	auto[1]	8	1			T73	2		T325	1		T213	1
auto[88:91]	auto[0]	91	1			T5	1		T10	1		T98	1
auto[88:91]	auto[1]	91	1			T5	1		T10	1		T98	1
auto[92:95]	auto[0]	4	1			T91	2		T228	1		T268	1
auto[92:95]	auto[1]	4	1			T91	2		T228	1		T268	1
auto[96:99]	auto[0]	13	1			T10	4		T78	1		T278	1
auto[96:99]	auto[1]	13	1			T10	4		T78	1		T278	1
auto[100:103]	auto[0]	6	1			T4	1		T190	1		T87	1
auto[100:103]	auto[1]	6	1			T4	1		T190	1		T87	1
auto[104:107]	auto[0]	90	1			T3	1		T72	1		T81	2
auto[104:107]	auto[1]	173	1			T3	1		T72	1		T81	2
auto[108:111]	auto[0]	14	1			T187	1		T259	3		T290	1
auto[108:111]	auto[1]	14	1			T187	1		T259	3		T290	1
auto[112:115]	auto[0]	4	1			T260	1		T247	1		T298	1
auto[112:115]	auto[1]	4	1			T260	1		T247	1		T298	1
auto[116:119]	auto[0]	11	1			T303	3		T84	1		T87	1
auto[116:119]	auto[1]	11	1			T303	3		T84	1		T87	1
auto[120:123]	auto[0]	14	1			T9	2		T80	1		T262	1
auto[120:123]	auto[1]	14	1			T9	2		T80	1		T262	1
auto[124:127]	auto[0]	9	1			T9	1		T260	1		T53	1
auto[124:127]	auto[1]	9	1			T9	1		T260	1		T53	1
auto[128:131]	auto[0]	10	1			T5	2		T186	2		T303	1
auto[128:131]	auto[1]	10	1			T5	2		T186	2		T303	1
auto[132:135]	auto[0]	6	1			T26	1		T187	3		T347	1
auto[132:135]	auto[1]	6	1			T26	1		T187	3		T347	1
auto[136:139]	auto[0]	9	1			T83	1		T284	1		T214	1
auto[136:139]	auto[1]	9	1			T83	1		T284	1		T214	1
auto[140:143]	auto[0]	10	1			T79	1		T236	1		T217	2
auto[140:143]	auto[1]	10	1			T79	1		T236	1		T217	2
auto[144:147]	auto[0]	8	1			T80	1		T207	2		T296	4
auto[144:147]	auto[1]	8	1			T80	1		T207	2		T296	4
auto[148:151]	auto[0]	2	1			T353	1		T288	1		-	-
auto[148:151]	auto[1]	2	1			T353	1		T288	1		-	-
auto[152:155]	auto[0]	13	1			T71	1		T74	1		T207	2
auto[152:155]	auto[1]	13	1			T71	1		T74	1		T207	2
auto[156:159]	auto[0]	110	1			T71	1		T44	4		T72	1
auto[156:159]	auto[1]	110	1			T71	1		T44	4		T72	1
auto[160:163]	auto[0]	6	1			T75	1		T53	1		T205	1
auto[160:163]	auto[1]	6	1			T75	1		T53	1		T205	1
auto[164:167]	auto[0]	9	1			T207	1		T236	1		T214	1
auto[164:167]	auto[1]	9	1			T207	1		T236	1		T214	1
auto[168:171]	auto[0]	10	1			T26	2		T77	1		T304	1
auto[168:171]	auto[1]	10	1			T26	2		T77	1		T304	1
auto[172:175]	auto[0]	6	1			T291	1		T252	1		T334	2
auto[172:175]	auto[1]	6	1			T291	1		T252	1		T334	2
auto[176:179]	auto[0]	18	1			T29	1		T84	4		T239	2
auto[176:179]	auto[1]	18	1			T29	1		T84	4		T239	2
auto[180:183]	auto[0]	46	1			T26	1		T24	3		T275	2
auto[180:183]	auto[1]	47	1			T26	1		T24	3		T27	1
auto[184:187]	auto[0]	91	1			T3	3		T5	1		T9	1
auto[184:187]	auto[1]	189	1			T3	3		T5	1		T8	1
auto[188:191]	auto[0]	15	1			T260	2		T278	2		T76	2
auto[188:191]	auto[1]	16	1			T27	1		T260	2		T278	2
auto[192:195]	auto[0]	15	1			T249	3		T228	2		T202	4
auto[192:195]	auto[1]	16	1			T27	1		T249	3		T228	2
auto[196:199]	auto[0]	18	1			T10	1		T96	1		T80	1
auto[196:199]	auto[1]	18	1			T10	1		T96	1		T80	1
auto[200:203]	auto[0]	14	1			T249	3		T75	1		T261	1
auto[200:203]	auto[1]	15	1			T27	1		T249	3		T75	1
auto[204:207]	auto[0]	10	1			T278	3		T214	2		T340	2
auto[204:207]	auto[1]	10	1			T278	3		T214	2		T340	2
auto[208:211]	auto[0]	8	1			T284	2		T249	2		T290	1
auto[208:211]	auto[1]	10	1			T284	2		T27	2		T249	2
auto[212:215]	auto[0]	8	1			T71	2		T77	1		T304	2
auto[212:215]	auto[1]	8	1			T71	2		T77	1		T304	2
auto[216:219]	auto[0]	7	1			T278	1		T200	1		T304	3
auto[216:219]	auto[1]	7	1			T278	1		T200	1		T304	3
auto[220:223]	auto[0]	11	1			T81	3		T251	1		T76	1
auto[220:223]	auto[1]	11	1			T81	3		T251	1		T76	1
auto[224:227]	auto[0]	6	1			T248	1		T278	2		T77	1
auto[224:227]	auto[1]	6	1			T248	1		T278	2		T77	1
auto[228:231]	auto[0]	7	1			T72	1		T233	1		T275	3
auto[228:231]	auto[1]	7	1			T72	1		T233	1		T275	3
auto[232:235]	auto[0]	133	1			T10	1		T12	3		T72	1
auto[232:235]	auto[1]	202	1			T8	9		T10	1		T12	3
auto[236:239]	auto[0]	7	1			T72	1		T76	2		T214	1
auto[236:239]	auto[1]	7	1			T72	1		T76	2		T214	1
auto[240:243]	auto[0]	5	1			T82	1		T240	1		T338	1
auto[240:243]	auto[1]	5	1			T82	1		T240	1		T338	1
auto[244:247]	auto[0]	4	1			T77	1		T304	2		T300	1
auto[244:247]	auto[1]	4	1			T77	1		T304	2		T300	1
auto[248:251]	auto[0]	9	1			T84	2		T204	1		T296	1
auto[248:251]	auto[1]	9	1			T84	2		T204	1		T296	1
auto[252:255]	auto[0]	14	1			T81	2		T232	1		T83	3
auto[252:255]	auto[1]	14	1			T81	2		T232	1		T83	3