Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1650

1

T2

10

T3

1

T4

3

auto[1]

2229

1

T2

10

T3

1

T4

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	282	1			T2	4		T4	2		T36	4
auto[4:7]	224	1			T2	2		T4	4		T5	4
auto[8:11]	268	1			T9	2		T64	2		T100	4
auto[12:15]	20	1			T2	2		T100	2		T212	2
auto[16:19]	32	1			T2	2		T227	2		T215	2
auto[20:23]	198	1			T2	2		T36	2		T64	4
auto[24:27]	14	1			T216	2		T271	2		T182	4
auto[28:31]	20	1			T224	4		T75	4		T216	2
auto[32:35]	24	1			T26	2		T85	8		T245	2
auto[36:39]	12	1			T212	4		T209	4		T341	2
auto[40:43]	16	1			T78	2		T182	2		T265	2
auto[44:47]	6	1			T78	2		T236	2		T246	2
auto[48:51]	36	1			T26	2		T170	4		T76	6
auto[52:55]	246	1			T5	4		T71	2		T65	2
auto[56:59]	335	1			T68	2		T37	4		T82	5
auto[60:63]	28	1			T64	2		T65	4		T230	4
auto[64:67]	20	1			T200	4		T232	4		T272	2
auto[68:71]	10	1			T73	4		T217	2		T328	2
auto[72:75]	12	1			T68	2		T65	2		T70	2
auto[76:79]	18	1			T65	8		T240	2		T316	2
auto[80:83]	16	1			T64	4		T52	2		T230	2
auto[84:87]	18	1			T74	2		T260	2		T184	6
auto[88:91]	238	1			T5	4		T68	2		T72	2
auto[92:95]	24	1			T64	4		T71	2		T227	4
auto[96:99]	24	1			T2	2		T64	2		T168	2
auto[100:103]	30	1			T74	2		T70	2		T227	2
auto[104:107]	272	1			T5	2		T87	5		T68	2
auto[108:111]	14	1			T173	2		T232	2		T260	8
auto[112:115]	30	1			T73	4		T74	4		T252	2
auto[116:119]	20	1			T273	4		T79	2		T272	4
auto[120:123]	14	1			T215	4		T184	2		T263	2
auto[124:127]	10	1			T230	4		T335	2		T325	4
auto[128:131]	26	1			T74	2		T69	6		T173	6
auto[132:135]	26	1			T73	2		T276	4		T328	2
auto[136:139]	4	1			T215	2		T206	2		-	-
auto[140:143]	30	1			T170	2		T232	4		T272	2
auto[144:147]	16	1			T72	2		T224	2		T218	4
auto[148:151]	14	1			T73	2		T304	4		T194	2
auto[152:155]	6	1			T72	2		T191	4		-	-
auto[156:159]	208	1			T3	2		T5	2		T12	2
auto[160:163]	12	1			T74	2		T256	4		T70	2
auto[164:167]	26	1			T12	2		T100	4		T252	2
auto[168:171]	20	1			T2	4		T65	6		T78	4
auto[172:175]	12	1			T73	4		T189	4		T344	2
auto[176:179]	16	1			T36	2		T69	2		T281	2
auto[180:183]	80	1			T5	2		T11	2		T25	4
auto[184:187]	248	1			T9	4		T12	4		T72	4
auto[188:191]	18	1			T12	2		T71	2		T213	2
auto[192:195]	24	1			T5	4		T64	4		T52	2
auto[196:199]	20	1			T72	4		T75	4		T172	2
auto[200:203]	2	1			T224	2		-	-		-	-
auto[204:207]	22	1			T167	2		T244	4		T182	2
auto[208:211]	6	1			T77	2		T373	4		-	-
auto[212:215]	14	1			T36	2		T71	2		T318	4
auto[216:219]	12	1			T276	2		T216	2		T212	2
auto[220:223]	12	1			T66	2		T167	4		T194	2
auto[224:227]	12	1			T66	2		T173	2		T79	2
auto[228:231]	10	1			T68	2		T71	2		T76	2
auto[232:235]	386	1			T2	2		T5	4		T8	4
auto[236:239]	6	1			T71	2		T66	2		T318	2
auto[240:243]	10	1			T209	2		T220	2		T341	2
auto[244:247]	20	1			T66	4		T227	2		T319	2
auto[248:251]	14	1			T224	4		T273	2		T268	2
auto[252:255]	16	1			T250	2		T184	2		T331	4

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	89	1			T2	2		T4	1		T36	2
auto[0:3]	auto[1]	193	1			T2	2		T4	1		T36	2
auto[4:7]	auto[0]	112	1			T2	1		T4	2		T5	2
auto[4:7]	auto[1]	112	1			T2	1		T4	2		T5	2
auto[8:11]	auto[0]	81	1			T9	1		T64	1		T100	2
auto[8:11]	auto[1]	187	1			T9	1		T64	1		T100	2
auto[12:15]	auto[0]	10	1			T2	1		T100	1		T212	1
auto[12:15]	auto[1]	10	1			T2	1		T100	1		T212	1
auto[16:19]	auto[0]	16	1			T2	1		T227	1		T215	1
auto[16:19]	auto[1]	16	1			T2	1		T227	1		T215	1
auto[20:23]	auto[0]	99	1			T2	1		T36	1		T64	2
auto[20:23]	auto[1]	99	1			T2	1		T36	1		T64	2
auto[24:27]	auto[0]	7	1			T216	1		T271	1		T182	2
auto[24:27]	auto[1]	7	1			T216	1		T271	1		T182	2
auto[28:31]	auto[0]	10	1			T224	2		T75	2		T216	1
auto[28:31]	auto[1]	10	1			T224	2		T75	2		T216	1
auto[32:35]	auto[0]	12	1			T26	1		T85	4		T245	1
auto[32:35]	auto[1]	12	1			T26	1		T85	4		T245	1
auto[36:39]	auto[0]	6	1			T212	2		T209	2		T341	1
auto[36:39]	auto[1]	6	1			T212	2		T209	2		T341	1
auto[40:43]	auto[0]	8	1			T78	1		T182	1		T265	1
auto[40:43]	auto[1]	8	1			T78	1		T182	1		T265	1
auto[44:47]	auto[0]	3	1			T78	1		T236	1		T246	1
auto[44:47]	auto[1]	3	1			T78	1		T236	1		T246	1
auto[48:51]	auto[0]	18	1			T26	1		T170	2		T76	3
auto[48:51]	auto[1]	18	1			T26	1		T170	2		T76	3
auto[52:55]	auto[0]	123	1			T5	2		T71	1		T65	1
auto[52:55]	auto[1]	123	1			T5	2		T71	1		T65	1
auto[56:59]	auto[0]	115	1			T68	1		T37	2		T96	2
auto[56:59]	auto[1]	220	1			T68	1		T37	2		T82	5
auto[60:63]	auto[0]	14	1			T64	1		T65	2		T230	2
auto[60:63]	auto[1]	14	1			T64	1		T65	2		T230	2
auto[64:67]	auto[0]	10	1			T200	2		T232	2		T272	1
auto[64:67]	auto[1]	10	1			T200	2		T232	2		T272	1
auto[68:71]	auto[0]	5	1			T73	2		T217	1		T328	1
auto[68:71]	auto[1]	5	1			T73	2		T217	1		T328	1
auto[72:75]	auto[0]	6	1			T68	1		T65	1		T70	1
auto[72:75]	auto[1]	6	1			T68	1		T65	1		T70	1
auto[76:79]	auto[0]	9	1			T65	4		T240	1		T316	1
auto[76:79]	auto[1]	9	1			T65	4		T240	1		T316	1
auto[80:83]	auto[0]	8	1			T64	2		T52	1		T230	1
auto[80:83]	auto[1]	8	1			T64	2		T52	1		T230	1
auto[84:87]	auto[0]	9	1			T74	1		T260	1		T184	3
auto[84:87]	auto[1]	9	1			T74	1		T260	1		T184	3
auto[88:91]	auto[0]	119	1			T5	2		T68	1		T72	1
auto[88:91]	auto[1]	119	1			T5	2		T68	1		T72	1
auto[92:95]	auto[0]	12	1			T64	2		T71	1		T227	2
auto[92:95]	auto[1]	12	1			T64	2		T71	1		T227	2
auto[96:99]	auto[0]	12	1			T2	1		T64	1		T168	1
auto[96:99]	auto[1]	12	1			T2	1		T64	1		T168	1
auto[100:103]	auto[0]	15	1			T74	1		T70	1		T227	1
auto[100:103]	auto[1]	15	1			T74	1		T70	1		T227	1
auto[104:107]	auto[0]	90	1			T5	1		T68	1		T74	1
auto[104:107]	auto[1]	182	1			T5	1		T87	5		T68	1
auto[108:111]	auto[0]	7	1			T173	1		T232	1		T260	4
auto[108:111]	auto[1]	7	1			T173	1		T232	1		T260	4
auto[112:115]	auto[0]	15	1			T73	2		T74	2		T252	1
auto[112:115]	auto[1]	15	1			T73	2		T74	2		T252	1
auto[116:119]	auto[0]	10	1			T273	2		T79	1		T272	2
auto[116:119]	auto[1]	10	1			T273	2		T79	1		T272	2
auto[120:123]	auto[0]	7	1			T215	2		T184	1		T263	1
auto[120:123]	auto[1]	7	1			T215	2		T184	1		T263	1
auto[124:127]	auto[0]	5	1			T230	2		T335	1		T325	2
auto[124:127]	auto[1]	5	1			T230	2		T335	1		T325	2
auto[128:131]	auto[0]	13	1			T74	1		T69	3		T173	3
auto[128:131]	auto[1]	13	1			T74	1		T69	3		T173	3
auto[132:135]	auto[0]	13	1			T73	1		T276	2		T328	1
auto[132:135]	auto[1]	13	1			T73	1		T276	2		T328	1
auto[136:139]	auto[0]	2	1			T215	1		T206	1		-	-
auto[136:139]	auto[1]	2	1			T215	1		T206	1		-	-
auto[140:143]	auto[0]	15	1			T170	1		T232	2		T272	1
auto[140:143]	auto[1]	15	1			T170	1		T232	2		T272	1
auto[144:147]	auto[0]	8	1			T72	1		T224	1		T218	2
auto[144:147]	auto[1]	8	1			T72	1		T224	1		T218	2
auto[148:151]	auto[0]	7	1			T73	1		T304	2		T194	1
auto[148:151]	auto[1]	7	1			T73	1		T304	2		T194	1
auto[152:155]	auto[0]	3	1			T72	1		T191	2		-	-
auto[152:155]	auto[1]	3	1			T72	1		T191	2		-	-
auto[156:159]	auto[0]	104	1			T3	1		T5	1		T12	1
auto[156:159]	auto[1]	104	1			T3	1		T5	1		T12	1
auto[160:163]	auto[0]	6	1			T74	1		T256	2		T70	1
auto[160:163]	auto[1]	6	1			T74	1		T256	2		T70	1
auto[164:167]	auto[0]	13	1			T12	1		T100	2		T252	1
auto[164:167]	auto[1]	13	1			T12	1		T100	2		T252	1
auto[168:171]	auto[0]	10	1			T2	2		T65	3		T78	2
auto[168:171]	auto[1]	10	1			T2	2		T65	3		T78	2
auto[172:175]	auto[0]	6	1			T73	2		T189	2		T344	1
auto[172:175]	auto[1]	6	1			T73	2		T189	2		T344	1
auto[176:179]	auto[0]	8	1			T36	1		T69	1		T281	1
auto[176:179]	auto[1]	8	1			T36	1		T69	1		T281	1
auto[180:183]	auto[0]	40	1			T5	1		T11	1		T25	2
auto[180:183]	auto[1]	40	1			T5	1		T11	1		T25	2
auto[184:187]	auto[0]	80	1			T9	2		T12	2		T72	2
auto[184:187]	auto[1]	168	1			T9	2		T12	2		T72	2
auto[188:191]	auto[0]	9	1			T12	1		T71	1		T213	1
auto[188:191]	auto[1]	9	1			T12	1		T71	1		T213	1
auto[192:195]	auto[0]	12	1			T5	2		T64	2		T52	1
auto[192:195]	auto[1]	12	1			T5	2		T64	2		T52	1
auto[196:199]	auto[0]	10	1			T72	2		T75	2		T172	1
auto[196:199]	auto[1]	10	1			T72	2		T75	2		T172	1
auto[200:203]	auto[0]	1	1			T224	1		-	-		-	-
auto[200:203]	auto[1]	1	1			T224	1		-	-		-	-
auto[204:207]	auto[0]	11	1			T167	1		T244	2		T182	1
auto[204:207]	auto[1]	11	1			T167	1		T244	2		T182	1
auto[208:211]	auto[0]	3	1			T77	1		T373	2		-	-
auto[208:211]	auto[1]	3	1			T77	1		T373	2		-	-
auto[212:215]	auto[0]	7	1			T36	1		T71	1		T318	2
auto[212:215]	auto[1]	7	1			T36	1		T71	1		T318	2
auto[216:219]	auto[0]	6	1			T276	1		T216	1		T212	1
auto[216:219]	auto[1]	6	1			T276	1		T216	1		T212	1
auto[220:223]	auto[0]	6	1			T66	1		T167	2		T194	1
auto[220:223]	auto[1]	6	1			T66	1		T167	2		T194	1
auto[224:227]	auto[0]	6	1			T66	1		T173	1		T79	1
auto[224:227]	auto[1]	6	1			T66	1		T173	1		T79	1
auto[228:231]	auto[0]	5	1			T68	1		T71	1		T76	1
auto[228:231]	auto[1]	5	1			T68	1		T71	1		T76	1
auto[232:235]	auto[0]	151	1			T2	1		T5	2		T8	2
auto[232:235]	auto[1]	235	1			T2	1		T5	2		T8	2
auto[236:239]	auto[0]	3	1			T71	1		T66	1		T318	1
auto[236:239]	auto[1]	3	1			T71	1		T66	1		T318	1
auto[240:243]	auto[0]	5	1			T209	1		T220	1		T341	1
auto[240:243]	auto[1]	5	1			T209	1		T220	1		T341	1
auto[244:247]	auto[0]	10	1			T66	2		T227	1		T319	1
auto[244:247]	auto[1]	10	1			T66	2		T227	1		T319	1
auto[248:251]	auto[0]	7	1			T224	2		T273	1		T268	1
auto[248:251]	auto[1]	7	1			T224	2		T273	1		T268	1
auto[252:255]	auto[0]	8	1			T250	1		T184	1		T331	2
auto[252:255]	auto[1]	8	1			T250	1		T184	1		T331	2