Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1658

1

T2

4

T3

13

T6

1

auto[1]

2157

1

T2

4

T3

13

T6

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	258	1			T4	2		T8	2		T9	6
auto[4:7]	328	1			T3	4		T66	2		T72	2
auto[8:11]	223	1			T90	4		T95	8		T31	2
auto[12:15]	16	1			T243	4		T84	4		T190	2
auto[16:19]	18	1			T82	2		T78	8		T199	2
auto[20:23]	138	1			T2	2		T3	8		T47	4
auto[24:27]	34	1			T73	10		T188	2		T243	2
auto[28:31]	28	1			T74	2		T247	4		T86	4
auto[32:35]	16	1			T28	2		T81	2		T79	2
auto[36:39]	22	1			T72	2		T231	2		T318	4
auto[40:43]	16	1			T74	2		T188	2		T281	2
auto[44:47]	24	1			T62	2		T217	2		T226	8
auto[48:51]	22	1			T74	2		T281	2		T237	2
auto[52:55]	170	1			T6	2		T102	4		T75	2
auto[56:59]	334	1			T9	6		T72	2		T90	3
auto[60:63]	24	1			T216	2		T218	4		T226	2
auto[64:67]	24	1			T80	2		T216	2		T189	2
auto[68:71]	18	1			T76	6		T187	2		T320	2
auto[72:75]	14	1			T73	4		T185	2		T216	2
auto[76:79]	16	1			T190	4		T223	2		T210	2
auto[80:83]	24	1			T76	6		T249	2		T268	2
auto[84:87]	8	1			T66	4		T318	2		T263	2
auto[88:91]	184	1			T3	8		T66	6		T72	2
auto[92:95]	14	1			T249	2		T211	2		T285	2
auto[96:99]	22	1			T72	2		T187	2		T235	2
auto[100:103]	18	1			T28	2		T76	4		T244	4
auto[104:107]	218	1			T9	4		T11	2		T90	3
auto[108:111]	10	1			T62	2		T232	2		T338	2
auto[112:115]	22	1			T78	4		T205	2		T198	2
auto[116:119]	12	1			T247	4		T265	2		T272	4
auto[120:123]	32	1			T216	4		T231	10		T217	6
auto[124:127]	20	1			T29	6		T218	6		T343	8
auto[128:131]	12	1			T187	2		T283	2		T223	2
auto[132:135]	22	1			T85	8		T340	2		T62	2
auto[136:139]	12	1			T185	2		T269	6		T290	4
auto[140:143]	28	1			T73	2		T105	2		T76	2
auto[144:147]	34	1			T66	2		T73	2		T28	2
auto[148:151]	6	1			T74	2		T235	2		T323	2
auto[152:155]	22	1			T216	6		T206	2		T87	4
auto[156:159]	194	1			T2	6		T3	6		T4	2
auto[160:163]	12	1			T267	2		T88	2		T255	2
auto[164:167]	38	1			T77	8		T76	2		T243	2
auto[168:171]	20	1			T72	2		T198	8		T280	10
auto[172:175]	10	1			T31	2		T292	2		T342	2
auto[176:179]	18	1			T84	4		T247	2		T334	10
auto[180:183]	124	1			T28	4		T29	2		T30	2
auto[184:187]	289	1			T95	6		T166	3		T167	2
auto[188:191]	2	1			T284	2		-	-		-	-
auto[192:195]	22	1			T74	2		T233	2		T272	2
auto[196:199]	16	1			T243	2		T223	4		T255	2
auto[200:203]	16	1			T189	4		T85	2		T86	2
auto[204:207]	14	1			T284	6		T338	2		T210	4
auto[208:211]	30	1			T31	6		T188	4		T190	2
auto[212:215]	18	1			T28	4		T247	2		T217	2
auto[216:219]	28	1			T66	2		T231	4		T84	8
auto[220:223]	20	1			T28	6		T265	2		T218	4
auto[224:227]	8	1			T76	4		T220	4		-	-
auto[228:231]	34	1			T283	4		T233	6		T223	2
auto[232:235]	353	1			T4	2		T90	3		T91	5
auto[236:239]	10	1			T85	2		T284	2		T237	2
auto[240:243]	26	1			T74	4		T187	2		T247	4
auto[244:247]	18	1			T340	2		T285	4		T93	2
auto[248:251]	14	1			T30	2		T85	4		T323	2
auto[252:255]	18	1			T81	4		T88	6		T336	4

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	86	1			T4	1		T8	1		T73	2
auto[0:3]	auto[1]	172	1			T4	1		T8	1		T9	6
auto[4:7]	auto[0]	164	1			T3	2		T66	1		T72	1
auto[4:7]	auto[1]	164	1			T3	2		T66	1		T72	1
auto[8:11]	auto[0]	72	1			T31	1		T28	1		T129	2
auto[8:11]	auto[1]	151	1			T90	4		T95	8		T31	1
auto[12:15]	auto[0]	8	1			T243	2		T84	2		T190	1
auto[12:15]	auto[1]	8	1			T243	2		T84	2		T190	1
auto[16:19]	auto[0]	9	1			T82	1		T78	4		T199	1
auto[16:19]	auto[1]	9	1			T82	1		T78	4		T199	1
auto[20:23]	auto[0]	69	1			T2	1		T3	4		T47	2
auto[20:23]	auto[1]	69	1			T2	1		T3	4		T47	2
auto[24:27]	auto[0]	17	1			T73	5		T188	1		T243	1
auto[24:27]	auto[1]	17	1			T73	5		T188	1		T243	1
auto[28:31]	auto[0]	14	1			T74	1		T247	2		T86	2
auto[28:31]	auto[1]	14	1			T74	1		T247	2		T86	2
auto[32:35]	auto[0]	8	1			T28	1		T81	1		T79	1
auto[32:35]	auto[1]	8	1			T28	1		T81	1		T79	1
auto[36:39]	auto[0]	11	1			T72	1		T231	1		T318	2
auto[36:39]	auto[1]	11	1			T72	1		T231	1		T318	2
auto[40:43]	auto[0]	8	1			T74	1		T188	1		T281	1
auto[40:43]	auto[1]	8	1			T74	1		T188	1		T281	1
auto[44:47]	auto[0]	12	1			T62	1		T217	1		T226	4
auto[44:47]	auto[1]	12	1			T62	1		T217	1		T226	4
auto[48:51]	auto[0]	11	1			T74	1		T281	1		T237	1
auto[48:51]	auto[1]	11	1			T74	1		T281	1		T237	1
auto[52:55]	auto[0]	85	1			T6	1		T102	2		T75	1
auto[52:55]	auto[1]	85	1			T6	1		T102	2		T75	1
auto[56:59]	auto[0]	123	1			T72	1		T73	2		T74	3
auto[56:59]	auto[1]	211	1			T9	6		T72	1		T90	3
auto[60:63]	auto[0]	12	1			T216	1		T218	2		T226	1
auto[60:63]	auto[1]	12	1			T216	1		T218	2		T226	1
auto[64:67]	auto[0]	12	1			T80	1		T216	1		T189	1
auto[64:67]	auto[1]	12	1			T80	1		T216	1		T189	1
auto[68:71]	auto[0]	9	1			T76	3		T187	1		T320	1
auto[68:71]	auto[1]	9	1			T76	3		T187	1		T320	1
auto[72:75]	auto[0]	7	1			T73	2		T185	1		T216	1
auto[72:75]	auto[1]	7	1			T73	2		T185	1		T216	1
auto[76:79]	auto[0]	8	1			T190	2		T223	1		T210	1
auto[76:79]	auto[1]	8	1			T190	2		T223	1		T210	1
auto[80:83]	auto[0]	12	1			T76	3		T249	1		T268	1
auto[80:83]	auto[1]	12	1			T76	3		T249	1		T268	1
auto[84:87]	auto[0]	4	1			T66	2		T318	1		T263	1
auto[84:87]	auto[1]	4	1			T66	2		T318	1		T263	1
auto[88:91]	auto[0]	92	1			T3	4		T66	3		T72	1
auto[88:91]	auto[1]	92	1			T3	4		T66	3		T72	1
auto[92:95]	auto[0]	7	1			T249	1		T211	1		T285	1
auto[92:95]	auto[1]	7	1			T249	1		T211	1		T285	1
auto[96:99]	auto[0]	11	1			T72	1		T187	1		T235	1
auto[96:99]	auto[1]	11	1			T72	1		T187	1		T235	1
auto[100:103]	auto[0]	9	1			T28	1		T76	2		T244	2
auto[100:103]	auto[1]	9	1			T28	1		T76	2		T244	2
auto[104:107]	auto[0]	81	1			T11	1		T92	1		T47	5
auto[104:107]	auto[1]	137	1			T9	4		T11	1		T90	3
auto[108:111]	auto[0]	5	1			T62	1		T232	1		T338	1
auto[108:111]	auto[1]	5	1			T62	1		T232	1		T338	1
auto[112:115]	auto[0]	11	1			T78	2		T205	1		T198	1
auto[112:115]	auto[1]	11	1			T78	2		T205	1		T198	1
auto[116:119]	auto[0]	6	1			T247	2		T265	1		T272	2
auto[116:119]	auto[1]	6	1			T247	2		T265	1		T272	2
auto[120:123]	auto[0]	16	1			T216	2		T231	5		T217	3
auto[120:123]	auto[1]	16	1			T216	2		T231	5		T217	3
auto[124:127]	auto[0]	10	1			T29	3		T218	3		T343	4
auto[124:127]	auto[1]	10	1			T29	3		T218	3		T343	4
auto[128:131]	auto[0]	6	1			T187	1		T283	1		T223	1
auto[128:131]	auto[1]	6	1			T187	1		T283	1		T223	1
auto[132:135]	auto[0]	11	1			T85	4		T340	1		T62	1
auto[132:135]	auto[1]	11	1			T85	4		T340	1		T62	1
auto[136:139]	auto[0]	6	1			T185	1		T269	3		T290	2
auto[136:139]	auto[1]	6	1			T185	1		T269	3		T290	2
auto[140:143]	auto[0]	14	1			T73	1		T105	1		T76	1
auto[140:143]	auto[1]	14	1			T73	1		T105	1		T76	1
auto[144:147]	auto[0]	17	1			T66	1		T73	1		T28	1
auto[144:147]	auto[1]	17	1			T66	1		T73	1		T28	1
auto[148:151]	auto[0]	3	1			T74	1		T235	1		T323	1
auto[148:151]	auto[1]	3	1			T74	1		T235	1		T323	1
auto[152:155]	auto[0]	11	1			T216	3		T206	1		T87	2
auto[152:155]	auto[1]	11	1			T216	3		T206	1		T87	2
auto[156:159]	auto[0]	97	1			T2	3		T3	3		T4	1
auto[156:159]	auto[1]	97	1			T2	3		T3	3		T4	1
auto[160:163]	auto[0]	6	1			T267	1		T88	1		T255	1
auto[160:163]	auto[1]	6	1			T267	1		T88	1		T255	1
auto[164:167]	auto[0]	19	1			T77	4		T76	1		T243	1
auto[164:167]	auto[1]	19	1			T77	4		T76	1		T243	1
auto[168:171]	auto[0]	10	1			T72	1		T198	4		T280	5
auto[168:171]	auto[1]	10	1			T72	1		T198	4		T280	5
auto[172:175]	auto[0]	5	1			T31	1		T292	1		T342	1
auto[172:175]	auto[1]	5	1			T31	1		T292	1		T342	1
auto[176:179]	auto[0]	9	1			T84	2		T247	1		T334	5
auto[176:179]	auto[1]	9	1			T84	2		T247	1		T334	5
auto[180:183]	auto[0]	62	1			T28	2		T29	1		T30	1
auto[180:183]	auto[1]	62	1			T28	2		T29	1		T30	1
auto[184:187]	auto[0]	105	1			T77	3		T29	1		T188	1
auto[184:187]	auto[1]	184	1			T95	6		T166	3		T167	2
auto[188:191]	auto[0]	1	1			T284	1		-	-		-	-
auto[188:191]	auto[1]	1	1			T284	1		-	-		-	-
auto[192:195]	auto[0]	11	1			T74	1		T233	1		T272	1
auto[192:195]	auto[1]	11	1			T74	1		T233	1		T272	1
auto[196:199]	auto[0]	8	1			T243	1		T223	2		T255	1
auto[196:199]	auto[1]	8	1			T243	1		T223	2		T255	1
auto[200:203]	auto[0]	8	1			T189	2		T85	1		T86	1
auto[200:203]	auto[1]	8	1			T189	2		T85	1		T86	1
auto[204:207]	auto[0]	7	1			T284	3		T338	1		T210	2
auto[204:207]	auto[1]	7	1			T284	3		T338	1		T210	2
auto[208:211]	auto[0]	15	1			T31	3		T188	2		T190	1
auto[208:211]	auto[1]	15	1			T31	3		T188	2		T190	1
auto[212:215]	auto[0]	9	1			T28	2		T247	1		T217	1
auto[212:215]	auto[1]	9	1			T28	2		T247	1		T217	1
auto[216:219]	auto[0]	14	1			T66	1		T231	2		T84	4
auto[216:219]	auto[1]	14	1			T66	1		T231	2		T84	4
auto[220:223]	auto[0]	10	1			T28	3		T265	1		T218	2
auto[220:223]	auto[1]	10	1			T28	3		T265	1		T218	2
auto[224:227]	auto[0]	4	1			T76	2		T220	2		-	-
auto[224:227]	auto[1]	4	1			T76	2		T220	2		-	-
auto[228:231]	auto[0]	17	1			T283	2		T233	3		T223	1
auto[228:231]	auto[1]	17	1			T283	2		T233	3		T223	1
auto[232:235]	auto[0]	121	1			T4	1		T92	1		T47	2
auto[232:235]	auto[1]	232	1			T4	1		T90	3		T91	5
auto[236:239]	auto[0]	5	1			T85	1		T284	1		T237	1
auto[236:239]	auto[1]	5	1			T85	1		T284	1		T237	1
auto[240:243]	auto[0]	13	1			T74	2		T187	1		T247	2
auto[240:243]	auto[1]	13	1			T74	2		T187	1		T247	2
auto[244:247]	auto[0]	9	1			T340	1		T285	2		T93	1
auto[244:247]	auto[1]	9	1			T340	1		T285	2		T93	1
auto[248:251]	auto[0]	7	1			T30	1		T85	2		T323	1
auto[248:251]	auto[1]	7	1			T30	1		T85	2		T323	1
auto[252:255]	auto[0]	9	1			T81	2		T88	3		T336	2
auto[252:255]	auto[1]	9	1			T81	2		T88	3		T336	2