Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1547

1

T4

4

T5

12

T6

9

auto[1]

2248

1

T4

4

T5

12

T6

9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	288	1			T5	4		T12	5		T19	4
auto[4:7]	239	1			T5	4		T8	2		T13	2
auto[8:11]	281	1			T19	4		T84	4		T67	2
auto[12:15]	14	1			T74	4		T188	4		T286	2
auto[16:19]	14	1			T72	4		T276	2		T341	2
auto[20:23]	176	1			T44	4		T67	6		T187	4
auto[24:27]	10	1			T43	2		T69	2		T335	2
auto[28:31]	6	1			T72	2		T228	2		T213	2
auto[32:35]	32	1			T4	4		T238	2		T76	2
auto[36:39]	28	1			T192	2		T68	2		T217	4
auto[40:43]	22	1			T198	2		T207	4		T255	2
auto[44:47]	10	1			T191	2		T76	2		T239	2
auto[48:51]	18	1			T5	2		T73	4		T262	4
auto[52:55]	240	1			T6	4		T95	8		T67	8
auto[56:59]	277	1			T5	2		T11	2		T19	7
auto[60:63]	22	1			T306	2		T285	2		T223	4
auto[64:67]	10	1			T75	2		T239	2		T81	2
auto[68:71]	18	1			T11	4		T72	2		T70	2
auto[72:75]	18	1			T76	2		T239	2		T341	2
auto[76:79]	14	1			T238	4		T210	2		T80	2
auto[80:83]	15	1			T67	2		T24	1		T289	2
auto[84:87]	12	1			T56	2		T305	6		T322	2
auto[88:91]	221	1			T8	2		T11	2		T95	4
auto[92:95]	8	1			T68	6		T385	2		-	-
auto[96:99]	8	1			T6	2		T71	2		T233	4
auto[100:103]	24	1			T74	2		T237	4		T78	6
auto[104:107]	298	1			T6	6		T7	6		T12	4
auto[108:111]	20	1			T67	4		T68	4		T335	2
auto[112:115]	24	1			T4	2		T70	4		T196	2
auto[116:119]	20	1			T6	2		T192	2		T257	2
auto[120:123]	22	1			T191	2		T296	6		T258	2
auto[124:127]	18	1			T6	2		T192	2		T72	2
auto[128:131]	16	1			T73	4		T207	4		T306	2
auto[132:135]	11	1			T43	2		T340	6		T102	3
auto[136:139]	16	1			T231	2		T317	2		T204	6
auto[140:143]	22	1			T191	4		T75	4		T270	2
auto[144:147]	10	1			T335	6		T208	2		T340	2
auto[148:151]	46	1			T67	4		T191	4		T255	2
auto[152:155]	14	1			T5	2		T262	4		T299	6
auto[156:159]	175	1			T5	2		T11	2		T95	4
auto[160:163]	31	1			T24	1		T235	4		T276	2
auto[164:167]	21	1			T188	2		T24	1		T269	4
auto[168:171]	40	1			T93	4		T188	2		T255	4
auto[172:175]	18	1			T188	4		T235	2		T265	4
auto[176:179]	20	1			T262	6		T291	4		T337	2
auto[180:183]	60	1			T10	2		T27	2		T28	2
auto[184:187]	265	1			T6	2		T12	4		T87	2
auto[188:191]	10	1			T210	4		T243	2		T202	2
auto[192:195]	12	1			T5	4		T238	4		T269	2
auto[196:199]	20	1			T68	2		T255	2		T237	2
auto[200:203]	8	1			T296	2		T289	4		T316	2
auto[204:207]	20	1			T230	2		T339	4		T255	8
auto[208:211]	22	1			T43	2		T230	4		T73	2
auto[212:215]	26	1			T4	2		T70	2		T257	4
auto[216:219]	2	1			T200	2		-	-		-	-
auto[220:223]	7	1			T24	1		T293	2		T263	2
auto[224:227]	20	1			T11	2		T192	2		T68	4
auto[228:231]	16	1			T269	4		T77	4		T83	4
auto[232:235]	338	1			T5	4		T8	2		T29	4
auto[236:239]	16	1			T234	2		T264	6		T310	2
auto[240:243]	22	1			T217	2		T207	2		T77	2
auto[244:247]	22	1			T257	2		T335	4		T218	2
auto[248:251]	30	1			T74	4		T197	6		T68	2
auto[252:255]	12	1			T210	2		T204	6		T316	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	81	1			T5	2		T98	1		T93	2
auto[0:3]	auto[1]	207	1			T5	2		T12	5		T19	4
auto[4:7]	auto[0]	118	1			T5	2		T8	1		T13	1
auto[4:7]	auto[1]	121	1			T5	2		T8	1		T13	1
auto[8:11]	auto[0]	78	1			T67	1		T69	2		T191	2
auto[8:11]	auto[1]	203	1			T19	4		T84	4		T67	1
auto[12:15]	auto[0]	7	1			T74	2		T188	2		T286	1
auto[12:15]	auto[1]	7	1			T74	2		T188	2		T286	1
auto[16:19]	auto[0]	7	1			T72	2		T276	1		T341	1
auto[16:19]	auto[1]	7	1			T72	2		T276	1		T341	1
auto[20:23]	auto[0]	87	1			T44	2		T67	3		T187	2
auto[20:23]	auto[1]	89	1			T44	2		T67	3		T187	2
auto[24:27]	auto[0]	5	1			T43	1		T69	1		T335	1
auto[24:27]	auto[1]	5	1			T43	1		T69	1		T335	1
auto[28:31]	auto[0]	3	1			T72	1		T228	1		T213	1
auto[28:31]	auto[1]	3	1			T72	1		T228	1		T213	1
auto[32:35]	auto[0]	16	1			T4	2		T238	1		T76	1
auto[32:35]	auto[1]	16	1			T4	2		T238	1		T76	1
auto[36:39]	auto[0]	14	1			T192	1		T68	1		T217	2
auto[36:39]	auto[1]	14	1			T192	1		T68	1		T217	2
auto[40:43]	auto[0]	11	1			T198	1		T207	2		T255	1
auto[40:43]	auto[1]	11	1			T198	1		T207	2		T255	1
auto[44:47]	auto[0]	5	1			T191	1		T76	1		T239	1
auto[44:47]	auto[1]	5	1			T191	1		T76	1		T239	1
auto[48:51]	auto[0]	9	1			T5	1		T73	2		T262	2
auto[48:51]	auto[1]	9	1			T5	1		T73	2		T262	2
auto[52:55]	auto[0]	119	1			T6	2		T95	4		T67	4
auto[52:55]	auto[1]	121	1			T6	2		T95	4		T67	4
auto[56:59]	auto[0]	91	1			T5	1		T11	1		T74	1
auto[56:59]	auto[1]	186	1			T5	1		T11	1		T19	7
auto[60:63]	auto[0]	11	1			T306	1		T285	1		T223	2
auto[60:63]	auto[1]	11	1			T306	1		T285	1		T223	2
auto[64:67]	auto[0]	5	1			T75	1		T239	1		T81	1
auto[64:67]	auto[1]	5	1			T75	1		T239	1		T81	1
auto[68:71]	auto[0]	9	1			T11	2		T72	1		T70	1
auto[68:71]	auto[1]	9	1			T11	2		T72	1		T70	1
auto[72:75]	auto[0]	9	1			T76	1		T239	1		T341	1
auto[72:75]	auto[1]	9	1			T76	1		T239	1		T341	1
auto[76:79]	auto[0]	7	1			T238	2		T210	1		T80	1
auto[76:79]	auto[1]	7	1			T238	2		T210	1		T80	1
auto[80:83]	auto[0]	7	1			T67	1		T289	1		T83	1
auto[80:83]	auto[1]	8	1			T67	1		T24	1		T289	1
auto[84:87]	auto[0]	6	1			T56	1		T305	3		T322	1
auto[84:87]	auto[1]	6	1			T56	1		T305	3		T322	1
auto[88:91]	auto[0]	110	1			T8	1		T11	1		T95	2
auto[88:91]	auto[1]	111	1			T8	1		T11	1		T95	2
auto[92:95]	auto[0]	4	1			T68	3		T385	1		-	-
auto[92:95]	auto[1]	4	1			T68	3		T385	1		-	-
auto[96:99]	auto[0]	4	1			T6	1		T71	1		T233	2
auto[96:99]	auto[1]	4	1			T6	1		T71	1		T233	2
auto[100:103]	auto[0]	12	1			T74	1		T237	2		T78	3
auto[100:103]	auto[1]	12	1			T74	1		T237	2		T78	3
auto[104:107]	auto[0]	82	1			T6	3		T7	3		T230	2
auto[104:107]	auto[1]	216	1			T6	3		T7	3		T12	4
auto[108:111]	auto[0]	10	1			T67	2		T68	2		T335	1
auto[108:111]	auto[1]	10	1			T67	2		T68	2		T335	1
auto[112:115]	auto[0]	12	1			T4	1		T70	2		T196	1
auto[112:115]	auto[1]	12	1			T4	1		T70	2		T196	1
auto[116:119]	auto[0]	10	1			T6	1		T192	1		T257	1
auto[116:119]	auto[1]	10	1			T6	1		T192	1		T257	1
auto[120:123]	auto[0]	11	1			T191	1		T296	3		T258	1
auto[120:123]	auto[1]	11	1			T191	1		T296	3		T258	1
auto[124:127]	auto[0]	9	1			T6	1		T192	1		T72	1
auto[124:127]	auto[1]	9	1			T6	1		T192	1		T72	1
auto[128:131]	auto[0]	8	1			T73	2		T207	2		T306	1
auto[128:131]	auto[1]	8	1			T73	2		T207	2		T306	1
auto[132:135]	auto[0]	4	1			T43	1		T340	3		-	-
auto[132:135]	auto[1]	7	1			T43	1		T340	3		T102	3
auto[136:139]	auto[0]	8	1			T231	1		T317	1		T204	3
auto[136:139]	auto[1]	8	1			T231	1		T317	1		T204	3
auto[140:143]	auto[0]	11	1			T191	2		T75	2		T270	1
auto[140:143]	auto[1]	11	1			T191	2		T75	2		T270	1
auto[144:147]	auto[0]	5	1			T335	3		T208	1		T340	1
auto[144:147]	auto[1]	5	1			T335	3		T208	1		T340	1
auto[148:151]	auto[0]	23	1			T67	2		T191	2		T255	1
auto[148:151]	auto[1]	23	1			T67	2		T191	2		T255	1
auto[152:155]	auto[0]	7	1			T5	1		T262	2		T299	3
auto[152:155]	auto[1]	7	1			T5	1		T262	2		T299	3
auto[156:159]	auto[0]	84	1			T5	1		T11	1		T95	2
auto[156:159]	auto[1]	91	1			T5	1		T11	1		T95	2
auto[160:163]	auto[0]	15	1			T235	2		T276	1		T78	1
auto[160:163]	auto[1]	16	1			T24	1		T235	2		T276	1
auto[164:167]	auto[0]	10	1			T188	1		T269	2		T239	1
auto[164:167]	auto[1]	11	1			T188	1		T24	1		T269	2
auto[168:171]	auto[0]	20	1			T93	2		T188	1		T255	2
auto[168:171]	auto[1]	20	1			T93	2		T188	1		T255	2
auto[172:175]	auto[0]	9	1			T188	2		T235	1		T265	2
auto[172:175]	auto[1]	9	1			T188	2		T235	1		T265	2
auto[176:179]	auto[0]	10	1			T262	3		T291	2		T337	1
auto[176:179]	auto[1]	10	1			T262	3		T291	2		T337	1
auto[180:183]	auto[0]	27	1			T10	1		T27	1		T28	1
auto[180:183]	auto[1]	33	1			T10	1		T27	1		T28	1
auto[184:187]	auto[0]	82	1			T6	1		T87	1		T45	2
auto[184:187]	auto[1]	183	1			T6	1		T12	4		T87	1
auto[188:191]	auto[0]	5	1			T210	2		T243	1		T202	1
auto[188:191]	auto[1]	5	1			T210	2		T243	1		T202	1
auto[192:195]	auto[0]	6	1			T5	2		T238	2		T269	1
auto[192:195]	auto[1]	6	1			T5	2		T238	2		T269	1
auto[196:199]	auto[0]	10	1			T68	1		T255	1		T237	1
auto[196:199]	auto[1]	10	1			T68	1		T255	1		T237	1
auto[200:203]	auto[0]	4	1			T296	1		T289	2		T316	1
auto[200:203]	auto[1]	4	1			T296	1		T289	2		T316	1
auto[204:207]	auto[0]	8	1			T230	1		T339	2		T255	4
auto[204:207]	auto[1]	12	1			T230	1		T339	2		T255	4
auto[208:211]	auto[0]	11	1			T43	1		T230	2		T73	1
auto[208:211]	auto[1]	11	1			T43	1		T230	2		T73	1
auto[212:215]	auto[0]	12	1			T4	1		T70	1		T257	2
auto[212:215]	auto[1]	14	1			T4	1		T70	1		T257	2
auto[216:219]	auto[0]	1	1			T200	1		-	-		-	-
auto[216:219]	auto[1]	1	1			T200	1		-	-		-	-
auto[220:223]	auto[0]	3	1			T293	1		T263	1		T223	1
auto[220:223]	auto[1]	4	1			T24	1		T293	1		T263	1
auto[224:227]	auto[0]	10	1			T11	1		T192	1		T68	2
auto[224:227]	auto[1]	10	1			T11	1		T192	1		T68	2
auto[228:231]	auto[0]	8	1			T269	2		T77	2		T83	2
auto[228:231]	auto[1]	8	1			T269	2		T77	2		T83	2
auto[232:235]	auto[0]	126	1			T5	2		T8	1		T29	2
auto[232:235]	auto[1]	212	1			T5	2		T8	1		T29	2
auto[236:239]	auto[0]	8	1			T234	1		T264	3		T310	1
auto[236:239]	auto[1]	8	1			T234	1		T264	3		T310	1
auto[240:243]	auto[0]	11	1			T217	1		T207	1		T77	1
auto[240:243]	auto[1]	11	1			T217	1		T207	1		T77	1
auto[244:247]	auto[0]	11	1			T257	1		T335	2		T218	1
auto[244:247]	auto[1]	11	1			T257	1		T335	2		T218	1
auto[248:251]	auto[0]	15	1			T74	2		T197	3		T68	1
auto[248:251]	auto[1]	15	1			T74	2		T197	3		T68	1
auto[252:255]	auto[0]	6	1			T210	1		T204	3		T316	1
auto[252:255]	auto[1]	6	1			T210	1		T204	3		T316	1