Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1631

1

T7

1

T5

13

T6

15

auto[1]

2124

1

T7

1

T5

13

T6

15

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	233	1			T12	2		T88	3		T44	2
auto[4:7]	269	1			T6	2		T9	6		T73	2
auto[8:11]	224	1			T11	2		T49	2		T44	2
auto[12:15]	30	1			T44	2		T213	8		T236	6
auto[16:19]	10	1			T194	2		T258	6		T292	2
auto[20:23]	144	1			T7	2		T5	6		T6	2
auto[24:27]	12	1			T283	4		T204	2		T230	4
auto[28:31]	23	1			T44	2		T78	6		T74	4
auto[32:35]	26	1			T43	4		T182	2		T303	2
auto[36:39]	14	1			T197	2		T291	2		T219	2
auto[40:43]	16	1			T78	2		T80	2		T246	2
auto[44:47]	10	1			T216	2		T258	2		T267	2
auto[48:51]	24	1			T196	2		T295	4		T80	6
auto[52:55]	181	1			T195	4		T72	2		T74	4
auto[56:59]	320	1			T5	4		T6	6		T12	2
auto[60:63]	20	1			T75	2		T180	2		T232	2
auto[64:67]	26	1			T257	2		T258	6		T253	2
auto[68:71]	18	1			T299	2		T217	2		T61	4
auto[72:75]	18	1			T43	2		T273	4		T244	4
auto[76:79]	28	1			T195	4		T27	4		T74	2
auto[80:83]	16	1			T199	4		T295	2		T282	2
auto[84:87]	20	1			T265	2		T283	4		T209	2
auto[88:91]	196	1			T5	2		T6	2		T46	4
auto[92:95]	15	1			T80	4		T239	4		T221	2
auto[96:99]	12	1			T265	2		T182	2		T93	2
auto[100:103]	34	1			T5	6		T196	2		T75	2
auto[104:107]	300	1			T12	2		T120	6		T44	6
auto[108:111]	18	1			T27	4		T83	2		T386	4
auto[112:115]	8	1			T78	2		T260	2		T293	2
auto[116:119]	20	1			T11	2		T43	2		T182	2
auto[120:123]	22	1			T45	4		T197	2		T84	4
auto[124:127]	16	1			T194	2		T197	2		T221	2
auto[128:131]	12	1			T75	2		T182	4		T203	4
auto[132:135]	10	1			T11	2		T283	4		T305	2
auto[136:139]	12	1			T264	2		T63	2		T204	2
auto[140:143]	16	1			T9	2		T72	2		T260	4
auto[144:147]	12	1			T301	4		T386	2		T333	2
auto[148:151]	22	1			T197	2		T221	4		T76	4
auto[152:155]	17	1			T78	4		T355	2		T93	1
auto[156:159]	198	1			T5	2		T11	2		T46	2
auto[160:163]	27	1			T74	2		T75	2		T291	6
auto[164:167]	28	1			T239	2		T355	2		T264	2
auto[168:171]	22	1			T79	2		T84	2		T278	2
auto[172:175]	18	1			T27	4		T216	2		T213	2
auto[176:179]	10	1			T359	2		T210	2		T223	2
auto[180:183]	111	1			T23	8		T26	12		T27	4
auto[184:187]	269	1			T46	4		T195	6		T79	6
auto[188:191]	7	1			T63	2		T93	1		T353	2
auto[192:195]	35	1			T196	4		T264	2		T93	1
auto[196:199]	26	1			T6	12		T11	2		T79	6
auto[200:203]	8	1			T43	2		T72	2		T299	2
auto[204:207]	16	1			T198	4		T213	6		T80	2
auto[208:211]	18	1			T199	2		T74	2		T217	2
auto[212:215]	22	1			T267	2		T55	6		T82	4
auto[216:219]	10	1			T288	4		T77	2		T358	4
auto[220:223]	34	1			T5	2		T283	6		T180	4
auto[224:227]	36	1			T6	2		T27	2		T216	4
auto[228:231]	19	1			T73	2		T29	4		T93	1
auto[232:235]	315	1			T5	2		T9	2		T46	2
auto[236:239]	30	1			T199	2		T242	2		T293	2
auto[240:243]	28	1			T43	6		T72	2		T196	2
auto[244:247]	18	1			T5	2		T6	4		T78	2
auto[248:251]	8	1			T260	4		T243	4		-	-
auto[252:255]	18	1			T216	2		T183	2		T304	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	78	1			T12	1		T44	1		T195	1
auto[0:3]	auto[1]	155	1			T12	1		T88	3		T44	1
auto[4:7]	auto[0]	135	1			T6	1		T9	3		T73	1
auto[4:7]	auto[1]	134	1			T6	1		T9	3		T73	1
auto[8:11]	auto[0]	66	1			T11	1		T49	1		T44	1
auto[8:11]	auto[1]	158	1			T11	1		T49	1		T44	1
auto[12:15]	auto[0]	15	1			T44	1		T213	4		T236	3
auto[12:15]	auto[1]	15	1			T44	1		T213	4		T236	3
auto[16:19]	auto[0]	5	1			T194	1		T258	3		T292	1
auto[16:19]	auto[1]	5	1			T194	1		T258	3		T292	1
auto[20:23]	auto[0]	72	1			T7	1		T5	3		T6	1
auto[20:23]	auto[1]	72	1			T7	1		T5	3		T6	1
auto[24:27]	auto[0]	6	1			T283	2		T204	1		T230	2
auto[24:27]	auto[1]	6	1			T283	2		T204	1		T230	2
auto[28:31]	auto[0]	11	1			T44	1		T78	3		T74	2
auto[28:31]	auto[1]	12	1			T44	1		T78	3		T74	2
auto[32:35]	auto[0]	13	1			T43	2		T182	1		T303	1
auto[32:35]	auto[1]	13	1			T43	2		T182	1		T303	1
auto[36:39]	auto[0]	7	1			T197	1		T291	1		T219	1
auto[36:39]	auto[1]	7	1			T197	1		T291	1		T219	1
auto[40:43]	auto[0]	8	1			T78	1		T80	1		T246	1
auto[40:43]	auto[1]	8	1			T78	1		T80	1		T246	1
auto[44:47]	auto[0]	5	1			T216	1		T258	1		T267	1
auto[44:47]	auto[1]	5	1			T216	1		T258	1		T267	1
auto[48:51]	auto[0]	12	1			T196	1		T295	2		T80	3
auto[48:51]	auto[1]	12	1			T196	1		T295	2		T80	3
auto[52:55]	auto[0]	91	1			T195	2		T72	1		T74	2
auto[52:55]	auto[1]	90	1			T195	2		T72	1		T74	2
auto[56:59]	auto[0]	114	1			T5	2		T6	3		T12	1
auto[56:59]	auto[1]	206	1			T5	2		T6	3		T12	1
auto[60:63]	auto[0]	10	1			T75	1		T180	1		T232	1
auto[60:63]	auto[1]	10	1			T75	1		T180	1		T232	1
auto[64:67]	auto[0]	13	1			T257	1		T258	3		T253	1
auto[64:67]	auto[1]	13	1			T257	1		T258	3		T253	1
auto[68:71]	auto[0]	9	1			T299	1		T217	1		T61	2
auto[68:71]	auto[1]	9	1			T299	1		T217	1		T61	2
auto[72:75]	auto[0]	9	1			T43	1		T273	2		T244	2
auto[72:75]	auto[1]	9	1			T43	1		T273	2		T244	2
auto[76:79]	auto[0]	14	1			T195	2		T27	2		T74	1
auto[76:79]	auto[1]	14	1			T195	2		T27	2		T74	1
auto[80:83]	auto[0]	8	1			T199	2		T295	1		T282	1
auto[80:83]	auto[1]	8	1			T199	2		T295	1		T282	1
auto[84:87]	auto[0]	10	1			T265	1		T283	2		T209	1
auto[84:87]	auto[1]	10	1			T265	1		T283	2		T209	1
auto[88:91]	auto[0]	98	1			T5	1		T6	1		T46	2
auto[88:91]	auto[1]	98	1			T5	1		T6	1		T46	2
auto[92:95]	auto[0]	8	1			T80	2		T239	2		T221	1
auto[92:95]	auto[1]	7	1			T80	2		T239	2		T221	1
auto[96:99]	auto[0]	5	1			T265	1		T182	1		T230	1
auto[96:99]	auto[1]	7	1			T265	1		T182	1		T93	2
auto[100:103]	auto[0]	17	1			T5	3		T196	1		T75	1
auto[100:103]	auto[1]	17	1			T5	3		T196	1		T75	1
auto[104:107]	auto[0]	106	1			T12	1		T120	3		T44	3
auto[104:107]	auto[1]	194	1			T12	1		T120	3		T44	3
auto[108:111]	auto[0]	9	1			T27	2		T83	1		T386	2
auto[108:111]	auto[1]	9	1			T27	2		T83	1		T386	2
auto[112:115]	auto[0]	4	1			T78	1		T260	1		T293	1
auto[112:115]	auto[1]	4	1			T78	1		T260	1		T293	1
auto[116:119]	auto[0]	10	1			T11	1		T43	1		T182	1
auto[116:119]	auto[1]	10	1			T11	1		T43	1		T182	1
auto[120:123]	auto[0]	11	1			T45	2		T197	1		T84	2
auto[120:123]	auto[1]	11	1			T45	2		T197	1		T84	2
auto[124:127]	auto[0]	8	1			T194	1		T197	1		T221	1
auto[124:127]	auto[1]	8	1			T194	1		T197	1		T221	1
auto[128:131]	auto[0]	6	1			T75	1		T182	2		T203	2
auto[128:131]	auto[1]	6	1			T75	1		T182	2		T203	2
auto[132:135]	auto[0]	5	1			T11	1		T283	2		T305	1
auto[132:135]	auto[1]	5	1			T11	1		T283	2		T305	1
auto[136:139]	auto[0]	6	1			T264	1		T63	1		T204	1
auto[136:139]	auto[1]	6	1			T264	1		T63	1		T204	1
auto[140:143]	auto[0]	8	1			T9	1		T72	1		T260	2
auto[140:143]	auto[1]	8	1			T9	1		T72	1		T260	2
auto[144:147]	auto[0]	6	1			T301	2		T386	1		T333	1
auto[144:147]	auto[1]	6	1			T301	2		T386	1		T333	1
auto[148:151]	auto[0]	11	1			T197	1		T221	2		T76	2
auto[148:151]	auto[1]	11	1			T197	1		T221	2		T76	2
auto[152:155]	auto[0]	9	1			T78	2		T355	1		T93	1
auto[152:155]	auto[1]	8	1			T78	2		T355	1		T84	2
auto[156:159]	auto[0]	99	1			T5	1		T11	1		T46	1
auto[156:159]	auto[1]	99	1			T5	1		T11	1		T46	1
auto[160:163]	auto[0]	14	1			T74	1		T75	1		T291	3
auto[160:163]	auto[1]	13	1			T74	1		T75	1		T291	3
auto[164:167]	auto[0]	14	1			T239	1		T355	1		T264	1
auto[164:167]	auto[1]	14	1			T239	1		T355	1		T264	1
auto[168:171]	auto[0]	11	1			T79	1		T84	1		T278	1
auto[168:171]	auto[1]	11	1			T79	1		T84	1		T278	1
auto[172:175]	auto[0]	9	1			T27	2		T216	1		T213	1
auto[172:175]	auto[1]	9	1			T27	2		T216	1		T213	1
auto[176:179]	auto[0]	5	1			T359	1		T210	1		T223	1
auto[176:179]	auto[1]	5	1			T359	1		T210	1		T223	1
auto[180:183]	auto[0]	55	1			T23	4		T26	6		T27	2
auto[180:183]	auto[1]	56	1			T23	4		T26	6		T27	2
auto[184:187]	auto[0]	94	1			T46	2		T195	3		T79	3
auto[184:187]	auto[1]	175	1			T46	2		T195	3		T79	3
auto[188:191]	auto[0]	3	1			T63	1		T353	1		T305	1
auto[188:191]	auto[1]	4	1			T63	1		T93	1		T353	1
auto[192:195]	auto[0]	18	1			T196	2		T264	1		T93	1
auto[192:195]	auto[1]	17	1			T196	2		T264	1		T253	1
auto[196:199]	auto[0]	13	1			T6	6		T11	1		T79	3
auto[196:199]	auto[1]	13	1			T6	6		T11	1		T79	3
auto[200:203]	auto[0]	4	1			T43	1		T72	1		T299	1
auto[200:203]	auto[1]	4	1			T43	1		T72	1		T299	1
auto[204:207]	auto[0]	8	1			T198	2		T213	3		T80	1
auto[204:207]	auto[1]	8	1			T198	2		T213	3		T80	1
auto[208:211]	auto[0]	9	1			T199	1		T74	1		T217	1
auto[208:211]	auto[1]	9	1			T199	1		T74	1		T217	1
auto[212:215]	auto[0]	11	1			T267	1		T55	3		T82	2
auto[212:215]	auto[1]	11	1			T267	1		T55	3		T82	2
auto[216:219]	auto[0]	5	1			T288	2		T77	1		T358	2
auto[216:219]	auto[1]	5	1			T288	2		T77	1		T358	2
auto[220:223]	auto[0]	17	1			T5	1		T283	3		T180	2
auto[220:223]	auto[1]	17	1			T5	1		T283	3		T180	2
auto[224:227]	auto[0]	18	1			T6	1		T27	1		T216	2
auto[224:227]	auto[1]	18	1			T6	1		T27	1		T216	2
auto[228:231]	auto[0]	10	1			T73	1		T29	2		T93	1
auto[228:231]	auto[1]	9	1			T73	1		T29	2		T290	1
auto[232:235]	auto[0]	125	1			T5	1		T9	1		T46	1
auto[232:235]	auto[1]	190	1			T5	1		T9	1		T46	1
auto[236:239]	auto[0]	15	1			T199	1		T242	1		T293	1
auto[236:239]	auto[1]	15	1			T199	1		T242	1		T293	1
auto[240:243]	auto[0]	14	1			T43	3		T72	1		T196	1
auto[240:243]	auto[1]	14	1			T43	3		T72	1		T196	1
auto[244:247]	auto[0]	9	1			T5	1		T6	2		T78	1
auto[244:247]	auto[1]	9	1			T5	1		T6	2		T78	1
auto[248:251]	auto[0]	4	1			T260	2		T243	2		-	-
auto[248:251]	auto[1]	4	1			T260	2		T243	2		-	-
auto[252:255]	auto[0]	9	1			T216	1		T183	1		T304	1
auto[252:255]	auto[1]	9	1			T216	1		T183	1		T304	1