Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
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Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 66 0 66 100.00
Crosses 128 0 128 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_filtered 2 0 2 100.00 100 1 1 2
cp_opcode 64 0 64 100.00 100 1 1 64


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 128 0 128 100.00 100 1 1 0


Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_filtered

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1563 1 T4 5 T5 4 T7 14
auto[1] 2070 1 T1 9 T4 5 T5 4



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 64 0 64 100.00


Automatically Generated Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] 252 1 T7 4 T8 2 T114 2
auto[4:7] 262 1 T43 2 T107 2 T197 2
auto[8:11] 264 1 T8 2 T101 1 T113 2
auto[12:15] 16 1 T77 2 T193 2 T210 4
auto[16:19] 6 1 T228 2 T243 4 - -
auto[20:23] 184 1 T7 4 T9 4 T107 2
auto[24:27] 28 1 T72 2 T264 4 T295 8
auto[28:31] 20 1 T180 4 T263 2 T215 2
auto[32:35] 28 1 T44 2 T285 2 T293 4
auto[36:39] 20 1 T288 2 T180 2 T318 6
auto[40:43] 18 1 T192 2 T45 2 T317 2
auto[44:47] 28 1 T77 2 T73 4 T180 2
auto[48:51] 16 1 T43 2 T82 2 T206 2
auto[52:55] 126 1 T43 4 T113 2 T44 4
auto[56:59] 285 1 T4 4 T5 6 T8 2
auto[60:63] 30 1 T7 6 T45 2 T208 6
auto[64:67] 16 1 T74 4 T205 4 T180 2
auto[68:71] 10 1 T218 2 T321 4 T375 4
auto[72:75] 10 1 T185 2 T100 2 T246 2
auto[76:79] 20 1 T84 2 T199 2 T83 2
auto[80:83] 18 1 T107 2 T71 2 T218 2
auto[84:87] 28 1 T7 2 T93 4 T208 2
auto[88:91] 162 1 T4 4 T9 2 T12 2
auto[92:95] 18 1 T82 2 T193 4 T229 4
auto[96:99] 16 1 T223 2 T274 2 T344 4
auto[100:103] 16 1 T208 2 T280 2 T254 2
auto[104:107] 322 1 T1 2 T4 2 T5 2
auto[108:111] 28 1 T206 2 T258 4 T263 4
auto[112:115] 20 1 T76 8 T345 4 T275 2
auto[116:119] 22 1 T196 2 T6 2 T254 4
auto[120:123] 16 1 T86 4 T318 2 T287 4
auto[124:127] 22 1 T79 4 T288 2 T229 2
auto[128:131] 14 1 T82 2 T72 2 T239 6
auto[132:135] 24 1 T107 2 T280 2 T180 2
auto[136:139] 22 1 T81 2 T219 2 T258 2
auto[140:143] 28 1 T192 2 T193 2 T84 2
auto[144:147] 14 1 T107 2 T81 2 T252 2
auto[148:151] 22 1 T286 2 T345 6 T220 6
auto[152:155] 22 1 T77 2 T27 2 T85 2
auto[156:159] 186 1 T7 6 T8 2 T46 2
auto[160:163] 10 1 T223 2 T221 2 T243 2
auto[164:167] 20 1 T71 4 T253 2 T58 2
auto[168:171] 24 1 T45 4 T6 2 T253 2
auto[172:175] 16 1 T27 4 T81 4 T195 2
auto[176:179] 10 1 T376 4 T201 4 T377 2
auto[180:183] 60 1 T25 4 T26 4 T27 2
auto[184:187] 282 1 T1 4 T8 4 T12 2
auto[188:191] 10 1 T245 6 T180 2 T361 2
auto[192:195] 14 1 T7 4 T71 6 T83 2
auto[196:199] 2 1 T185 2 - - - -
auto[200:203] 30 1 T196 2 T71 4 T84 4
auto[204:207] 6 1 T79 2 T81 2 T258 2
auto[208:211] 14 1 T252 2 T74 2 T321 2
auto[212:215] 12 1 T45 2 T232 2 T201 2
auto[216:219] 6 1 T263 2 T292 4 - -
auto[220:223] 18 1 T274 4 T229 4 T345 2
auto[224:227] 10 1 T217 2 T292 2 T338 4
auto[228:231] 20 1 T223 2 T83 2 T228 4
auto[232:235] 356 1 T1 3 T28 4 T197 2
auto[236:239] 10 1 T93 2 T288 2 T185 2
auto[240:243] 14 1 T79 2 T288 2 T185 2
auto[244:247] 10 1 T80 2 T252 2 T253 2
auto[248:251] 14 1 T82 2 T254 2 T85 8
auto[252:255] 6 1 T291 6 - - - -



Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for cr_all

Bins
cp_opcodecp_filteredCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] auto[0] 87 1 T7 2 T8 1 T79 2
auto[0:3] auto[1] 165 1 T7 2 T8 1 T114 2
auto[4:7] auto[0] 131 1 T43 1 T107 1 T197 1
auto[4:7] auto[1] 131 1 T43 1 T107 1 T197 1
auto[8:11] auto[0] 92 1 T8 1 T113 1 T82 1
auto[8:11] auto[1] 172 1 T8 1 T101 1 T113 1
auto[12:15] auto[0] 8 1 T77 1 T193 1 T210 2
auto[12:15] auto[1] 8 1 T77 1 T193 1 T210 2
auto[16:19] auto[0] 3 1 T228 1 T243 2 - -
auto[16:19] auto[1] 3 1 T228 1 T243 2 - -
auto[20:23] auto[0] 92 1 T7 2 T9 2 T107 1
auto[20:23] auto[1] 92 1 T7 2 T9 2 T107 1
auto[24:27] auto[0] 14 1 T72 1 T264 2 T295 4
auto[24:27] auto[1] 14 1 T72 1 T264 2 T295 4
auto[28:31] auto[0] 10 1 T180 2 T263 1 T215 1
auto[28:31] auto[1] 10 1 T180 2 T263 1 T215 1
auto[32:35] auto[0] 14 1 T44 1 T285 1 T293 2
auto[32:35] auto[1] 14 1 T44 1 T285 1 T293 2
auto[36:39] auto[0] 10 1 T288 1 T180 1 T318 3
auto[36:39] auto[1] 10 1 T288 1 T180 1 T318 3
auto[40:43] auto[0] 9 1 T192 1 T45 1 T317 1
auto[40:43] auto[1] 9 1 T192 1 T45 1 T317 1
auto[44:47] auto[0] 14 1 T77 1 T73 2 T180 1
auto[44:47] auto[1] 14 1 T77 1 T73 2 T180 1
auto[48:51] auto[0] 8 1 T43 1 T82 1 T206 1
auto[48:51] auto[1] 8 1 T43 1 T82 1 T206 1
auto[52:55] auto[0] 63 1 T43 2 T113 1 T44 2
auto[52:55] auto[1] 63 1 T43 2 T113 1 T44 2
auto[56:59] auto[0] 99 1 T4 2 T5 3 T8 1
auto[56:59] auto[1] 186 1 T4 2 T5 3 T8 1
auto[60:63] auto[0] 15 1 T7 3 T45 1 T208 3
auto[60:63] auto[1] 15 1 T7 3 T45 1 T208 3
auto[64:67] auto[0] 8 1 T74 2 T205 2 T180 1
auto[64:67] auto[1] 8 1 T74 2 T205 2 T180 1
auto[68:71] auto[0] 5 1 T218 1 T321 2 T375 2
auto[68:71] auto[1] 5 1 T218 1 T321 2 T375 2
auto[72:75] auto[0] 5 1 T185 1 T100 1 T246 1
auto[72:75] auto[1] 5 1 T185 1 T100 1 T246 1
auto[76:79] auto[0] 10 1 T84 1 T199 1 T83 1
auto[76:79] auto[1] 10 1 T84 1 T199 1 T83 1
auto[80:83] auto[0] 9 1 T107 1 T71 1 T218 1
auto[80:83] auto[1] 9 1 T107 1 T71 1 T218 1
auto[84:87] auto[0] 14 1 T7 1 T93 2 T208 1
auto[84:87] auto[1] 14 1 T7 1 T93 2 T208 1
auto[88:91] auto[0] 81 1 T4 2 T9 1 T12 1
auto[88:91] auto[1] 81 1 T4 2 T9 1 T12 1
auto[92:95] auto[0] 9 1 T82 1 T193 2 T229 2
auto[92:95] auto[1] 9 1 T82 1 T193 2 T229 2
auto[96:99] auto[0] 8 1 T223 1 T274 1 T344 2
auto[96:99] auto[1] 8 1 T223 1 T274 1 T344 2
auto[100:103] auto[0] 8 1 T208 1 T280 1 T254 1
auto[100:103] auto[1] 8 1 T208 1 T280 1 T254 1
auto[104:107] auto[0] 117 1 T4 1 T5 1 T7 1
auto[104:107] auto[1] 205 1 T1 2 T4 1 T5 1
auto[108:111] auto[0] 14 1 T206 1 T258 2 T263 2
auto[108:111] auto[1] 14 1 T206 1 T258 2 T263 2
auto[112:115] auto[0] 10 1 T76 4 T345 2 T275 1
auto[112:115] auto[1] 10 1 T76 4 T345 2 T275 1
auto[116:119] auto[0] 11 1 T196 1 T6 1 T254 2
auto[116:119] auto[1] 11 1 T196 1 T6 1 T254 2
auto[120:123] auto[0] 8 1 T86 2 T318 1 T287 2
auto[120:123] auto[1] 8 1 T86 2 T318 1 T287 2
auto[124:127] auto[0] 11 1 T79 2 T288 1 T229 1
auto[124:127] auto[1] 11 1 T79 2 T288 1 T229 1
auto[128:131] auto[0] 7 1 T82 1 T72 1 T239 3
auto[128:131] auto[1] 7 1 T82 1 T72 1 T239 3
auto[132:135] auto[0] 12 1 T107 1 T280 1 T180 1
auto[132:135] auto[1] 12 1 T107 1 T280 1 T180 1
auto[136:139] auto[0] 11 1 T81 1 T219 1 T258 1
auto[136:139] auto[1] 11 1 T81 1 T219 1 T258 1
auto[140:143] auto[0] 14 1 T192 1 T193 1 T84 1
auto[140:143] auto[1] 14 1 T192 1 T193 1 T84 1
auto[144:147] auto[0] 7 1 T107 1 T81 1 T252 1
auto[144:147] auto[1] 7 1 T107 1 T81 1 T252 1
auto[148:151] auto[0] 11 1 T286 1 T345 3 T220 3
auto[148:151] auto[1] 11 1 T286 1 T345 3 T220 3
auto[152:155] auto[0] 11 1 T77 1 T27 1 T85 1
auto[152:155] auto[1] 11 1 T77 1 T27 1 T85 1
auto[156:159] auto[0] 93 1 T7 3 T8 1 T46 1
auto[156:159] auto[1] 93 1 T7 3 T8 1 T46 1
auto[160:163] auto[0] 5 1 T223 1 T221 1 T243 1
auto[160:163] auto[1] 5 1 T223 1 T221 1 T243 1
auto[164:167] auto[0] 10 1 T71 2 T253 1 T58 1
auto[164:167] auto[1] 10 1 T71 2 T253 1 T58 1
auto[168:171] auto[0] 12 1 T45 2 T6 1 T253 1
auto[168:171] auto[1] 12 1 T45 2 T6 1 T253 1
auto[172:175] auto[0] 8 1 T27 2 T81 2 T195 1
auto[172:175] auto[1] 8 1 T27 2 T81 2 T195 1
auto[176:179] auto[0] 5 1 T376 2 T201 2 T377 1
auto[176:179] auto[1] 5 1 T376 2 T201 2 T377 1
auto[180:183] auto[0] 30 1 T25 2 T26 2 T27 1
auto[180:183] auto[1] 30 1 T25 2 T26 2 T27 1
auto[184:187] auto[0] 96 1 T8 2 T12 1 T110 2
auto[184:187] auto[1] 186 1 T1 4 T8 2 T12 1
auto[188:191] auto[0] 5 1 T245 3 T180 1 T361 1
auto[188:191] auto[1] 5 1 T245 3 T180 1 T361 1
auto[192:195] auto[0] 7 1 T7 2 T71 3 T83 1
auto[192:195] auto[1] 7 1 T7 2 T71 3 T83 1
auto[196:199] auto[0] 1 1 T185 1 - - - -
auto[196:199] auto[1] 1 1 T185 1 - - - -
auto[200:203] auto[0] 15 1 T196 1 T71 2 T84 2
auto[200:203] auto[1] 15 1 T196 1 T71 2 T84 2
auto[204:207] auto[0] 3 1 T79 1 T81 1 T258 1
auto[204:207] auto[1] 3 1 T79 1 T81 1 T258 1
auto[208:211] auto[0] 7 1 T252 1 T74 1 T321 1
auto[208:211] auto[1] 7 1 T252 1 T74 1 T321 1
auto[212:215] auto[0] 6 1 T45 1 T232 1 T201 1
auto[212:215] auto[1] 6 1 T45 1 T232 1 T201 1
auto[216:219] auto[0] 3 1 T263 1 T292 2 - -
auto[216:219] auto[1] 3 1 T263 1 T292 2 - -
auto[220:223] auto[0] 9 1 T274 2 T229 2 T345 1
auto[220:223] auto[1] 9 1 T274 2 T229 2 T345 1
auto[224:227] auto[0] 5 1 T217 1 T292 1 T338 2
auto[224:227] auto[1] 5 1 T217 1 T292 1 T338 2
auto[228:231] auto[0] 10 1 T223 1 T83 1 T228 2
auto[228:231] auto[1] 10 1 T223 1 T83 1 T228 2
auto[232:235] auto[0] 136 1 T28 2 T197 1 T25 1
auto[232:235] auto[1] 220 1 T1 3 T28 2 T197 1
auto[236:239] auto[0] 5 1 T93 1 T288 1 T185 1
auto[236:239] auto[1] 5 1 T93 1 T288 1 T185 1
auto[240:243] auto[0] 7 1 T79 1 T288 1 T185 1
auto[240:243] auto[1] 7 1 T79 1 T288 1 T185 1
auto[244:247] auto[0] 5 1 T80 1 T252 1 T253 1
auto[244:247] auto[1] 5 1 T80 1 T252 1 T253 1
auto[248:251] auto[0] 7 1 T82 1 T254 1 T85 4
auto[248:251] auto[1] 7 1 T82 1 T254 1 T85 4
auto[252:255] auto[0] 3 1 T291 3 - - - -
auto[252:255] auto[1] 3 1 T291 3 - - - -

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