Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
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Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 66 0 66 100.00
Crosses 128 0 128 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_filtered 2 0 2 100.00 100 1 1 2
cp_opcode 64 0 64 100.00 100 1 1 64


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 128 0 128 100.00 100 1 1 0


Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_filtered

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1646 1 T4 3 T6 2 T8 3
auto[1] 2158 1 T4 3 T5 15 T6 2



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 64 0 64 100.00


Automatically Generated Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] 266 1 T5 4 T11 4 T75 4
auto[4:7] 236 1 T6 2 T43 4 T76 2
auto[8:11] 278 1 T5 3 T12 7 T76 8
auto[12:15] 12 1 T194 4 T248 6 T302 2
auto[16:19] 22 1 T45 2 T183 2 T93 2
auto[20:23] 180 1 T44 2 T130 2 T131 4
auto[24:27] 8 1 T82 4 T359 4 - -
auto[28:31] 36 1 T75 2 T240 2 T267 4
auto[32:35] 6 1 T339 2 T80 4 - -
auto[36:39] 22 1 T272 6 T91 2 T234 2
auto[40:43] 20 1 T76 2 T70 4 T73 2
auto[44:47] 24 1 T9 4 T76 2 T27 4
auto[48:51] 8 1 T346 2 T77 2 T183 2
auto[52:55] 228 1 T11 4 T45 4 T99 2
auto[56:59] 349 1 T9 2 T12 5 T43 4
auto[60:63] 2 1 T104 2 - - - -
auto[64:67] 22 1 T71 2 T256 4 T82 4
auto[68:71] 8 1 T287 2 T283 2 T359 2
auto[72:75] 20 1 T220 4 T210 4 T234 2
auto[76:79] 38 1 T194 4 T274 2 T289 4
auto[80:83] 24 1 T43 6 T248 8 T222 4
auto[84:87] 26 1 T272 4 T267 4 T234 2
auto[88:91] 182 1 T4 2 T75 4 T45 4
auto[92:95] 8 1 T287 2 T339 2 T80 2
auto[96:99] 10 1 T300 2 T199 2 T248 2
auto[100:103] 14 1 T287 2 T351 2 T253 4
auto[104:107] 197 1 T11 2 T12 4 T75 4
auto[108:111] 12 1 T104 2 T289 2 T247 2
auto[112:115] 14 1 T99 2 T186 4 T281 2
auto[116:119] 10 1 T11 2 T203 4 T224 2
auto[120:123] 18 1 T70 2 T210 2 T322 2
auto[124:127] 30 1 T75 4 T71 10 T220 2
auto[128:131] 26 1 T86 4 T276 2 T322 6
auto[132:135] 30 1 T76 4 T194 4 T274 2
auto[136:139] 24 1 T207 2 T229 2 T236 4
auto[140:143] 18 1 T70 4 T199 2 T183 2
auto[144:147] 18 1 T45 4 T195 2 T72 2
auto[148:151] 12 1 T43 6 T98 2 T27 2
auto[152:155] 16 1 T8 2 T86 2 T267 4
auto[156:159] 200 1 T49 4 T45 2 T27 2
auto[160:163] 14 1 T92 4 T199 4 T249 2
auto[164:167] 34 1 T6 2 T70 6 T355 2
auto[168:171] 14 1 T99 2 T195 2 T236 2
auto[172:175] 20 1 T71 2 T69 2 T57 4
auto[176:179] 22 1 T76 2 T267 4 T183 4
auto[180:183] 64 1 T76 2 T27 2 T28 6
auto[184:187] 310 1 T5 4 T9 2 T11 2
auto[188:191] 20 1 T45 2 T269 2 T346 4
auto[192:195] 16 1 T269 2 T295 2 T186 6
auto[196:199] 10 1 T198 2 T79 2 T80 2
auto[200:203] 30 1 T195 4 T300 2 T184 2
auto[204:207] 16 1 T237 2 T327 2 T356 2
auto[208:211] 14 1 T9 4 T43 4 T295 4
auto[212:215] 30 1 T27 4 T289 2 T265 2
auto[216:219] 8 1 T186 4 T204 2 T298 2
auto[220:223] 10 1 T240 4 T80 2 T283 4
auto[224:227] 20 1 T70 2 T195 4 T276 2
auto[228:231] 12 1 T368 4 T333 2 T251 2
auto[232:235] 370 1 T4 4 T5 4 T11 2
auto[236:239] 20 1 T194 2 T222 2 T184 4
auto[240:243] 12 1 T240 2 T207 2 T93 2
auto[244:247] 18 1 T268 4 T247 4 T344 2
auto[248:251] 24 1 T74 2 T27 4 T274 2
auto[252:255] 22 1 T8 4 T11 6 T45 4



Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for cr_all

Bins
cp_opcodecp_filteredCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] auto[0] 104 1 T11 2 T75 2 T194 5
auto[0:3] auto[1] 162 1 T5 4 T11 2 T75 2
auto[4:7] auto[0] 118 1 T6 1 T43 2 T76 1
auto[4:7] auto[1] 118 1 T6 1 T43 2 T76 1
auto[8:11] auto[0] 98 1 T76 4 T49 1 T44 1
auto[8:11] auto[1] 180 1 T5 3 T12 7 T76 4
auto[12:15] auto[0] 6 1 T194 2 T248 3 T302 1
auto[12:15] auto[1] 6 1 T194 2 T248 3 T302 1
auto[16:19] auto[0] 11 1 T45 1 T183 1 T93 1
auto[16:19] auto[1] 11 1 T45 1 T183 1 T93 1
auto[20:23] auto[0] 90 1 T44 1 T130 1 T131 2
auto[20:23] auto[1] 90 1 T44 1 T130 1 T131 2
auto[24:27] auto[0] 4 1 T82 2 T359 2 - -
auto[24:27] auto[1] 4 1 T82 2 T359 2 - -
auto[28:31] auto[0] 18 1 T75 1 T240 1 T267 2
auto[28:31] auto[1] 18 1 T75 1 T240 1 T267 2
auto[32:35] auto[0] 3 1 T339 1 T80 2 - -
auto[32:35] auto[1] 3 1 T339 1 T80 2 - -
auto[36:39] auto[0] 11 1 T272 3 T91 1 T234 1
auto[36:39] auto[1] 11 1 T272 3 T91 1 T234 1
auto[40:43] auto[0] 10 1 T76 1 T70 2 T73 1
auto[40:43] auto[1] 10 1 T76 1 T70 2 T73 1
auto[44:47] auto[0] 12 1 T9 2 T76 1 T27 2
auto[44:47] auto[1] 12 1 T9 2 T76 1 T27 2
auto[48:51] auto[0] 4 1 T346 1 T77 1 T183 1
auto[48:51] auto[1] 4 1 T346 1 T77 1 T183 1
auto[52:55] auto[0] 114 1 T11 2 T45 2 T99 1
auto[52:55] auto[1] 114 1 T11 2 T45 2 T99 1
auto[56:59] auto[0] 124 1 T9 1 T43 2 T76 1
auto[56:59] auto[1] 225 1 T9 1 T12 5 T43 2
auto[60:63] auto[0] 1 1 T104 1 - - - -
auto[60:63] auto[1] 1 1 T104 1 - - - -
auto[64:67] auto[0] 11 1 T71 1 T256 2 T82 2
auto[64:67] auto[1] 11 1 T71 1 T256 2 T82 2
auto[68:71] auto[0] 4 1 T287 1 T283 1 T359 1
auto[68:71] auto[1] 4 1 T287 1 T283 1 T359 1
auto[72:75] auto[0] 10 1 T220 2 T210 2 T234 1
auto[72:75] auto[1] 10 1 T220 2 T210 2 T234 1
auto[76:79] auto[0] 19 1 T194 2 T274 1 T289 2
auto[76:79] auto[1] 19 1 T194 2 T274 1 T289 2
auto[80:83] auto[0] 12 1 T43 3 T248 4 T222 2
auto[80:83] auto[1] 12 1 T43 3 T248 4 T222 2
auto[84:87] auto[0] 13 1 T272 2 T267 2 T234 1
auto[84:87] auto[1] 13 1 T272 2 T267 2 T234 1
auto[88:91] auto[0] 91 1 T4 1 T75 2 T45 2
auto[88:91] auto[1] 91 1 T4 1 T75 2 T45 2
auto[92:95] auto[0] 4 1 T287 1 T339 1 T80 1
auto[92:95] auto[1] 4 1 T287 1 T339 1 T80 1
auto[96:99] auto[0] 5 1 T300 1 T199 1 T248 1
auto[96:99] auto[1] 5 1 T300 1 T199 1 T248 1
auto[100:103] auto[0] 7 1 T287 1 T351 1 T253 2
auto[100:103] auto[1] 7 1 T287 1 T351 1 T253 2
auto[104:107] auto[0] 73 1 T11 1 T75 2 T196 2
auto[104:107] auto[1] 124 1 T11 1 T12 4 T75 2
auto[108:111] auto[0] 6 1 T104 1 T289 1 T247 1
auto[108:111] auto[1] 6 1 T104 1 T289 1 T247 1
auto[112:115] auto[0] 7 1 T99 1 T186 2 T281 1
auto[112:115] auto[1] 7 1 T99 1 T186 2 T281 1
auto[116:119] auto[0] 5 1 T11 1 T203 2 T224 1
auto[116:119] auto[1] 5 1 T11 1 T203 2 T224 1
auto[120:123] auto[0] 9 1 T70 1 T210 1 T322 1
auto[120:123] auto[1] 9 1 T70 1 T210 1 T322 1
auto[124:127] auto[0] 15 1 T75 2 T71 5 T220 1
auto[124:127] auto[1] 15 1 T75 2 T71 5 T220 1
auto[128:131] auto[0] 13 1 T86 2 T276 1 T322 3
auto[128:131] auto[1] 13 1 T86 2 T276 1 T322 3
auto[132:135] auto[0] 15 1 T76 2 T194 2 T274 1
auto[132:135] auto[1] 15 1 T76 2 T194 2 T274 1
auto[136:139] auto[0] 12 1 T207 1 T229 1 T236 2
auto[136:139] auto[1] 12 1 T207 1 T229 1 T236 2
auto[140:143] auto[0] 9 1 T70 2 T199 1 T183 1
auto[140:143] auto[1] 9 1 T70 2 T199 1 T183 1
auto[144:147] auto[0] 9 1 T45 2 T195 1 T72 1
auto[144:147] auto[1] 9 1 T45 2 T195 1 T72 1
auto[148:151] auto[0] 6 1 T43 3 T98 1 T27 1
auto[148:151] auto[1] 6 1 T43 3 T98 1 T27 1
auto[152:155] auto[0] 8 1 T8 1 T86 1 T267 2
auto[152:155] auto[1] 8 1 T8 1 T86 1 T267 2
auto[156:159] auto[0] 100 1 T49 2 T45 1 T27 1
auto[156:159] auto[1] 100 1 T49 2 T45 1 T27 1
auto[160:163] auto[0] 7 1 T92 2 T199 2 T249 1
auto[160:163] auto[1] 7 1 T92 2 T199 2 T249 1
auto[164:167] auto[0] 17 1 T6 1 T70 3 T355 1
auto[164:167] auto[1] 17 1 T6 1 T70 3 T355 1
auto[168:171] auto[0] 7 1 T99 1 T195 1 T236 1
auto[168:171] auto[1] 7 1 T99 1 T195 1 T236 1
auto[172:175] auto[0] 10 1 T71 1 T69 1 T57 2
auto[172:175] auto[1] 10 1 T71 1 T69 1 T57 2
auto[176:179] auto[0] 11 1 T76 1 T267 2 T183 2
auto[176:179] auto[1] 11 1 T76 1 T267 2 T183 2
auto[180:183] auto[0] 32 1 T76 1 T27 1 T28 3
auto[180:183] auto[1] 32 1 T76 1 T27 1 T28 3
auto[184:187] auto[0] 98 1 T9 1 T11 1 T49 2
auto[184:187] auto[1] 212 1 T5 4 T9 1 T11 1
auto[188:191] auto[0] 10 1 T45 1 T269 1 T346 2
auto[188:191] auto[1] 10 1 T45 1 T269 1 T346 2
auto[192:195] auto[0] 8 1 T269 1 T295 1 T186 3
auto[192:195] auto[1] 8 1 T269 1 T295 1 T186 3
auto[196:199] auto[0] 5 1 T198 1 T79 1 T80 1
auto[196:199] auto[1] 5 1 T198 1 T79 1 T80 1
auto[200:203] auto[0] 15 1 T195 2 T300 1 T184 1
auto[200:203] auto[1] 15 1 T195 2 T300 1 T184 1
auto[204:207] auto[0] 8 1 T237 1 T327 1 T356 1
auto[204:207] auto[1] 8 1 T237 1 T327 1 T356 1
auto[208:211] auto[0] 7 1 T9 2 T43 2 T295 2
auto[208:211] auto[1] 7 1 T9 2 T43 2 T295 2
auto[212:215] auto[0] 15 1 T27 2 T289 1 T265 1
auto[212:215] auto[1] 15 1 T27 2 T289 1 T265 1
auto[216:219] auto[0] 4 1 T186 2 T204 1 T298 1
auto[216:219] auto[1] 4 1 T186 2 T204 1 T298 1
auto[220:223] auto[0] 5 1 T240 2 T80 1 T283 2
auto[220:223] auto[1] 5 1 T240 2 T80 1 T283 2
auto[224:227] auto[0] 10 1 T70 1 T195 2 T276 1
auto[224:227] auto[1] 10 1 T70 1 T195 2 T276 1
auto[228:231] auto[0] 6 1 T368 2 T333 1 T251 1
auto[228:231] auto[1] 6 1 T368 2 T333 1 T251 1
auto[232:235] auto[0] 132 1 T4 2 T11 1 T44 1
auto[232:235] auto[1] 238 1 T4 2 T5 4 T11 1
auto[236:239] auto[0] 10 1 T194 1 T222 1 T184 2
auto[236:239] auto[1] 10 1 T194 1 T222 1 T184 2
auto[240:243] auto[0] 6 1 T240 1 T207 1 T93 1
auto[240:243] auto[1] 6 1 T240 1 T207 1 T93 1
auto[244:247] auto[0] 9 1 T268 2 T247 2 T344 1
auto[244:247] auto[1] 9 1 T268 2 T247 2 T344 1
auto[248:251] auto[0] 12 1 T74 1 T27 2 T274 1
auto[248:251] auto[1] 12 1 T74 1 T27 2 T274 1
auto[252:255] auto[0] 11 1 T8 2 T11 3 T45 2
auto[252:255] auto[1] 11 1 T8 2 T11 3 T45 2

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