Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
99.32	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	1	127	99.22

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	1	127	99.22	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	2956	1			T24	68		T169	18		T170	20
values[1]	3413	1			T2	20		T3	22		T12	22
values[2]	2929	1			T36	105		T18	20		T26	43
values[3]	3135	1			T2	20		T12	20		T16	44
values[4]	3473	1			T2	20		T24	21		T159	12
values[5]	3206	1			T2	48		T5	6		T24	21
values[6]	3145	1			T2	24		T35	14		T24	42
values[7]	3201	1			T6	4		T84	12		T32	2

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3394	1			T2	20		T5	6		T24	64
values[1]	2926	1			T2	28		T12	22		T171	12
values[2]	2797	1			T2	20		T6	4		T36	105
values[3]	3466	1			T2	44		T167	22		T24	24
values[4]	2814	1			T35	14		T16	24		T24	22
values[5]	3811	1			T2	20		T16	20		T24	83
values[6]	2822	1			T12	20		T24	22		T172	18
values[7]	3428	1			T3	22		T24	24		T173	8

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

25023

1

T2

125

T3

21

T5

6

auto[1]

435

1

T2

7

T3

1

T16

1

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	1	127	99.22	1

Automatically Generated Cross Bins for cr_all

Uncovered bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	[values[3]]	[values[0]]	0	1	1

Covered bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	535	1			T24	18		T26	18		T27	109
auto[0]	values[0]	values[1]	170	1			T169	18		T26	20		T162	20
auto[0]	values[0]	values[2]	205	1			T174	16		T175	8		T176	26
auto[0]	values[0]	values[3]	399	1			T24	23		T26	21		T177	2
auto[0]	values[0]	values[4]	474	1			T170	20		T31	20		T178	20
auto[0]	values[0]	values[5]	436	1			T30	68		T179	8		T180	70
auto[0]	values[0]	values[6]	321	1			T181	18		T182	20		T183	22
auto[0]	values[0]	values[7]	353	1			T24	23		T184	8		T185	65
auto[0]	values[1]	values[0]	384	1			T24	44		T30	20		T31	80
auto[0]	values[1]	values[1]	485	1			T12	22		T18	20		T26	48
auto[0]	values[1]	values[2]	404	1			T185	53		T147	23		T186	20
auto[0]	values[1]	values[3]	473	1			T168	20		T26	29		T29	38
auto[0]	values[1]	values[4]	308	1			T187	8		T161	31		T182	20
auto[0]	values[1]	values[5]	648	1			T2	20		T24	21		T25	20
auto[0]	values[1]	values[6]	260	1			T27	20		T28	20		T147	20
auto[0]	values[1]	values[7]	409	1			T3	21		T173	8		T29	20
auto[0]	values[2]	values[0]	626	1			T28	25		T29	54		T30	197
auto[0]	values[2]	values[1]	312	1			T27	41		T188	18		T189	21
auto[0]	values[2]	values[2]	450	1			T36	105		T18	19		T129	20
auto[0]	values[2]	values[3]	453	1			T28	30		T30	53		T190	10
auto[0]	values[2]	values[4]	384	1			T26	43		T191	2		T192	6
auto[0]	values[2]	values[5]	211	1			T193	19		T194	18		T133	23
auto[0]	values[2]	values[6]	217	1			T185	20		T195	6		T193	22
auto[0]	values[2]	values[7]	231	1			T161	33		T196	10		T197	6
auto[0]	values[3]	values[0]	324	1			T198	2		T178	20		T199	20
auto[0]	values[3]	values[1]	338	1			T171	12		T49	2		T200	20
auto[0]	values[3]	values[2]	519	1			T26	18		T127	14		T193	21
auto[0]	values[3]	values[3]	280	1			T2	19		T167	22		T18	20
auto[0]	values[3]	values[4]	242	1			T16	24		T85	24		T27	23
auto[0]	values[3]	values[5]	595	1			T16	19		T28	19		T161	20
auto[0]	values[3]	values[6]	388	1			T12	20		T24	22		T25	20
auto[0]	values[3]	values[7]	397	1			T26	60		T129	19		T148	81
auto[0]	values[4]	values[0]	321	1			T2	20		T29	19		T129	30
auto[0]	values[4]	values[1]	591	1			T158	52		T201	20		T189	23
auto[0]	values[4]	values[2]	430	1			T129	23		T202	14		T203	10
auto[0]	values[4]	values[3]	352	1			T30	28		T201	20		T186	20
auto[0]	values[4]	values[4]	266	1			T26	20		T129	35		T204	4
auto[0]	values[4]	values[5]	652	1			T24	21		T28	39		T205	12
auto[0]	values[4]	values[6]	534	1			T159	12		T63	8		T18	25
auto[0]	values[4]	values[7]	272	1			T18	20		T27	20		T31	37
auto[0]	values[5]	values[0]	318	1			T5	6		T25	20		T27	33
auto[0]	values[5]	values[1]	365	1			T2	25		T66	10		T31	77
auto[0]	values[5]	values[2]	226	1			T2	20		T28	22		T31	50
auto[0]	values[5]	values[3]	636	1			T18	19		T31	69		T185	48
auto[0]	values[5]	values[4]	264	1			T27	20		T129	20		T201	29
auto[0]	values[5]	values[5]	406	1			T24	21		T18	19		T31	83
auto[0]	values[5]	values[6]	322	1			T178	23		T206	14		T185	30
auto[0]	values[5]	values[7]	614	1			T25	68		T64	4		T18	21
auto[0]	values[6]	values[0]	326	1			T18	32		T31	93		T126	12
auto[0]	values[6]	values[1]	317	1			T207	36		T30	20		T129	83
auto[0]	values[6]	values[2]	317	1			T185	20		T208	46		T209	22
auto[0]	values[6]	values[3]	411	1			T2	21		T28	160		T210	8
auto[0]	values[6]	values[4]	443	1			T35	14		T24	19		T18	20
auto[0]	values[6]	values[5]	508	1			T24	20		T26	20		T79	4
auto[0]	values[6]	values[6]	342	1			T172	18		T25	35		T211	2
auto[0]	values[6]	values[7]	435	1			T31	20		T178	20		T38	23
auto[0]	values[7]	values[0]	504	1			T18	40		T208	26		T48	6
auto[0]	values[7]	values[1]	289	1			T122	4		T147	22		T186	29
auto[0]	values[7]	values[2]	199	1			T6	4		T84	12		T32	2
auto[0]	values[7]	values[3]	403	1			T178	23		T129	18		T147	21
auto[0]	values[7]	values[4]	385	1			T178	23		T121	18		T212	4
auto[0]	values[7]	values[5]	300	1			T160	12		T213	31		T26	46
auto[0]	values[7]	values[6]	401	1			T27	32		T214	4		T215	8
auto[0]	values[7]	values[7]	643	1			T30	191		T216	24		T193	20
auto[1]	values[0]	values[0]	12	1			T24	2		T26	3		T29	1
auto[1]	values[0]	values[1]	5	1			T217	2		T218	3		-	-
auto[1]	values[0]	values[2]	3	1			T219	1		T220	2		-	-
auto[1]	values[0]	values[3]	12	1			T24	1		T26	1		T193	2
auto[1]	values[0]	values[4]	13	1			T221	2		T200	2		T38	1
auto[1]	values[0]	values[5]	5	1			T193	1		T222	1		T223	3
auto[1]	values[0]	values[6]	4	1			T224	1		T40	1		T133	2
auto[1]	values[0]	values[7]	9	1			T24	1		T185	1		T38	3
auto[1]	values[1]	values[0]	3	1			T225	3		-	-		-	-
auto[1]	values[1]	values[1]	8	1			T26	1		T29	1		T226	1
auto[1]	values[1]	values[2]	5	1			T185	1		T147	1		T218	1
auto[1]	values[1]	values[3]	6	1			T26	1		T40	1		T227	4
auto[1]	values[1]	values[4]	6	1			T161	2		T228	1		T151	3
auto[1]	values[1]	values[5]	5	1			T193	1		T182	1		T194	1
auto[1]	values[1]	values[6]	2	1			T182	1		T229	1		-	-
auto[1]	values[1]	values[7]	7	1			T3	1		T147	1		T230	1
auto[1]	values[2]	values[0]	12	1			T28	1		T30	1		T231	2
auto[1]	values[2]	values[1]	6	1			T27	2		T189	3		T219	1
auto[1]	values[2]	values[2]	7	1			T18	1		T219	4		T133	1
auto[1]	values[2]	values[3]	3	1			T232	1		T233	1		T234	1
auto[1]	values[2]	values[4]	8	1			T193	1		T228	1		T232	1
auto[1]	values[2]	values[5]	4	1			T193	1		T194	2		T233	1
auto[1]	values[2]	values[6]	1	1			T235	1		-	-		-	-
auto[1]	values[2]	values[7]	4	1			T161	1		T236	1		T223	2
auto[1]	values[3]	values[1]	5	1			T218	3		T152	1		T235	1
auto[1]	values[3]	values[2]	7	1			T26	2		T176	1		T224	3
auto[1]	values[3]	values[3]	7	1			T2	1		T183	1		T132	2
auto[1]	values[3]	values[4]	2	1			T176	2		-	-		-	-
auto[1]	values[3]	values[5]	6	1			T16	1		T28	1		T161	1
auto[1]	values[3]	values[6]	7	1			T26	2		T185	1		T148	2
auto[1]	values[3]	values[7]	18	1			T26	1		T129	1		T148	5
auto[1]	values[4]	values[0]	5	1			T29	1		T129	1		T183	2
auto[1]	values[4]	values[1]	9	1			T232	3		T237	2		T238	3
auto[1]	values[4]	values[2]	13	1			T129	1		T239	1		T40	1
auto[1]	values[4]	values[3]	6	1			T38	1		T240	3		T241	2
auto[1]	values[4]	values[4]	3	1			T242	2		T241	1		-	-
auto[1]	values[4]	values[5]	9	1			T28	3		T38	1		T194	3
auto[1]	values[4]	values[6]	6	1			T18	4		T243	1		T235	1
auto[1]	values[4]	values[7]	4	1			T31	1		T244	1		T240	2
auto[1]	values[5]	values[0]	12	1			T27	2		T30	1		T161	2
auto[1]	values[5]	values[1]	8	1			T2	3		T31	2		T245	1
auto[1]	values[5]	values[2]	3	1			T31	1		T186	2		-	-
auto[1]	values[5]	values[3]	8	1			T18	1		T185	2		T226	2
auto[1]	values[5]	values[4]	1	1			T38	1		-	-		-	-
auto[1]	values[5]	values[5]	8	1			T18	1		T31	4		T201	1
auto[1]	values[5]	values[6]	6	1			T185	1		T246	4		T134	1
auto[1]	values[5]	values[7]	9	1			T147	3		T194	3		T220	2
auto[1]	values[6]	values[0]	3	1			T18	1		T186	1		T232	1
auto[1]	values[6]	values[1]	7	1			T129	4		T194	1		T233	1
auto[1]	values[6]	values[2]	7	1			T208	2		T193	1		T133	2
auto[1]	values[6]	values[3]	6	1			T2	3		T148	2		T223	1
auto[1]	values[6]	values[4]	4	1			T24	3		T247	1		-	-
auto[1]	values[6]	values[5]	10	1			T248	1		T148	3		T238	1
auto[1]	values[6]	values[6]	3	1			T129	2		T249	1		-	-
auto[1]	values[6]	values[7]	6	1			T224	3		T232	2		T223	1
auto[1]	values[7]	values[0]	9	1			T148	1		T232	3		T250	5
auto[1]	values[7]	values[1]	11	1			T147	2		T152	2		T251	2
auto[1]	values[7]	values[2]	2	1			T252	2		-	-		-	-
auto[1]	values[7]	values[3]	11	1			T129	2		T230	1		T218	1
auto[1]	values[7]	values[4]	11	1			T178	1		T121	4		T193	1
auto[1]	values[7]	values[5]	8	1			T29	1		T228	3		T253	1
auto[1]	values[7]	values[6]	8	1			T27	1		T193	4		T254	2
auto[1]	values[7]	values[7]	17	1			T30	3		T189	2		T229	2