Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3370	1			T53	24		T254	10		T57	73
values[1]	4318	1			T4	2		T14	26		T57	217
values[2]	3407	1			T53	20		T57	40		T58	20
values[3]	3683	1			T16	18		T111	6		T57	124
values[4]	4097	1			T11	4		T50	39		T60	18
values[5]	3346	1			T3	18		T27	4		T53	20
values[6]	3196	1			T15	50		T41	8		T56	12
values[7]	3323	1			T15	27		T53	20		T57	20

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3614	1			T15	20		T56	12		T256	12
values[1]	3245	1			T11	4		T16	18		T27	4
values[2]	4224	1			T15	30		T53	24		T254	10
values[3]	3661	1			T57	101		T214	12		T64	14
values[4]	4206	1			T15	27		T41	8		T53	72
values[5]	3993	1			T4	2		T50	39		T53	20
values[6]	3130	1			T3	18		T14	26		T53	20
values[7]	2667	1			T111	6		T60	18		T53	25

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

27952

1

T3

18

T4

2

T11

4

auto[1]

788

1

T14

6

T56

2

T53

3

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	465	1			T184	58		T203	21		T218	23
auto[0]	values[0]	values[1]	321	1			T24	21		T204	20		T220	25
auto[0]	values[0]	values[2]	569	1			T53	23		T254	10		T57	53
auto[0]	values[0]	values[3]	459	1			T57	20		T59	19		T224	14
auto[0]	values[0]	values[4]	232	1			T58	21		T290	4		T271	20
auto[0]	values[0]	values[5]	468	1			T54	57		T198	18		T275	8
auto[0]	values[0]	values[6]	388	1			T58	20		T61	12		T212	20
auto[0]	values[0]	values[7]	355	1			T288	6		T23	44		T212	20
auto[0]	values[1]	values[0]	551	1			T94	20		T54	20		T291	4
auto[0]	values[1]	values[1]	644	1			T57	33		T277	12		T203	21
auto[0]	values[1]	values[2]	316	1			T263	4		T23	22		T203	21
auto[0]	values[1]	values[3]	503	1			T214	12		T64	10		T59	20
auto[0]	values[1]	values[4]	618	1			T244	24		T204	102		T239	17
auto[0]	values[1]	values[5]	754	1			T4	2		T57	114		T62	17
auto[0]	values[1]	values[6]	462	1			T14	20		T283	12		T54	37
auto[0]	values[1]	values[7]	344	1			T57	66		T62	20		T38	20
auto[0]	values[2]	values[0]	506	1			T57	40		T58	20		T185	22
auto[0]	values[2]	values[1]	197	1			T207	20		T204	18		T220	21
auto[0]	values[2]	values[2]	513	1			T21	34		T23	20		T94	18
auto[0]	values[2]	values[3]	547	1			T21	20		T218	24		T204	15
auto[0]	values[2]	values[4]	644	1			T53	20		T63	6		T59	20
auto[0]	values[2]	values[5]	331	1			T21	20		T231	20		T198	20
auto[0]	values[2]	values[6]	299	1			T261	6		T207	20		T292	4
auto[0]	values[2]	values[7]	280	1			T222	4		T23	25		T293	22
auto[0]	values[3]	values[0]	301	1			T57	43		T238	6		T23	23
auto[0]	values[3]	values[1]	497	1			T16	18		T23	26		T24	40
auto[0]	values[3]	values[2]	759	1			T58	22		T62	20		T65	18
auto[0]	values[3]	values[3]	436	1			T57	78		T59	19		T54	19
auto[0]	values[3]	values[4]	538	1			T94	20		T24	20		T218	19
auto[0]	values[3]	values[5]	477	1			T59	19		T54	121		T199	4
auto[0]	values[3]	values[6]	331	1			T58	90		T21	20		T23	40
auto[0]	values[3]	values[7]	232	1			T111	6		T218	63		T294	2
auto[0]	values[4]	values[0]	505	1			T58	39		T23	31		T233	18
auto[0]	values[4]	values[1]	585	1			T11	4		T217	8		T59	20
auto[0]	values[4]	values[2]	276	1			T262	53		T201	20		T295	12
auto[0]	values[4]	values[3]	520	1			T107	10		T227	20		T234	23
auto[0]	values[4]	values[4]	586	1			T53	52		T57	26		T92	4
auto[0]	values[4]	values[5]	584	1			T50	39		T203	21		T212	66
auto[0]	values[4]	values[6]	352	1			T62	18		T59	19		T23	17
auto[0]	values[4]	values[7]	582	1			T60	18		T58	20		T62	19
auto[0]	values[5]	values[0]	388	1			T94	18		T225	17		T211	27
auto[0]	values[5]	values[1]	388	1			T27	4		T53	20		T187	16
auto[0]	values[5]	values[2]	632	1			T62	39		T54	19		T220	22
auto[0]	values[5]	values[3]	307	1			T220	42		T296	2		T211	79
auto[0]	values[5]	values[4]	438	1			T105	12		T204	37		T297	6
auto[0]	values[5]	values[5]	416	1			T38	24		T211	20		T272	10
auto[0]	values[5]	values[6]	479	1			T3	18		T181	8		T59	20
auto[0]	values[5]	values[7]	219	1			T58	24		T89	6		T248	8
auto[0]	values[6]	values[0]	408	1			T15	20		T56	10		T256	12
auto[0]	values[6]	values[1]	268	1			T57	42		T230	24		T23	20
auto[0]	values[6]	values[2]	401	1			T15	30		T94	20		T198	20
auto[0]	values[6]	values[3]	446	1			T23	19		T54	45		T218	20
auto[0]	values[6]	values[4]	617	1			T41	8		T255	4		T57	77
auto[0]	values[6]	values[5]	431	1			T112	26		T207	20		T204	20
auto[0]	values[6]	values[6]	266	1			T53	20		T24	24		T215	19
auto[0]	values[6]	values[7]	294	1			T53	24		T247	12		T204	20
auto[0]	values[7]	values[0]	387	1			T278	6		T59	19		T94	20
auto[0]	values[7]	values[1]	256	1			T207	20		T157	21		T298	16
auto[0]	values[7]	values[2]	641	1			T23	20		T274	2		T54	34
auto[0]	values[7]	values[3]	351	1			T54	31		T207	17		T257	16
auto[0]	values[7]	values[4]	437	1			T15	27		T58	20		T38	20
auto[0]	values[7]	values[5]	408	1			T53	19		T57	20		T23	27
auto[0]	values[7]	values[6]	464	1			T94	16		T267	4		T259	33
auto[0]	values[7]	values[7]	283	1			T219	2		T215	20		T240	23
auto[1]	values[0]	values[0]	19	1			T184	1		T203	3		T218	1
auto[1]	values[0]	values[1]	8	1			T24	2		T220	2		T299	1
auto[1]	values[0]	values[2]	20	1			T53	1		T59	2		T218	2
auto[1]	values[0]	values[3]	20	1			T59	1		T224	4		T24	2
auto[1]	values[0]	values[4]	3	1			T58	2		T300	1		-	-
auto[1]	values[0]	values[5]	19	1			T54	2		T198	2		T270	3
auto[1]	values[0]	values[6]	10	1			T58	1		T61	4		T301	1
auto[1]	values[0]	values[7]	14	1			T23	3		T302	2		T160	2
auto[1]	values[1]	values[0]	17	1			T234	4		T209	2		T303	4
auto[1]	values[1]	values[1]	17	1			T203	2		T262	3		T209	1
auto[1]	values[1]	values[2]	13	1			T23	1		T304	1		T305	4
auto[1]	values[1]	values[3]	13	1			T64	4		T218	1		T220	1
auto[1]	values[1]	values[4]	21	1			T244	2		T204	3		T239	3
auto[1]	values[1]	values[5]	21	1			T57	3		T62	3		T235	2
auto[1]	values[1]	values[6]	12	1			T14	6		T177	1		T306	1
auto[1]	values[1]	values[7]	12	1			T57	1		T243	1		T307	2
auto[1]	values[2]	values[0]	10	1			T246	3		T308	3		T284	1
auto[1]	values[2]	values[1]	8	1			T204	3		T220	1		T262	1
auto[1]	values[2]	values[2]	14	1			T23	1		T94	2		T220	1
auto[1]	values[2]	values[3]	15	1			T204	5		T309	2		T225	3
auto[1]	values[2]	values[4]	16	1			T63	2		T23	1		T94	1
auto[1]	values[2]	values[5]	8	1			T307	2		T228	2		T310	1
auto[1]	values[2]	values[6]	10	1			T225	2		T234	5		T302	1
auto[1]	values[2]	values[7]	9	1			T23	2		T293	2		T289	2
auto[1]	values[3]	values[0]	9	1			T23	1		T94	2		T246	2
auto[1]	values[3]	values[1]	21	1			T24	2		T198	2		T210	2
auto[1]	values[3]	values[2]	28	1			T65	6		T59	1		T204	4
auto[1]	values[3]	values[3]	11	1			T57	3		T59	1		T54	1
auto[1]	values[3]	values[4]	10	1			T218	1		T270	2		T179	2
auto[1]	values[3]	values[5]	15	1			T59	1		T54	4		T207	1
auto[1]	values[3]	values[6]	11	1			T58	3		T94	3		T198	1
auto[1]	values[3]	values[7]	7	1			T218	4		T311	2		T312	1
auto[1]	values[4]	values[0]	7	1			T23	2		T225	2		T177	1
auto[1]	values[4]	values[1]	18	1			T54	4		T157	1		T215	2
auto[1]	values[4]	values[2]	5	1			T262	1		T160	1		T313	3
auto[1]	values[4]	values[3]	12	1			T314	2		T159	2		T315	5
auto[1]	values[4]	values[4]	17	1			T24	1		T207	2		T246	2
auto[1]	values[4]	values[5]	27	1			T212	2		T316	12		T242	1
auto[1]	values[4]	values[6]	10	1			T62	2		T59	1		T23	3
auto[1]	values[4]	values[7]	11	1			T58	2		T62	1		T211	1
auto[1]	values[5]	values[0]	20	1			T94	2		T225	3		T271	2
auto[1]	values[5]	values[1]	6	1			T58	1		T59	1		T23	1
auto[1]	values[5]	values[2]	14	1			T62	1		T54	1		T220	2
auto[1]	values[5]	values[3]	8	1			T220	2		T211	4		T317	1
auto[1]	values[5]	values[4]	10	1			T204	1		T318	1		T319	5
auto[1]	values[5]	values[5]	7	1			T38	1		T271	1		T234	2
auto[1]	values[5]	values[6]	11	1			T204	1		T216	4		T304	2
auto[1]	values[5]	values[7]	3	1			T58	1		T320	1		T321	1
auto[1]	values[6]	values[0]	3	1			T56	2		T246	1		-	-
auto[1]	values[6]	values[1]	7	1			T57	1		T203	3		T320	2
auto[1]	values[6]	values[2]	8	1			T314	2		T282	1		T322	1
auto[1]	values[6]	values[3]	8	1			T23	1		T54	1		T157	2
auto[1]	values[6]	values[4]	11	1			T57	2		T23	2		T203	2
auto[1]	values[6]	values[5]	10	1			T177	1		T179	1		T307	1
auto[1]	values[6]	values[6]	8	1			T24	2		T215	1		T209	1
auto[1]	values[6]	values[7]	10	1			T53	1		T310	3		T282	2
auto[1]	values[7]	values[0]	18	1			T59	1		T24	3		T198	2
auto[1]	values[7]	values[1]	4	1			T157	1		T302	1		T323	2
auto[1]	values[7]	values[2]	15	1			T324	2		T225	2		T179	3
auto[1]	values[7]	values[3]	5	1			T207	3		T325	2		-	-
auto[1]	values[7]	values[4]	8	1			T207	1		T201	1		T304	1
auto[1]	values[7]	values[5]	17	1			T53	1		T23	1		T218	1
auto[1]	values[7]	values[6]	17	1			T94	4		T246	1		T179	1
auto[1]	values[7]	values[7]	12	1			T234	4		T315	1		T326	3