Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

16527

1

T1

8

T5

36

T6

10

auto[1]

44341

1

T1

8

T5

375

T6

10

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1388	1			T5	5		T6	8		T8	3
auto[4:7]	25502	1			T1	10		T5	144		T6	2
auto[8:11]	1300	1			T5	10		T8	2		T9	14
auto[12:15]	285	1			T5	4		T8	2		T12	1
auto[16:19]	306	1			T5	2		T9	1		T12	1
auto[20:23]	1786	1			T5	14		T6	2		T8	6
auto[24:27]	362	1			T5	3		T8	7		T9	2
auto[28:31]	333	1			T5	5		T9	12		T12	1
auto[32:35]	264	1			T5	2		T8	1		T9	6
auto[36:39]	338	1			T5	3		T9	7		T12	6
auto[40:43]	313	1			T8	3		T9	5		T12	3
auto[44:47]	330	1			T5	2		T9	5		T26	3
auto[48:51]	330	1			T5	2		T8	2		T9	4
auto[52:55]	1758	1			T5	14		T8	6		T9	15
auto[56:59]	1345	1			T5	13		T8	2		T9	12
auto[60:63]	299	1			T5	5		T8	4		T24	1
auto[64:67]	323	1			T5	1		T8	1		T9	3
auto[68:71]	348	1			T5	3		T9	1		T12	1
auto[72:75]	392	1			T5	4		T8	1		T9	4
auto[76:79]	342	1			T5	3		T9	7		T12	4
auto[80:83]	334	1			T5	2		T8	1		T24	1
auto[84:87]	343	1			T5	7		T8	4		T9	1
auto[88:91]	1814	1			T5	10		T6	2		T8	4
auto[92:95]	299	1			T5	2		T9	4		T12	5
auto[96:99]	322	1			T5	2		T8	4		T9	2
auto[100:103]	335	1			T5	11		T9	12		T13	1
auto[104:107]	1301	1			T5	7		T6	2		T9	13
auto[108:111]	362	1			T5	3		T8	2		T9	2
auto[112:115]	296	1			T5	1		T8	1		T9	1
auto[116:119]	310	1			T5	1		T9	3		T12	3
auto[120:123]	403	1			T5	2		T8	1		T9	10
auto[124:127]	340	1			T5	1		T9	6		T26	1
auto[128:131]	327	1			T5	9		T9	3		T12	1
auto[132:135]	309	1			T9	4		T24	1		T36	2
auto[136:139]	344	1			T5	2		T8	7		T12	3
auto[140:143]	310	1			T5	2		T9	8		T12	4
auto[144:147]	264	1			T5	1		T9	1		T24	1
auto[148:151]	305	1			T5	3		T9	8		T14	2
auto[152:155]	310	1			T5	5		T8	2		T9	1
auto[156:159]	1819	1			T5	12		T6	2		T8	11
auto[160:163]	361	1			T9	4		T12	4		T26	1
auto[164:167]	319	1			T5	3		T9	3		T24	3
auto[168:171]	333	1			T8	1		T9	3		T12	4
auto[172:175]	321	1			T5	1		T8	2		T9	4
auto[176:179]	364	1			T5	2		T8	6		T9	3
auto[180:183]	1728	1			T1	6		T5	13		T8	4
auto[184:187]	1353	1			T5	5		T9	8		T12	3
auto[188:191]	325	1			T5	5		T9	3		T24	1
auto[192:195]	276	1			T5	2		T9	2		T12	1
auto[196:199]	294	1			T5	3		T8	1		T9	2
auto[200:203]	333	1			T5	2		T9	1		T12	7
auto[204:207]	313	1			T5	2		T8	2		T9	1
auto[208:211]	350	1			T9	8		T12	6		T26	3
auto[212:215]	327	1			T5	5		T9	2		T48	1
auto[216:219]	318	1			T5	1		T9	6		T12	1
auto[220:223]	315	1			T5	1		T12	5		T24	2
auto[224:227]	326	1			T5	4		T9	4		T24	2
auto[228:231]	424	1			T5	3		T9	4		T12	4
auto[232:235]	2743	1			T5	21		T6	2		T8	5
auto[236:239]	321	1			T5	2		T9	5		T12	1
auto[240:243]	342	1			T5	2		T8	3		T9	8
auto[244:247]	306	1			T5	2		T9	4		T12	3
auto[248:251]	358	1			T5	9		T8	1		T9	5
auto[252:255]	327	1			T5	1		T9	1		T24	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	544	1			T6	4		T9	3		T13	1
auto[0:3]	auto[1]	844	1			T5	5		T6	4		T8	3
auto[4:7]	auto[0]	6285	1			T1	5		T5	8		T6	1
auto[4:7]	auto[1]	19217	1			T1	5		T5	136		T6	1
auto[8:11]	auto[0]	485	1			T5	1		T9	1		T24	1
auto[8:11]	auto[1]	815	1			T5	9		T8	2		T9	13
auto[12:15]	auto[0]	75	1			T24	1		T26	1		T48	2
auto[12:15]	auto[1]	210	1			T5	4		T8	2		T12	1
auto[16:19]	auto[0]	87	1			T24	4		T48	1		T38	2
auto[16:19]	auto[1]	219	1			T5	2		T9	1		T12	1
auto[20:23]	auto[0]	486	1			T6	1		T9	5		T24	2
auto[20:23]	auto[1]	1300	1			T5	14		T6	1		T8	6
auto[24:27]	auto[0]	84	1			T5	2		T37	2		T49	4
auto[24:27]	auto[1]	278	1			T5	1		T8	7		T9	2
auto[28:31]	auto[0]	91	1			T5	1		T9	2		T26	1
auto[28:31]	auto[1]	242	1			T5	4		T9	10		T12	1
auto[32:35]	auto[0]	78	1			T9	4		T38	2		T49	1
auto[32:35]	auto[1]	186	1			T5	2		T8	1		T9	2
auto[36:39]	auto[0]	79	1			T9	1		T15	1		T24	1
auto[36:39]	auto[1]	259	1			T5	3		T9	6		T12	6
auto[40:43]	auto[0]	82	1			T26	3		T48	1		T38	3
auto[40:43]	auto[1]	231	1			T8	3		T9	5		T12	3
auto[44:47]	auto[0]	97	1			T9	2		T26	2		T48	1
auto[44:47]	auto[1]	233	1			T5	2		T9	3		T26	1
auto[48:51]	auto[0]	81	1			T9	1		T26	1		T37	1
auto[48:51]	auto[1]	249	1			T5	2		T8	2		T9	3
auto[52:55]	auto[0]	440	1			T9	3		T13	1		T24	6
auto[52:55]	auto[1]	1318	1			T5	14		T8	6		T9	12
auto[56:59]	auto[0]	481	1			T5	6		T9	2		T24	5
auto[56:59]	auto[1]	864	1			T5	7		T8	2		T9	10
auto[60:63]	auto[0]	82	1			T5	1		T24	1		T26	3
auto[60:63]	auto[1]	217	1			T5	4		T8	4		T26	2
auto[64:67]	auto[0]	91	1			T37	3		T49	5		T235	1
auto[64:67]	auto[1]	232	1			T5	1		T8	1		T9	3
auto[68:71]	auto[0]	105	1			T16	1		T24	1		T26	2
auto[68:71]	auto[1]	243	1			T5	3		T9	1		T12	1
auto[72:75]	auto[0]	96	1			T9	1		T24	1		T26	1
auto[72:75]	auto[1]	296	1			T5	4		T8	1		T9	3
auto[76:79]	auto[0]	94	1			T26	1		T38	2		T49	1
auto[76:79]	auto[1]	248	1			T5	3		T9	7		T12	4
auto[80:83]	auto[0]	73	1			T24	1		T46	1		T39	1
auto[80:83]	auto[1]	261	1			T5	2		T8	1		T46	1
auto[84:87]	auto[0]	102	1			T24	1		T45	1		T38	2
auto[84:87]	auto[1]	241	1			T5	7		T8	4		T9	1
auto[88:91]	auto[0]	530	1			T5	1		T6	1		T9	1
auto[88:91]	auto[1]	1284	1			T5	9		T6	1		T8	4
auto[92:95]	auto[0]	87	1			T48	1		T38	1		T49	1
auto[92:95]	auto[1]	212	1			T5	2		T9	4		T12	5
auto[96:99]	auto[0]	90	1			T48	1		T37	1		T38	1
auto[96:99]	auto[1]	232	1			T5	2		T8	4		T9	2
auto[100:103]	auto[0]	70	1			T5	1		T9	2		T26	3
auto[100:103]	auto[1]	265	1			T5	10		T9	10		T13	1
auto[104:107]	auto[0]	501	1			T5	2		T6	1		T9	4
auto[104:107]	auto[1]	800	1			T5	5		T6	1		T9	9
auto[108:111]	auto[0]	100	1			T26	6		T49	1		T18	1
auto[108:111]	auto[1]	262	1			T5	3		T8	2		T9	2
auto[112:115]	auto[0]	80	1			T24	4		T49	1		T39	1
auto[112:115]	auto[1]	216	1			T5	1		T8	1		T9	1
auto[116:119]	auto[0]	85	1			T48	3		T49	1		T92	1
auto[116:119]	auto[1]	225	1			T5	1		T9	3		T12	3
auto[120:123]	auto[0]	92	1			T9	2		T24	1		T38	1
auto[120:123]	auto[1]	311	1			T5	2		T8	1		T9	8
auto[124:127]	auto[0]	104	1			T9	1		T26	1		T37	2
auto[124:127]	auto[1]	236	1			T5	1		T9	5		T48	1
auto[128:131]	auto[0]	77	1			T48	1		T134	3		T82	1
auto[128:131]	auto[1]	250	1			T5	9		T9	3		T12	1
auto[132:135]	auto[0]	73	1			T9	1		T37	4		T38	2
auto[132:135]	auto[1]	236	1			T9	3		T24	1		T36	2
auto[136:139]	auto[0]	99	1			T53	2		T48	2		T38	6
auto[136:139]	auto[1]	245	1			T5	2		T8	7		T12	3
auto[140:143]	auto[0]	83	1			T5	1		T9	2		T13	3
auto[140:143]	auto[1]	227	1			T5	1		T9	6		T12	4
auto[144:147]	auto[0]	61	1			T37	3		T38	1		T49	1
auto[144:147]	auto[1]	203	1			T5	1		T9	1		T24	1
auto[148:151]	auto[0]	84	1			T5	1		T14	1		T53	1
auto[148:151]	auto[1]	221	1			T5	2		T9	8		T14	1
auto[152:155]	auto[0]	66	1			T5	1		T24	2		T37	1
auto[152:155]	auto[1]	244	1			T5	4		T8	2		T9	1
auto[156:159]	auto[0]	485	1			T5	1		T6	1		T9	2
auto[156:159]	auto[1]	1334	1			T5	11		T6	1		T8	11
auto[160:163]	auto[0]	110	1			T9	2		T37	3		T38	1
auto[160:163]	auto[1]	251	1			T9	2		T12	4		T26	1
auto[164:167]	auto[0]	71	1			T9	1		T48	1		T37	1
auto[164:167]	auto[1]	248	1			T5	3		T9	2		T24	3
auto[168:171]	auto[0]	107	1			T9	1		T26	3		T38	1
auto[168:171]	auto[1]	226	1			T8	1		T9	2		T12	4
auto[172:175]	auto[0]	76	1			T9	2		T13	1		T53	1
auto[172:175]	auto[1]	245	1			T5	1		T8	2		T9	2
auto[176:179]	auto[0]	85	1			T9	2		T37	1		T49	2
auto[176:179]	auto[1]	279	1			T5	2		T8	6		T9	1
auto[180:183]	auto[0]	466	1			T1	3		T5	1		T9	3
auto[180:183]	auto[1]	1262	1			T1	3		T5	12		T8	4
auto[184:187]	auto[0]	499	1			T5	1		T9	1		T14	1
auto[184:187]	auto[1]	854	1			T5	4		T9	7		T12	3
auto[188:191]	auto[0]	84	1			T5	3		T26	1		T37	1
auto[188:191]	auto[1]	241	1			T5	2		T9	3		T24	1
auto[192:195]	auto[0]	70	1			T24	3		T38	3		T49	2
auto[192:195]	auto[1]	206	1			T5	2		T9	2		T12	1
auto[196:199]	auto[0]	57	1			T38	2		T49	1		T18	1
auto[196:199]	auto[1]	237	1			T5	3		T8	1		T9	2
auto[200:203]	auto[0]	116	1			T24	2		T26	1		T49	2
auto[200:203]	auto[1]	217	1			T5	2		T9	1		T12	7
auto[204:207]	auto[0]	76	1			T9	1		T24	2		T48	1
auto[204:207]	auto[1]	237	1			T5	2		T8	2		T12	1
auto[208:211]	auto[0]	83	1			T9	4		T26	3		T37	1
auto[208:211]	auto[1]	267	1			T9	4		T12	6		T48	3
auto[212:215]	auto[0]	91	1			T48	1		T37	3		T49	1
auto[212:215]	auto[1]	236	1			T5	5		T9	2		T18	1
auto[216:219]	auto[0]	92	1			T48	2		T37	3		T20	2
auto[216:219]	auto[1]	226	1			T5	1		T9	6		T12	1
auto[220:223]	auto[0]	84	1			T24	1		T49	2		T92	1
auto[220:223]	auto[1]	231	1			T5	1		T12	5		T24	1
auto[224:227]	auto[0]	75	1			T24	1		T26	2		T53	1
auto[224:227]	auto[1]	251	1			T5	4		T9	4		T24	1
auto[228:231]	auto[0]	112	1			T46	1		T26	1		T37	2
auto[228:231]	auto[1]	312	1			T5	3		T9	4		T12	4
auto[232:235]	auto[0]	878	1			T5	3		T6	1		T9	9
auto[232:235]	auto[1]	1865	1			T5	18		T6	1		T8	5
auto[236:239]	auto[0]	75	1			T37	2		T225	1		T134	2
auto[236:239]	auto[1]	246	1			T5	2		T9	5		T12	1
auto[240:243]	auto[0]	99	1			T14	1		T18	1		T233	1
auto[240:243]	auto[1]	243	1			T5	2		T8	3		T9	8
auto[244:247]	auto[0]	76	1			T9	1		T24	1		T48	2
auto[244:247]	auto[1]	230	1			T5	2		T9	3		T12	3
auto[248:251]	auto[0]	91	1			T5	1		T24	3		T26	4
auto[248:251]	auto[1]	267	1			T5	8		T8	1		T9	5
auto[252:255]	auto[0]	69	1			T24	2		T53	1		T49	3
auto[252:255]	auto[1]	258	1			T5	1		T9	1		T26	1