Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3482	1			T17	73		T240	6		T91	12
values[1]	3612	1			T3	8		T16	66		T17	138
values[2]	3773	1			T17	57		T40	8		T98	2
values[3]	3343	1			T17	20		T20	40		T33	20
values[4]	3121	1			T17	72		T39	20		T84	16
values[5]	2911	1			T90	14		T20	20		T241	2
values[6]	3890	1			T17	105		T19	18		T44	6
values[7]	3523	1			T17	89		T18	14		T43	22

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3342	1			T17	26		T41	51		T91	12
values[1]	3586	1			T17	120		T44	6		T98	2
values[2]	3961	1			T17	106		T84	16		T33	20
values[3]	3534	1			T17	140		T18	14		T20	21
values[4]	3815	1			T17	20		T43	22		T20	60
values[5]	2817	1			T17	122		T19	18		T40	8
values[6]	3284	1			T3	8		T16	66		T17	20
values[7]	3316	1			T90	14		T39	20		T240	6

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

26910

1

T3

8

T16

66

T17

544

auto[1]

745

1

T17

10

T39

2

T20

12

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	344	1			T91	12		T169	20		T276	6
auto[0]	values[0]	values[1]	542	1			T35	38		T243	16		T46	20
auto[0]	values[0]	values[2]	539	1			T45	19		T246	8		T46	20
auto[0]	values[0]	values[3]	574	1			T189	68		T169	16		T206	20
auto[0]	values[0]	values[4]	601	1			T17	20		T254	6		T207	20
auto[0]	values[0]	values[5]	239	1			T17	50		T42	21		T169	19
auto[0]	values[0]	values[6]	234	1			T221	41		T204	19		T192	28
auto[0]	values[0]	values[7]	333	1			T240	6		T24	20		T181	20
auto[0]	values[1]	values[0]	551	1			T257	12		T88	20		T211	27
auto[0]	values[1]	values[1]	573	1			T17	100		T196	18		T211	51
auto[0]	values[1]	values[2]	457	1			T33	20		T45	19		T274	6
auto[0]	values[1]	values[3]	421	1			T17	36		T42	19		T278	6
auto[0]	values[1]	values[4]	358	1			T42	20		T266	2		T264	16
auto[0]	values[1]	values[5]	388	1			T171	4		T20	22		T22	20
auto[0]	values[1]	values[6]	482	1			T3	8		T16	66		T279	8
auto[0]	values[1]	values[7]	294	1			T20	25		T42	20		T214	59
auto[0]	values[2]	values[0]	497	1			T189	37		T262	4		T203	36
auto[0]	values[2]	values[1]	336	1			T98	2		T42	24		T158	10
auto[0]	values[2]	values[2]	807	1			T17	54		T69	8		T189	19
auto[0]	values[2]	values[3]	383	1			T42	26		T229	20		T212	20
auto[0]	values[2]	values[4]	547	1			T35	109		T22	23		T242	4
auto[0]	values[2]	values[5]	350	1			T40	8		T20	17		T42	20
auto[0]	values[2]	values[6]	275	1			T205	27		T280	8		T152	20
auto[0]	values[2]	values[7]	454	1			T35	28		T281	20		T169	19
auto[0]	values[3]	values[0]	348	1			T42	19		T189	20		T217	20
auto[0]	values[3]	values[1]	290	1			T238	6		T250	2		T217	45
auto[0]	values[3]	values[2]	622	1			T17	20		T75	24		T192	20
auto[0]	values[3]	values[3]	452	1			T45	18		T24	22		T221	19
auto[0]	values[3]	values[4]	293	1			T20	19		T46	19		T221	20
auto[0]	values[3]	values[5]	285	1			T45	18		T207	20		T187	20
auto[0]	values[3]	values[6]	291	1			T20	19		T197	33		T205	21
auto[0]	values[3]	values[7]	682	1			T33	20		T88	20		T169	18
auto[0]	values[4]	values[0]	389	1			T203	21		T204	30		T277	12
auto[0]	values[4]	values[1]	462	1			T17	20		T33	20		T70	18
auto[0]	values[4]	values[2]	232	1			T84	16		T196	20		T204	20
auto[0]	values[4]	values[3]	378	1			T17	51		T75	21		T186	20
auto[0]	values[4]	values[4]	382	1			T20	20		T215	14		T189	20
auto[0]	values[4]	values[5]	406	1			T169	20		T203	16		T282	2
auto[0]	values[4]	values[6]	444	1			T75	19		T261	28		T283	16
auto[0]	values[4]	values[7]	342	1			T39	18		T128	14		T35	20
auto[0]	values[5]	values[0]	348	1			T167	18		T196	18		T88	15
auto[0]	values[5]	values[1]	380	1			T20	18		T241	2		T85	6
auto[0]	values[5]	values[2]	192	1			T42	21		T181	35		T284	22
auto[0]	values[5]	values[3]	274	1			T42	22		T189	20		T221	19
auto[0]	values[5]	values[4]	675	1			T189	22		T275	2		T75	199
auto[0]	values[5]	values[5]	247	1			T225	8		T216	19		T194	21
auto[0]	values[5]	values[6]	404	1			T88	19		T221	24		T285	4
auto[0]	values[5]	values[7]	290	1			T90	14		T42	19		T271	8
auto[0]	values[6]	values[0]	458	1			T17	26		T41	51		T45	20
auto[0]	values[6]	values[1]	316	1			T44	6		T33	21		T217	45
auto[0]	values[6]	values[2]	583	1			T17	29		T169	16		T204	20
auto[0]	values[6]	values[3]	460	1			T17	49		T20	20		T45	20
auto[0]	values[6]	values[4]	515	1			T20	20		T33	25		T269	4
auto[0]	values[6]	values[5]	352	1			T19	18		T255	2		T88	37
auto[0]	values[6]	values[6]	556	1			T42	23		T259	2		T196	19
auto[0]	values[6]	values[7]	537	1			T258	6		T47	19		T249	20
auto[0]	values[7]	values[0]	305	1			T169	20		T206	23		T217	20
auto[0]	values[7]	values[1]	604	1			T33	24		T46	20		T256	14
auto[0]	values[7]	values[2]	419	1			T46	19		T222	20		T187	81
auto[0]	values[7]	values[3]	488	1			T18	14		T132	6		T45	18
auto[0]	values[7]	values[4]	326	1			T43	22		T35	90		T189	23
auto[0]	values[7]	values[5]	459	1			T17	69		T20	22		T42	46
auto[0]	values[7]	values[6]	530	1			T17	20		T224	20		T208	20
auto[0]	values[7]	values[7]	315	1			T203	20		T197	19		T194	30
auto[1]	values[0]	values[0]	14	1			T197	2		T286	4		T193	4
auto[1]	values[0]	values[1]	14	1			T35	2		T203	3		T204	3
auto[1]	values[0]	values[2]	5	1			T45	1		T75	3		T287	1
auto[1]	values[0]	values[3]	15	1			T169	4		T192	1		T223	1
auto[1]	values[0]	values[4]	5	1			T207	1		T288	1		T289	1
auto[1]	values[0]	values[5]	9	1			T17	3		T42	1		T169	1
auto[1]	values[0]	values[6]	7	1			T221	5		T204	1		T188	1
auto[1]	values[0]	values[7]	7	1			T206	1		T193	2		T290	2
auto[1]	values[1]	values[0]	3	1			T211	1		T291	2		-	-
auto[1]	values[1]	values[1]	15	1			T196	2		T211	3		T214	2
auto[1]	values[1]	values[2]	11	1			T45	1		T75	3		T183	3
auto[1]	values[1]	values[3]	15	1			T17	2		T42	2		T181	3
auto[1]	values[1]	values[4]	17	1			T181	1		T187	1		T292	1
auto[1]	values[1]	values[5]	11	1			T20	1		T22	1		T193	1
auto[1]	values[1]	values[6]	10	1			T205	2		T222	1		T293	2
auto[1]	values[1]	values[7]	6	1			T42	1		T183	2		T195	1
auto[1]	values[2]	values[0]	20	1			T203	3		T206	2		T263	2
auto[1]	values[2]	values[1]	6	1			T181	1		T203	2		T206	3
auto[1]	values[2]	values[2]	25	1			T17	3		T189	1		T169	4
auto[1]	values[2]	values[3]	16	1			T42	2		T263	5		T294	1
auto[1]	values[2]	values[4]	23	1			T35	1		T22	1		T216	2
auto[1]	values[2]	values[5]	19	1			T20	3		T45	1		T252	1
auto[1]	values[2]	values[6]	7	1			T205	2		T268	2		T135	2
auto[1]	values[2]	values[7]	8	1			T169	1		T214	2		T295	3
auto[1]	values[3]	values[0]	13	1			T42	1		T152	1		T192	2
auto[1]	values[3]	values[1]	7	1			T155	2		T296	2		T136	1
auto[1]	values[3]	values[2]	12	1			T297	2		T298	1		T294	4
auto[1]	values[3]	values[3]	20	1			T45	2		T24	2		T221	1
auto[1]	values[3]	values[4]	7	1			T20	1		T46	1		T197	2
auto[1]	values[3]	values[5]	3	1			T45	2		T138	1		-	-
auto[1]	values[3]	values[6]	3	1			T20	1		T197	2		-	-
auto[1]	values[3]	values[7]	15	1			T169	2		T193	1		T198	1
auto[1]	values[4]	values[0]	8	1			T203	2		T136	1		T299	5
auto[1]	values[4]	values[1]	18	1			T273	6		T195	2		T300	1
auto[1]	values[4]	values[2]	8	1			T197	3		T49	2		T137	3
auto[1]	values[4]	values[3]	6	1			T17	1		T301	2		T298	1
auto[1]	values[4]	values[4]	14	1			T189	2		T194	3		T186	5
auto[1]	values[4]	values[5]	18	1			T203	4		T263	7		T295	1
auto[1]	values[4]	values[6]	7	1			T75	1		T187	1		T268	4
auto[1]	values[4]	values[7]	7	1			T39	2		T204	3		T188	1
auto[1]	values[5]	values[0]	24	1			T196	2		T88	5		T197	4
auto[1]	values[5]	values[1]	5	1			T20	2		T290	1		T49	1
auto[1]	values[5]	values[2]	11	1			T42	1		T181	4		T284	2
auto[1]	values[5]	values[3]	8	1			T221	1		T183	1		T34	3
auto[1]	values[5]	values[4]	17	1			T75	2		T151	5		T302	4
auto[1]	values[5]	values[5]	7	1			T216	1		T194	1		T222	1
auto[1]	values[5]	values[6]	14	1			T88	1		T203	3		T183	1
auto[1]	values[5]	values[7]	15	1			T42	1		T183	6		T253	5
auto[1]	values[6]	values[0]	9	1			T204	1		T214	2		T284	1
auto[1]	values[6]	values[1]	9	1			T217	1		T198	3		T49	3
auto[1]	values[6]	values[2]	21	1			T169	4		T194	1		T252	2
auto[1]	values[6]	values[3]	16	1			T17	1		T20	1		T189	1
auto[1]	values[6]	values[4]	26	1			T33	3		T169	2		T221	2
auto[1]	values[6]	values[5]	14	1			T88	3		T192	2		T292	1
auto[1]	values[6]	values[6]	11	1			T196	1		T189	1		T88	1
auto[1]	values[6]	values[7]	7	1			T47	1		T198	4		T299	1
auto[1]	values[7]	values[0]	11	1			T206	4		T186	2		T198	1
auto[1]	values[7]	values[1]	9	1			T75	1		T186	1		T192	2
auto[1]	values[7]	values[2]	17	1			T46	1		T187	7		T303	1
auto[1]	values[7]	values[3]	8	1			T45	2		T206	1		T208	1
auto[1]	values[7]	values[4]	9	1			T35	2		T189	1		T217	2
auto[1]	values[7]	values[5]	10	1			T20	3		T42	3		T46	1
auto[1]	values[7]	values[6]	9	1			T224	4		T234	2		T195	2
auto[1]	values[7]	values[7]	4	1			T197	1		T214	1		T253	2