Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
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Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 66 0 66 100.00
Crosses 128 0 128 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_filtered 2 0 2 100.00 100 1 1 2
cp_opcode 64 0 64 100.00 100 1 1 64


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 128 0 128 100.00 100 1 1 0


Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_filtered

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 15842 1 T1 98 T4 99 T5 10
auto[1] 44102 1 T1 102 T4 81 T5 10



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 64 0 64 100.00


Automatically Generated Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] 1366 1 T1 13 T4 9 T5 2
auto[4:7] 24168 1 T1 26 T4 19 T5 2
auto[8:11] 1335 1 T1 9 T4 6 T5 2
auto[12:15] 271 1 T1 2 T4 1 T12 2
auto[16:19] 336 1 T25 2 T51 2 T54 1
auto[20:23] 1860 1 T1 4 T4 8 T7 4
auto[24:27] 257 1 T1 1 T12 1 T95 2
auto[28:31] 332 1 T1 1 T4 2 T25 1
auto[32:35] 353 1 T12 1 T44 2 T25 3
auto[36:39] 318 1 T1 5 T4 1 T7 2
auto[40:43] 333 1 T4 1 T45 2 T44 3
auto[44:47] 294 1 T1 1 T4 1 T45 3
auto[48:51] 361 1 T4 4 T7 1 T44 1
auto[52:55] 1810 1 T1 11 T4 5 T7 5
auto[56:59] 1292 1 T1 10 T4 8 T5 2
auto[60:63] 359 1 T4 1 T25 1 T34 3
auto[64:67] 359 1 T1 3 T4 6 T44 2
auto[68:71] 321 1 T1 5 T4 1 T12 1
auto[72:75] 333 1 T4 2 T12 2 T44 2
auto[76:79] 326 1 T1 2 T4 4 T12 3
auto[80:83] 309 1 T4 3 T12 3 T25 1
auto[84:87] 341 1 T1 3 T4 1 T7 2
auto[88:91] 1876 1 T1 11 T4 3 T7 2
auto[92:95] 347 1 T1 3 T4 2 T50 2
auto[96:99] 310 1 T4 1 T7 1 T26 1
auto[100:103] 335 1 T4 3 T44 1 T25 7
auto[104:107] 1342 1 T1 5 T4 3 T7 1
auto[108:111] 382 1 T4 3 T7 1 T12 1
auto[112:115] 333 1 T1 3 T4 3 T12 3
auto[116:119] 276 1 T4 1 T7 2 T45 1
auto[120:123] 285 1 T4 1 T44 3 T46 1
auto[124:127] 334 1 T4 1 T13 4 T45 1
auto[128:131] 336 1 T1 4 T4 1 T7 1
auto[132:135] 317 1 T1 1 T25 1 T51 3
auto[136:139] 295 1 T1 3 T4 4 T12 1
auto[140:143] 323 1 T1 2 T4 1 T7 1
auto[144:147] 292 1 T25 1 T46 3 T51 2
auto[148:151] 356 1 T1 1 T7 2 T12 2
auto[152:155] 329 1 T1 3 T44 2 T26 3
auto[156:159] 1844 1 T1 6 T4 9 T5 2
auto[160:163] 332 1 T1 2 T4 1 T45 2
auto[164:167] 395 1 T1 1 T4 2 T7 1
auto[168:171] 323 1 T1 1 T8 2 T12 1
auto[172:175] 327 1 T1 1 T4 2 T7 1
auto[176:179] 346 1 T1 2 T4 1 T7 2
auto[180:183] 1806 1 T1 11 T4 15 T7 2
auto[184:187] 1345 1 T1 7 T4 4 T7 1
auto[188:191] 349 1 T1 1 T4 4 T12 2
auto[192:195] 286 1 T1 2 T25 1 T34 1
auto[196:199] 250 1 T1 3 T12 1 T44 3
auto[200:203] 319 1 T4 1 T44 1 T25 1
auto[204:207] 326 1 T4 4 T7 2 T12 1
auto[208:211] 318 1 T1 2 T4 3 T5 4
auto[212:215] 336 1 T1 1 T7 4 T44 2
auto[216:219] 302 1 T12 4 T44 1 T25 2
auto[220:223] 304 1 T7 1 T45 1 T44 2
auto[224:227] 364 1 T4 3 T44 2 T25 3
auto[228:231] 361 1 T1 3 T4 1 T5 2
auto[232:235] 2809 1 T1 19 T4 16 T5 4
auto[236:239] 372 1 T1 1 T4 1 T12 5
auto[240:243] 352 1 T1 1 T7 2 T12 2
auto[244:247] 362 1 T1 1 T95 2 T44 2
auto[248:251] 374 1 T1 2 T4 3 T44 1
auto[252:255] 340 1 T1 1 T7 1 T12 1



Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for cr_all

Bins
cp_opcodecp_filteredCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] auto[0] 528 1 T1 6 T4 7 T5 1
auto[0:3] auto[1] 838 1 T1 7 T4 2 T5 1
auto[4:7] auto[0] 6154 1 T1 14 T4 11 T5 1
auto[4:7] auto[1] 18014 1 T1 12 T4 8 T5 1
auto[8:11] auto[0] 474 1 T1 5 T4 5 T5 1
auto[8:11] auto[1] 861 1 T1 4 T4 1 T5 1
auto[12:15] auto[0] 70 1 T4 1 T12 2 T46 1
auto[12:15] auto[1] 201 1 T1 2 T44 1 T25 1
auto[16:19] auto[0] 81 1 T51 1 T55 3 T40 2
auto[16:19] auto[1] 255 1 T25 2 T51 1 T54 1
auto[20:23] auto[0] 486 1 T1 3 T4 5 T12 3
auto[20:23] auto[1] 1374 1 T1 1 T4 3 T7 4
auto[24:27] auto[0] 71 1 T1 1 T95 1 T51 2
auto[24:27] auto[1] 186 1 T12 1 T95 1 T25 1
auto[28:31] auto[0] 82 1 T4 2 T46 1 T51 1
auto[28:31] auto[1] 250 1 T1 1 T25 1 T57 1
auto[32:35] auto[0] 90 1 T12 1 T34 1 T96 3
auto[32:35] auto[1] 263 1 T44 2 T25 3 T96 3
auto[36:39] auto[0] 68 1 T1 1 T46 1 T51 4
auto[36:39] auto[1] 250 1 T1 4 T4 1 T7 2
auto[40:43] auto[0] 77 1 T46 2 T51 1 T54 2
auto[40:43] auto[1] 256 1 T4 1 T45 2 T44 3
auto[44:47] auto[0] 62 1 T46 1 T51 2 T54 1
auto[44:47] auto[1] 232 1 T1 1 T4 1 T45 3
auto[48:51] auto[0] 84 1 T4 3 T34 2 T51 1
auto[48:51] auto[1] 277 1 T4 1 T7 1 T44 1
auto[52:55] auto[0] 416 1 T1 7 T4 2 T12 7
auto[52:55] auto[1] 1394 1 T1 4 T4 3 T7 5
auto[56:59] auto[0] 446 1 T1 2 T4 5 T5 1
auto[56:59] auto[1] 846 1 T1 8 T4 3 T5 1
auto[60:63] auto[0] 85 1 T46 1 T56 3 T86 1
auto[60:63] auto[1] 274 1 T4 1 T25 1 T34 3
auto[64:67] auto[0] 89 1 T1 2 T4 6 T34 1
auto[64:67] auto[1] 270 1 T1 1 T44 2 T25 9
auto[68:71] auto[0] 68 1 T1 5 T4 1 T12 1
auto[68:71] auto[1] 253 1 T14 1 T44 1 T25 4
auto[72:75] auto[0] 70 1 T4 1 T12 1 T46 2
auto[72:75] auto[1] 263 1 T4 1 T12 1 T44 2
auto[76:79] auto[0] 67 1 T1 2 T4 2 T12 1
auto[76:79] auto[1] 259 1 T4 2 T12 2 T13 3
auto[80:83] auto[0] 76 1 T12 2 T55 3 T56 1
auto[80:83] auto[1] 233 1 T4 3 T12 1 T25 1
auto[84:87] auto[0] 84 1 T12 2 T46 1 T53 1
auto[84:87] auto[1] 257 1 T1 3 T4 1 T7 2
auto[88:91] auto[0] 499 1 T1 5 T4 1 T8 1
auto[88:91] auto[1] 1377 1 T1 6 T4 2 T7 2
auto[92:95] auto[0] 85 1 T1 1 T4 1 T50 1
auto[92:95] auto[1] 262 1 T1 2 T4 1 T50 1
auto[96:99] auto[0] 74 1 T4 1 T46 1 T51 1
auto[96:99] auto[1] 236 1 T7 1 T26 1 T46 2
auto[100:103] auto[0] 80 1 T4 3 T54 2 T86 4
auto[100:103] auto[1] 255 1 T44 1 T25 7 T26 1
auto[104:107] auto[0] 502 1 T1 4 T4 2 T8 1
auto[104:107] auto[1] 840 1 T1 1 T4 1 T7 1
auto[108:111] auto[0] 107 1 T4 1 T51 2 T55 2
auto[108:111] auto[1] 275 1 T4 2 T7 1 T12 1
auto[112:115] auto[0] 82 1 T1 2 T4 1 T12 2
auto[112:115] auto[1] 251 1 T1 1 T4 2 T12 1
auto[116:119] auto[0] 65 1 T4 1 T51 3 T53 1
auto[116:119] auto[1] 211 1 T7 2 T45 1 T46 1
auto[120:123] auto[0] 60 1 T4 1 T51 1 T55 1
auto[120:123] auto[1] 225 1 T44 3 T46 1 T51 1
auto[124:127] auto[0] 83 1 T13 2 T51 2 T54 1
auto[124:127] auto[1] 251 1 T4 1 T13 2 T45 1
auto[128:131] auto[0] 82 1 T1 3 T4 1 T54 1
auto[128:131] auto[1] 254 1 T1 1 T7 1 T44 4
auto[132:135] auto[0] 83 1 T51 3 T54 3 T55 1
auto[132:135] auto[1] 234 1 T1 1 T25 1 T53 2
auto[136:139] auto[0] 74 1 T1 3 T4 2 T12 1
auto[136:139] auto[1] 221 1 T4 2 T45 2 T44 1
auto[140:143] auto[0] 77 1 T1 1 T14 1 T51 3
auto[140:143] auto[1] 246 1 T1 1 T4 1 T7 1
auto[144:147] auto[0] 65 1 T46 3 T54 1 T55 1
auto[144:147] auto[1] 227 1 T25 1 T51 2 T39 3
auto[148:151] auto[0] 62 1 T1 1 T12 1 T34 1
auto[148:151] auto[1] 294 1 T7 2 T12 1 T25 2
auto[152:155] auto[0] 87 1 T1 1 T46 1 T54 1
auto[152:155] auto[1] 242 1 T1 2 T44 2 T26 3
auto[156:159] auto[0] 457 1 T1 2 T4 2 T5 1
auto[156:159] auto[1] 1387 1 T1 4 T4 7 T5 1
auto[160:163] auto[0] 91 1 T1 1 T4 1 T46 1
auto[160:163] auto[1] 241 1 T1 1 T45 2 T44 1
auto[164:167] auto[0] 79 1 T34 1 T51 1 T53 1
auto[164:167] auto[1] 316 1 T1 1 T4 2 T7 1
auto[168:171] auto[0] 67 1 T8 1 T12 1 T46 1
auto[168:171] auto[1] 256 1 T1 1 T8 1 T25 1
auto[172:175] auto[0] 89 1 T1 1 T4 1 T46 2
auto[172:175] auto[1] 238 1 T4 1 T7 1 T44 2
auto[176:179] auto[0] 81 1 T12 1 T46 3 T56 1
auto[176:179] auto[1] 265 1 T1 2 T4 1 T7 2
auto[180:183] auto[0] 427 1 T1 7 T4 7 T12 5
auto[180:183] auto[1] 1379 1 T1 4 T4 8 T7 2
auto[184:187] auto[0] 494 1 T1 3 T4 3 T12 1
auto[184:187] auto[1] 851 1 T1 4 T4 1 T7 1
auto[188:191] auto[0] 75 1 T1 1 T4 2 T12 2
auto[188:191] auto[1] 274 1 T4 2 T45 3 T44 2
auto[192:195] auto[0] 81 1 T1 2 T34 1 T51 3
auto[192:195] auto[1] 205 1 T25 1 T54 2 T165 3
auto[196:199] auto[0] 71 1 T1 1 T12 1 T40 1
auto[196:199] auto[1] 179 1 T1 2 T44 3 T34 1
auto[200:203] auto[0] 54 1 T51 1 T52 1 T54 1
auto[200:203] auto[1] 265 1 T4 1 T44 1 T25 1
auto[204:207] auto[0] 83 1 T4 2 T34 3 T46 2
auto[204:207] auto[1] 243 1 T4 2 T7 2 T12 1
auto[208:211] auto[0] 86 1 T1 2 T4 1 T5 2
auto[208:211] auto[1] 232 1 T4 2 T5 2 T12 1
auto[212:215] auto[0] 65 1 T34 2 T46 1 T51 1
auto[212:215] auto[1] 271 1 T1 1 T7 4 T44 2
auto[216:219] auto[0] 75 1 T12 1 T34 1 T46 1
auto[216:219] auto[1] 227 1 T12 3 T44 1 T25 2
auto[220:223] auto[0] 76 1 T53 1 T54 2 T55 1
auto[220:223] auto[1] 228 1 T7 1 T45 1 T44 2
auto[224:227] auto[0] 86 1 T53 1 T54 4 T209 1
auto[224:227] auto[1] 278 1 T4 3 T44 2 T25 3
auto[228:231] auto[0] 91 1 T4 1 T5 1 T46 1
auto[228:231] auto[1] 270 1 T1 3 T5 1 T12 2
auto[232:235] auto[0] 840 1 T1 7 T4 12 T5 2
auto[232:235] auto[1] 1969 1 T1 12 T4 4 T5 2
auto[236:239] auto[0] 97 1 T12 3 T14 1 T46 2
auto[236:239] auto[1] 275 1 T1 1 T4 1 T12 2
auto[240:243] auto[0] 98 1 T1 1 T34 1 T51 2
auto[240:243] auto[1] 254 1 T7 2 T12 2 T44 4
auto[244:247] auto[0] 87 1 T95 1 T46 1 T54 1
auto[244:247] auto[1] 275 1 T1 1 T95 1 T44 2
auto[248:251] auto[0] 110 1 T4 1 T34 1 T55 2
auto[248:251] auto[1] 264 1 T1 2 T4 2 T44 1
auto[252:255] auto[0] 87 1 T1 1 T53 3 T86 2
auto[252:255] auto[1] 253 1 T7 1 T12 1 T44 1

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