Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3590	1			T1	16		T5	6		T26	50
values[1]	4446	1			T26	204		T31	25		T62	150
values[2]	4078	1			T2	2		T3	14		T11	8
values[3]	4778	1			T8	16		T12	64		T26	40
values[4]	4572	1			T40	77		T31	64		T63	76
values[5]	3516	1			T12	48		T26	26		T40	20
values[6]	3813	1			T12	60		T26	64		T91	10
values[7]	3593	1			T6	6		T12	68		T27	4

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4447	1			T12	40		T26	20		T92	16
values[1]	3803	1			T3	14		T12	43		T26	25
values[2]	3949	1			T1	16		T12	43		T26	116
values[3]	4307	1			T12	20		T26	64		T40	43
values[4]	3461	1			T6	6		T12	48		T26	50
values[5]	4071	1			T8	16		T12	46		T26	135
values[6]	4515	1			T5	6		T11	8		T12	20
values[7]	3833	1			T2	2		T12	40		T26	55

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

31541

1

T1

14

T2

2

T3

14

auto[1]

845

1

T1

2

T12

10

T26

8

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	512	1			T26	19		T40	24		T227	18
auto[0]	values[0]	values[1]	315	1			T31	25		T169	6		T267	4
auto[0]	values[0]	values[2]	440	1			T1	14		T46	40		T246	14
auto[0]	values[0]	values[3]	428	1			T216	24		T250	35		T268	166
auto[0]	values[0]	values[4]	462	1			T26	30		T18	69		T19	26
auto[0]	values[0]	values[5]	493	1			T47	23		T44	20		T45	16
auto[0]	values[0]	values[6]	422	1			T5	6		T194	20		T161	35
auto[0]	values[0]	values[7]	415	1			T17	20		T18	20		T19	20
auto[0]	values[1]	values[0]	671	1			T227	73		T170	20		T269	10
auto[0]	values[1]	values[1]	557	1			T26	25		T31	24		T17	20
auto[0]	values[1]	values[2]	686	1			T26	57		T62	150		T44	19
auto[0]	values[1]	values[3]	636	1			T19	78		T198	20		T221	22
auto[0]	values[1]	values[4]	309	1			T261	2		T208	14		T270	31
auto[0]	values[1]	values[5]	393	1			T26	93		T227	23		T271	10
auto[0]	values[1]	values[6]	465	1			T48	20		T223	53		T198	20
auto[0]	values[1]	values[7]	634	1			T26	27		T19	19		T20	23
auto[0]	values[2]	values[0]	327	1			T262	2		T227	19		T20	20
auto[0]	values[2]	values[1]	416	1			T3	14		T12	20		T29	2
auto[0]	values[2]	values[2]	695	1			T26	38		T48	20		T19	47
auto[0]	values[2]	values[3]	566	1			T12	20		T19	17		T266	16
auto[0]	values[2]	values[4]	398	1			T40	20		T19	31		T227	20
auto[0]	values[2]	values[5]	269	1			T26	39		T162	19		T272	4
auto[0]	values[2]	values[6]	901	1			T11	8		T46	85		T233	52
auto[0]	values[2]	values[7]	384	1			T2	2		T12	18		T170	17
auto[0]	values[3]	values[0]	795	1			T12	20		T17	25		T233	17
auto[0]	values[3]	values[1]	426	1			T48	93		T19	41		T227	51
auto[0]	values[3]	values[2]	429	1			T12	23		T26	20		T170	20
auto[0]	values[3]	values[3]	652	1			T243	10		T253	12		T198	39
auto[0]	values[3]	values[4]	428	1			T26	20		T46	65		T201	24
auto[0]	values[3]	values[5]	557	1			T8	16		T12	20		T255	12
auto[0]	values[3]	values[6]	731	1			T172	68		T273	8		T35	20
auto[0]	values[3]	values[7]	631	1			T233	42		T172	20		T215	88
auto[0]	values[4]	values[0]	710	1			T47	37		T274	2		T215	20
auto[0]	values[4]	values[1]	619	1			T31	43		T245	6		T236	14
auto[0]	values[4]	values[2]	367	1			T40	50		T20	20		T225	19
auto[0]	values[4]	values[3]	324	1			T40	23		T44	20		T227	20
auto[0]	values[4]	values[4]	631	1			T31	19		T44	19		T48	57
auto[0]	values[4]	values[5]	889	1			T63	76		T46	152		T172	20
auto[0]	values[4]	values[6]	620	1			T44	20		T227	38		T20	20
auto[0]	values[4]	values[7]	289	1			T74	2		T170	20		T275	2
auto[0]	values[5]	values[0]	642	1			T198	20		T258	10		T276	38
auto[0]	values[5]	values[1]	347	1			T12	22		T18	70		T20	20
auto[0]	values[5]	values[2]	328	1			T222	4		T18	20		T172	19
auto[0]	values[5]	values[3]	351	1			T40	20		T31	25		T116	4
auto[0]	values[5]	values[4]	338	1			T227	64		T251	8		T195	20
auto[0]	values[5]	values[5]	483	1			T12	24		T19	26		T227	20
auto[0]	values[5]	values[6]	429	1			T46	20		T47	48		T224	16
auto[0]	values[5]	values[7]	509	1			T26	26		T220	22		T18	21
auto[0]	values[6]	values[0]	400	1			T12	19		T92	16		T44	19
auto[0]	values[6]	values[1]	299	1			T31	17		T47	20		T17	24
auto[0]	values[6]	values[2]	607	1			T12	19		T44	20		T17	23
auto[0]	values[6]	values[3]	710	1			T26	63		T46	173		T172	20
auto[0]	values[6]	values[4]	347	1			T97	8		T47	21		T19	33
auto[0]	values[6]	values[5]	352	1			T91	10		T242	6		T170	20
auto[0]	values[6]	values[6]	524	1			T46	80		T44	39		T18	43
auto[0]	values[6]	values[7]	476	1			T12	20		T48	20		T254	10
auto[0]	values[7]	values[0]	275	1			T18	20		T229	18		T234	21
auto[0]	values[7]	values[1]	704	1			T44	20		T252	6		T19	29
auto[0]	values[7]	values[2]	297	1			T199	45		T259	20		T219	49
auto[0]	values[7]	values[3]	537	1			T46	20		T18	20		T19	69
auto[0]	values[7]	values[4]	457	1			T6	6		T12	45		T198	20
auto[0]	values[7]	values[5]	537	1			T40	76		T239	14		T20	20
auto[0]	values[7]	values[6]	315	1			T12	20		T27	4		T47	17
auto[0]	values[7]	values[7]	385	1			T225	20		T195	20		T277	2
auto[1]	values[0]	values[0]	16	1			T26	1		T40	1		T227	2
auto[1]	values[0]	values[1]	7	1			T278	3		T131	1		T279	1
auto[1]	values[0]	values[2]	17	1			T1	2		T46	3		T199	1
auto[1]	values[0]	values[3]	10	1			T250	1		T268	4		T280	3
auto[1]	values[0]	values[4]	11	1			T19	1		T199	4		T193	2
auto[1]	values[0]	values[5]	14	1			T47	1		T45	8		T229	1
auto[1]	values[0]	values[6]	16	1			T194	4		T161	1		T162	2
auto[1]	values[0]	values[7]	12	1			T281	4		T282	1		T283	2
auto[1]	values[1]	values[0]	14	1			T227	2		T284	2		T285	2
auto[1]	values[1]	values[1]	14	1			T31	1		T201	1		T186	1
auto[1]	values[1]	values[2]	6	1			T44	1		T256	1		T268	1
auto[1]	values[1]	values[3]	11	1			T215	1		T161	2		T281	1
auto[1]	values[1]	values[4]	13	1			T270	1		T285	2		T131	3
auto[1]	values[1]	values[5]	14	1			T227	1		T286	1		T131	4
auto[1]	values[1]	values[6]	10	1			T193	5		T191	1		T287	2
auto[1]	values[1]	values[7]	13	1			T26	2		T19	1		T20	1
auto[1]	values[2]	values[0]	9	1			T227	1		T35	1		T288	1
auto[1]	values[2]	values[1]	19	1			T40	2		T227	1		T162	2
auto[1]	values[2]	values[2]	15	1			T26	1		T20	1		T215	1
auto[1]	values[2]	values[3]	26	1			T19	3		T289	4		T284	2
auto[1]	values[2]	values[4]	9	1			T19	1		T172	2		T290	1
auto[1]	values[2]	values[5]	7	1			T26	3		T162	1		T134	1
auto[1]	values[2]	values[6]	21	1			T233	2		T72	2		T186	1
auto[1]	values[2]	values[7]	16	1			T12	2		T170	3		T50	2
auto[1]	values[3]	values[0]	32	1			T233	3		T195	3		T234	1
auto[1]	values[3]	values[1]	13	1			T48	3		T279	3		T291	4
auto[1]	values[3]	values[2]	17	1			T198	1		T201	2		T215	1
auto[1]	values[3]	values[3]	17	1			T198	1		T285	2		T290	1
auto[1]	values[3]	values[4]	9	1			T46	2		T201	1		T229	2
auto[1]	values[3]	values[5]	15	1			T12	1		T172	1		T260	3
auto[1]	values[3]	values[6]	16	1			T172	1		T292	2		T278	3
auto[1]	values[3]	values[7]	10	1			T233	2		T215	2		T186	5
auto[1]	values[4]	values[0]	16	1			T54	3		T268	2		T293	4
auto[1]	values[4]	values[1]	28	1			T31	1		T19	2		T172	1
auto[1]	values[4]	values[2]	11	1			T40	4		T225	1		T294	2
auto[1]	values[4]	values[3]	6	1			T196	2		T280	2		T294	1
auto[1]	values[4]	values[4]	17	1			T31	1		T44	1		T50	1
auto[1]	values[4]	values[5]	25	1			T46	1		T54	5		T218	1
auto[1]	values[4]	values[6]	10	1			T172	1		T201	1		T199	1
auto[1]	values[4]	values[7]	10	1			T275	4		T54	2		T270	1
auto[1]	values[5]	values[0]	8	1			T256	4		T293	1		T295	1
auto[1]	values[5]	values[1]	12	1			T12	1		T18	3		T225	3
auto[1]	values[5]	values[2]	12	1			T172	1		T198	3		T207	4
auto[1]	values[5]	values[3]	6	1			T31	2		T278	1		T281	2
auto[1]	values[5]	values[4]	15	1			T227	2		T296	2		T280	3
auto[1]	values[5]	values[5]	6	1			T12	1		T193	1		T297	1
auto[1]	values[5]	values[6]	15	1			T47	3		T225	1		T201	2
auto[1]	values[5]	values[7]	15	1			T18	1		T19	1		T229	1
auto[1]	values[6]	values[0]	10	1			T12	1		T44	1		T161	1
auto[1]	values[6]	values[1]	5	1			T31	3		T298	1		T299	1
auto[1]	values[6]	values[2]	21	1			T12	1		T35	2		T50	2
auto[1]	values[6]	values[3]	18	1			T26	1		T46	5		T161	1
auto[1]	values[6]	values[4]	5	1			T172	1		T234	1		T300	2
auto[1]	values[6]	values[5]	9	1			T257	3		T260	2		T200	3
auto[1]	values[6]	values[6]	12	1			T44	1		T19	4		T161	2
auto[1]	values[6]	values[7]	18	1			T195	2		T191	1		T211	1
auto[1]	values[7]	values[0]	10	1			T229	2		T186	2		T301	2
auto[1]	values[7]	values[1]	22	1			T50	2		T213	1		T219	3
auto[1]	values[7]	values[2]	1	1			T291	1		-	-		-	-
auto[1]	values[7]	values[3]	9	1			T200	1		T284	1		T213	1
auto[1]	values[7]	values[4]	12	1			T12	3		T302	2		T303	2
auto[1]	values[7]	values[5]	8	1			T195	1		T205	2		T218	2
auto[1]	values[7]	values[6]	8	1			T47	3		T227	2		T20	1
auto[1]	values[7]	values[7]	16	1			T186	1		T205	1		T290	1