Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
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Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 66 0 66 100.00
Crosses 128 0 128 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_filtered 2 0 2 100.00 100 1 1 2
cp_opcode 64 0 64 100.00 100 1 1 64


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 128 0 128 100.00 100 1 1 0


Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_filtered

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 17333 1 T2 9 T5 22 T7 14
auto[1] 47278 1 T2 9 T4 149 T5 18



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 64 0 64 100.00


Automatically Generated Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] 1470 1 T2 4 T4 5 T5 1
auto[4:7] 26852 1 T2 4 T4 28 T5 6
auto[8:11] 1448 1 T4 1 T5 2 T8 9
auto[12:15] 319 1 T4 3 T8 5 T10 1
auto[16:19] 376 1 T8 5 T10 1 T36 1
auto[20:23] 1881 1 T4 8 T5 1 T8 9
auto[24:27] 371 1 T5 1 T10 5 T13 1
auto[28:31] 366 1 T4 1 T8 2 T10 2
auto[32:35] 383 1 T4 5 T5 1 T8 1
auto[36:39] 315 1 T8 1 T10 1 T36 2
auto[40:43] 329 1 T5 2 T8 1 T10 2
auto[44:47] 381 1 T4 1 T8 2 T10 3
auto[48:51] 384 1 T4 3 T8 1 T10 2
auto[52:55] 1908 1 T4 8 T5 4 T8 6
auto[56:59] 1338 1 T4 2 T8 13 T10 2
auto[60:63] 330 1 T4 1 T8 1 T13 2
auto[64:67] 329 1 T5 2 T8 1 T36 3
auto[68:71] 349 1 T13 4 T36 5 T41 5
auto[72:75] 323 1 T2 2 T4 3 T10 4
auto[76:79] 405 1 T8 1 T36 5 T42 3
auto[80:83] 306 1 T8 1 T36 4 T42 1
auto[84:87] 363 1 T4 2 T5 1 T8 1
auto[88:91] 1887 1 T4 5 T8 12 T10 10
auto[92:95] 337 1 T4 1 T8 4 T10 1
auto[96:99] 346 1 T4 4 T8 3 T10 3
auto[100:103] 352 1 T8 1 T13 1 T36 3
auto[104:107] 1407 1 T8 14 T9 2 T10 3
auto[108:111] 346 1 T8 3 T10 3 T47 4
auto[112:115] 351 1 T4 2 T8 3 T10 1
auto[116:119] 355 1 T2 2 T4 1 T5 1
auto[120:123] 377 1 T4 3 T8 2 T10 2
auto[124:127] 332 1 T4 1 T8 3 T10 3
auto[128:131] 328 1 T10 4 T36 2 T41 2
auto[132:135] 333 1 T8 1 T13 4 T36 2
auto[136:139] 296 1 T5 1 T8 1 T36 4
auto[140:143] 299 1 T2 2 T4 1 T8 1
auto[144:147] 323 1 T4 2 T8 3 T36 3
auto[148:151] 371 1 T4 1 T36 3 T42 2
auto[152:155] 357 1 T8 7 T10 1 T36 1
auto[156:159] 2002 1 T4 5 T5 3 T8 9
auto[160:163] 314 1 T5 1 T8 3 T36 3
auto[164:167] 351 1 T8 6 T10 2 T36 2
auto[168:171] 393 1 T4 3 T8 5 T13 1
auto[172:175] 370 1 T4 1 T8 5 T10 1
auto[176:179] 358 1 T8 1 T10 3 T36 5
auto[180:183] 1938 1 T4 10 T5 2 T7 6
auto[184:187] 1401 1 T2 4 T4 8 T5 2
auto[188:191] 329 1 T8 2 T10 2 T36 1
auto[192:195] 301 1 T4 3 T8 3 T13 2
auto[196:199] 313 1 T4 2 T10 3 T36 1
auto[200:203] 388 1 T4 2 T5 1 T8 5
auto[204:207] 372 1 T4 2 T10 3 T36 6
auto[208:211] 353 1 T8 3 T10 1 T13 1
auto[212:215] 358 1 T8 2 T10 1 T40 3
auto[216:219] 332 1 T8 6 T36 8 T41 5
auto[220:223] 371 1 T8 1 T36 10 T42 4
auto[224:227] 365 1 T8 1 T10 2 T13 1
auto[228:231] 384 1 T4 4 T10 3 T13 1
auto[232:235] 3022 1 T4 10 T5 7 T7 8
auto[236:239] 310 1 T4 1 T36 3 T41 3
auto[240:243] 334 1 T8 3 T13 1 T36 6
auto[244:247] 365 1 T4 1 T8 1 T13 1
auto[248:251] 321 1 T4 4 T8 5 T10 2
auto[252:255] 343 1 T4 1 T5 1 T8 1



Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for cr_all

Bins
cp_opcodecp_filteredCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] auto[0] 550 1 T2 2 T8 11 T41 8
auto[0:3] auto[1] 920 1 T2 2 T4 5 T5 1
auto[4:7] auto[0] 6632 1 T2 2 T5 3 T7 7
auto[4:7] auto[1] 20220 1 T2 2 T4 28 T5 3
auto[8:11] auto[0] 488 1 T5 1 T8 4 T15 1
auto[8:11] auto[1] 960 1 T4 1 T5 1 T8 5
auto[12:15] auto[0] 59 1 T8 3 T41 1 T42 1
auto[12:15] auto[1] 260 1 T4 3 T8 2 T10 1
auto[16:19] auto[0] 94 1 T8 3 T42 2 T46 1
auto[16:19] auto[1] 282 1 T8 2 T10 1 T36 1
auto[20:23] auto[0] 518 1 T5 1 T8 8 T40 2
auto[20:23] auto[1] 1363 1 T4 8 T8 1 T10 11
auto[24:27] auto[0] 89 1 T41 2 T42 1 T46 2
auto[24:27] auto[1] 282 1 T5 1 T10 5 T13 1
auto[28:31] auto[0] 88 1 T8 2 T40 1 T45 3
auto[28:31] auto[1] 278 1 T4 1 T10 2 T13 4
auto[32:35] auto[0] 116 1 T5 1 T8 1 T40 1
auto[32:35] auto[1] 267 1 T4 5 T10 3 T36 3
auto[36:39] auto[0] 71 1 T41 2 T46 1 T47 1
auto[36:39] auto[1] 244 1 T8 1 T10 1 T36 2
auto[40:43] auto[0] 83 1 T5 2 T41 1 T48 1
auto[40:43] auto[1] 246 1 T8 1 T10 2 T13 1
auto[44:47] auto[0] 92 1 T8 1 T40 1 T42 1
auto[44:47] auto[1] 289 1 T4 1 T8 1 T10 3
auto[48:51] auto[0] 111 1 T42 3 T96 1 T46 1
auto[48:51] auto[1] 273 1 T4 3 T8 1 T10 2
auto[52:55] auto[0] 496 1 T5 3 T8 2 T41 4
auto[52:55] auto[1] 1412 1 T4 8 T5 1 T8 4
auto[56:59] auto[0] 500 1 T8 4 T40 2 T41 8
auto[56:59] auto[1] 838 1 T4 2 T8 9 T10 2
auto[60:63] auto[0] 76 1 T42 1 T46 2 T43 1
auto[60:63] auto[1] 254 1 T4 1 T8 1 T13 2
auto[64:67] auto[0] 88 1 T8 1 T41 1 T42 7
auto[64:67] auto[1] 241 1 T5 2 T36 3 T41 2
auto[68:71] auto[0] 96 1 T41 1 T64 1 T44 2
auto[68:71] auto[1] 253 1 T13 4 T36 5 T41 4
auto[72:75] auto[0] 87 1 T2 1 T45 1 T41 1
auto[72:75] auto[1] 236 1 T2 1 T4 3 T10 4
auto[76:79] auto[0] 87 1 T8 1 T42 2 T216 1
auto[76:79] auto[1] 318 1 T36 5 T42 1 T216 1
auto[80:83] auto[0] 83 1 T18 1 T51 1 T44 1
auto[80:83] auto[1] 223 1 T8 1 T36 4 T42 1
auto[84:87] auto[0] 97 1 T5 1 T47 2 T18 7
auto[84:87] auto[1] 266 1 T4 2 T8 1 T10 2
auto[88:91] auto[0] 489 1 T8 5 T40 1 T41 5
auto[88:91] auto[1] 1398 1 T4 5 T8 7 T10 10
auto[92:95] auto[0] 81 1 T8 2 T41 1 T48 2
auto[92:95] auto[1] 256 1 T4 1 T8 2 T10 1
auto[96:99] auto[0] 97 1 T8 2 T47 4 T18 3
auto[96:99] auto[1] 249 1 T4 4 T8 1 T10 3
auto[100:103] auto[0] 84 1 T8 1 T41 1 T46 2
auto[100:103] auto[1] 268 1 T13 1 T36 3 T41 1
auto[104:107] auto[0] 550 1 T8 4 T9 1 T41 9
auto[104:107] auto[1] 857 1 T8 10 T9 1 T10 3
auto[108:111] auto[0] 100 1 T8 3 T47 1 T18 1
auto[108:111] auto[1] 246 1 T10 3 T47 3 T18 1
auto[112:115] auto[0] 95 1 T8 3 T42 2 T46 2
auto[112:115] auto[1] 256 1 T4 2 T10 1 T36 4
auto[116:119] auto[0] 98 1 T2 1 T5 1 T41 1
auto[116:119] auto[1] 257 1 T2 1 T4 1 T8 1
auto[120:123] auto[0] 110 1 T8 2 T41 2 T46 1
auto[120:123] auto[1] 267 1 T4 3 T10 2 T36 1
auto[124:127] auto[0] 74 1 T8 1 T47 1 T48 1
auto[124:127] auto[1] 258 1 T4 1 T8 2 T10 3
auto[128:131] auto[0] 76 1 T41 2 T42 1 T47 1
auto[128:131] auto[1] 252 1 T10 4 T36 2 T42 1
auto[132:135] auto[0] 89 1 T8 1 T42 4 T96 1
auto[132:135] auto[1] 244 1 T13 4 T36 2 T41 1
auto[136:139] auto[0] 61 1 T41 2 T42 4 T47 2
auto[136:139] auto[1] 235 1 T5 1 T8 1 T36 4
auto[140:143] auto[0] 100 1 T2 1 T41 1 T42 3
auto[140:143] auto[1] 199 1 T2 1 T4 1 T8 1
auto[144:147] auto[0] 89 1 T8 1 T42 3 T46 1
auto[144:147] auto[1] 234 1 T4 2 T8 2 T36 3
auto[148:151] auto[0] 89 1 T42 2 T46 4 T47 2
auto[148:151] auto[1] 282 1 T4 1 T36 3 T52 4
auto[152:155] auto[0] 103 1 T8 5 T41 2 T47 1
auto[152:155] auto[1] 254 1 T8 2 T10 1 T36 1
auto[156:159] auto[0] 497 1 T5 3 T8 5 T41 6
auto[156:159] auto[1] 1505 1 T4 5 T8 4 T10 12
auto[160:163] auto[0] 106 1 T5 1 T8 3 T46 4
auto[160:163] auto[1] 208 1 T36 3 T41 1 T42 2
auto[164:167] auto[0] 78 1 T8 4 T41 4 T47 1
auto[164:167] auto[1] 273 1 T8 2 T10 2 T36 2
auto[168:171] auto[0] 84 1 T8 2 T47 1 T18 2
auto[168:171] auto[1] 309 1 T4 3 T8 3 T13 1
auto[172:175] auto[0] 94 1 T8 3 T45 3 T41 1
auto[172:175] auto[1] 276 1 T4 1 T8 2 T10 1
auto[176:179] auto[0] 97 1 T8 1 T46 3 T47 1
auto[176:179] auto[1] 261 1 T10 3 T36 5 T41 3
auto[180:183] auto[0] 476 1 T5 2 T7 3 T8 6
auto[180:183] auto[1] 1462 1 T4 10 T7 3 T8 4
auto[184:187] auto[0] 520 1 T2 2 T5 2 T8 6
auto[184:187] auto[1] 881 1 T2 2 T4 8 T8 4
auto[188:191] auto[0] 92 1 T42 1 T47 1 T48 1
auto[188:191] auto[1] 237 1 T8 2 T10 2 T36 1
auto[192:195] auto[0] 66 1 T8 1 T41 2 T48 1
auto[192:195] auto[1] 235 1 T4 3 T8 2 T13 2
auto[196:199] auto[0] 76 1 T41 4 T42 1 T47 3
auto[196:199] auto[1] 237 1 T4 2 T10 3 T36 1
auto[200:203] auto[0] 95 1 T5 1 T8 1 T42 1
auto[200:203] auto[1] 293 1 T4 2 T8 4 T10 3
auto[204:207] auto[0] 114 1 T46 2 T47 4 T233 1
auto[204:207] auto[1] 258 1 T4 2 T10 3 T36 6
auto[208:211] auto[0] 95 1 T41 1 T42 1 T46 1
auto[208:211] auto[1] 258 1 T8 3 T10 1 T13 1
auto[212:215] auto[0] 101 1 T8 2 T41 1 T42 1
auto[212:215] auto[1] 257 1 T10 1 T40 3 T36 3
auto[216:219] auto[0] 77 1 T8 2 T41 4 T46 1
auto[216:219] auto[1] 255 1 T8 4 T36 8 T41 1
auto[220:223] auto[0] 88 1 T8 1 T42 4 T46 1
auto[220:223] auto[1] 283 1 T36 10 T48 4 T18 4
auto[224:227] auto[0] 94 1 T41 3 T46 1 T18 3
auto[224:227] auto[1] 271 1 T8 1 T10 2 T13 1
auto[228:231] auto[0] 90 1 T41 1 T42 3 T18 1
auto[228:231] auto[1] 294 1 T4 4 T10 3 T13 1
auto[232:235] auto[0] 1014 1 T7 4 T8 17 T9 1
auto[232:235] auto[1] 2008 1 T4 10 T5 7 T7 4
auto[236:239] auto[0] 68 1 T41 2 T48 1 T64 1
auto[236:239] auto[1] 242 1 T4 1 T36 3 T41 1
auto[240:243] auto[0] 75 1 T8 2 T41 4 T46 1
auto[240:243] auto[1] 259 1 T8 1 T13 1 T36 6
auto[244:247] auto[0] 93 1 T8 1 T41 1 T42 2
auto[244:247] auto[1] 272 1 T4 1 T13 1 T36 2
auto[248:251] auto[0] 83 1 T8 3 T41 3 T42 1
auto[248:251] auto[1] 238 1 T4 4 T8 2 T10 2
auto[252:255] auto[0] 74 1 T40 1 T41 2 T47 3
auto[252:255] auto[1] 269 1 T4 1 T5 1 T8 1

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