Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3090	1			T8	10		T11	21		T13	150
values[1]	4202	1			T3	53		T11	82		T13	24
values[2]	4170	1			T11	22		T38	138		T39	20
values[3]	3506	1			T38	24		T40	2		T16	60
values[4]	3885	1			T3	124		T11	23		T12	31
values[5]	4206	1			T3	33		T10	48		T38	40
values[6]	3618	1			T11	20		T25	14		T38	51
values[7]	3672	1			T11	40		T38	116		T16	22

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3924	1			T11	20		T183	2		T40	2
values[1]	3659	1			T11	23		T38	129		T39	20
values[2]	3994	1			T11	22		T27	6		T38	152
values[3]	4005	1			T11	40		T13	150		T38	34
values[4]	3827	1			T11	40		T12	31		T39	42
values[5]	3522	1			T3	177		T10	48		T11	41
values[6]	3092	1			T3	33		T38	203		T39	29
values[7]	4326	1			T8	10		T11	22		T13	24

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

29574

1

T3

206

T8

10

T10

48

auto[1]

775

1

T3

4

T11

2

T38

12

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	383	1			T183	2		T18	21		T208	20
auto[0]	values[0]	values[1]	353	1			T208	31		T21	44		T204	42
auto[0]	values[0]	values[2]	402	1			T216	8		T18	22		T208	20
auto[0]	values[0]	values[3]	575	1			T13	150		T198	2		T283	2
auto[0]	values[0]	values[4]	250	1			T43	20		T235	14		T18	25
auto[0]	values[0]	values[5]	279	1			T11	21		T21	23		T234	20
auto[0]	values[0]	values[6]	289	1			T16	21		T43	40		T208	39
auto[0]	values[0]	values[7]	483	1			T8	10		T175	32		T168	20
auto[0]	values[1]	values[0]	545	1			T11	20		T214	20		T284	19
auto[0]	values[1]	values[1]	587	1			T38	127		T16	23		T44	20
auto[0]	values[1]	values[2]	592	1			T11	22		T18	46		T256	12
auto[0]	values[1]	values[3]	412	1			T18	40		T237	31		T229	31
auto[0]	values[1]	values[4]	516	1			T11	20		T137	20		T176	55
auto[0]	values[1]	values[5]	588	1			T3	52		T11	19		T39	26
auto[0]	values[1]	values[6]	230	1			T38	30		T89	8		T234	20
auto[0]	values[1]	values[7]	618	1			T13	24		T16	20		T21	24
auto[0]	values[2]	values[0]	659	1			T174	20		T201	20		T285	14
auto[0]	values[2]	values[1]	616	1			T39	17		T234	20		T269	4
auto[0]	values[2]	values[2]	431	1			T38	49		T270	10		T226	20
auto[0]	values[2]	values[3]	640	1			T16	20		T88	6		T208	69
auto[0]	values[2]	values[4]	483	1			T18	24		T168	20		T78	22
auto[0]	values[2]	values[5]	387	1			T21	20		T176	81		T229	23
auto[0]	values[2]	values[6]	354	1			T38	88		T119	4		T18	42
auto[0]	values[2]	values[7]	494	1			T11	22		T247	20		T174	45
auto[0]	values[3]	values[0]	572	1			T16	20		T43	37		T228	8
auto[0]	values[3]	values[1]	194	1			T41	18		T208	20		T144	23
auto[0]	values[3]	values[2]	552	1			T44	18		T174	39		T237	58
auto[0]	values[3]	values[3]	332	1			T44	20		T18	20		T90	18
auto[0]	values[3]	values[4]	453	1			T286	20		T91	2		T234	20
auto[0]	values[3]	values[5]	313	1			T16	15		T18	25		T234	20
auto[0]	values[3]	values[6]	574	1			T38	23		T18	20		T253	18
auto[0]	values[3]	values[7]	412	1			T16	20		T18	19		T272	16
auto[0]	values[4]	values[0]	512	1			T18	43		T174	29		T287	8
auto[0]	values[4]	values[1]	426	1			T11	23		T21	20		T195	37
auto[0]	values[4]	values[2]	380	1			T27	6		T39	20		T275	10
auto[0]	values[4]	values[3]	360	1			T39	40		T16	22		T18	22
auto[0]	values[4]	values[4]	509	1			T12	31		T39	40		T44	20
auto[0]	values[4]	values[5]	487	1			T3	121		T118	18		T42	4
auto[0]	values[4]	values[6]	359	1			T38	37		T44	19		T21	22
auto[0]	values[4]	values[7]	733	1			T44	19		T21	21		T168	20
auto[0]	values[5]	values[0]	410	1			T168	20		T199	24		T264	4
auto[0]	values[5]	values[1]	534	1			T18	20		T138	14		T21	21
auto[0]	values[5]	values[2]	509	1			T38	20		T21	20		T174	19
auto[0]	values[5]	values[3]	617	1			T39	80		T18	22		T78	25
auto[0]	values[5]	values[4]	393	1			T168	21		T288	4		T237	20
auto[0]	values[5]	values[5]	499	1			T10	48		T117	14		T18	20
auto[0]	values[5]	values[6]	510	1			T3	33		T39	28		T44	19
auto[0]	values[5]	values[7]	639	1			T38	18		T176	19		T204	21
auto[0]	values[6]	values[0]	362	1			T18	26		T196	4		T21	18
auto[0]	values[6]	values[1]	342	1			T16	20		T254	8		T289	18
auto[0]	values[6]	values[2]	307	1			T206	12		T229	58		T204	24
auto[0]	values[6]	values[3]	519	1			T11	20		T223	12		T290	2
auto[0]	values[6]	values[4]	779	1			T208	20		T205	81		T207	20
auto[0]	values[6]	values[5]	378	1			T25	14		T258	2		T208	20
auto[0]	values[6]	values[6]	317	1			T38	20		T16	23		T168	20
auto[0]	values[6]	values[7]	525	1			T38	30		T16	20		T291	18
auto[0]	values[7]	values[0]	388	1			T44	15		T239	12		T204	22
auto[0]	values[7]	values[1]	499	1			T199	19		T78	23		T276	18
auto[0]	values[7]	values[2]	731	1			T38	82		T175	19		T78	30
auto[0]	values[7]	values[3]	446	1			T11	19		T38	33		T16	22
auto[0]	values[7]	values[4]	361	1			T11	20		T255	4		T176	24
auto[0]	values[7]	values[5]	492	1			T168	20		T234	19		T78	98
auto[0]	values[7]	values[6]	391	1			T250	8		T18	22		T292	2
auto[0]	values[7]	values[7]	292	1			T174	40		T220	20		T293	19
auto[1]	values[0]	values[0]	9	1			T224	1		T294	1		T150	2
auto[1]	values[0]	values[1]	13	1			T208	1		T21	2		T214	1
auto[1]	values[0]	values[2]	5	1			T295	1		T296	2		T297	2
auto[1]	values[0]	values[3]	15	1			T282	2		T207	3		T294	1
auto[1]	values[0]	values[4]	3	1			T298	1		T299	2		-	-
auto[1]	values[0]	values[5]	9	1			T21	3		T204	3		T251	3
auto[1]	values[0]	values[6]	5	1			T16	1		T208	1		T175	2
auto[1]	values[0]	values[7]	17	1			T175	3		T78	5		T213	3
auto[1]	values[1]	values[0]	7	1			T284	1		T300	1		T150	3
auto[1]	values[1]	values[1]	18	1			T38	2		T16	2		T139	6
auto[1]	values[1]	values[2]	17	1			T18	1		T146	1		T301	2
auto[1]	values[1]	values[3]	11	1			T237	1		T221	3		T214	2
auto[1]	values[1]	values[4]	16	1			T176	1		T146	2		T302	2
auto[1]	values[1]	values[5]	17	1			T3	1		T11	1		T174	2
auto[1]	values[1]	values[6]	3	1			T38	1		T226	1		T241	1
auto[1]	values[1]	values[7]	25	1			T21	1		T199	2		T201	1
auto[1]	values[2]	values[0]	13	1			T204	4		T205	1		T303	1
auto[1]	values[2]	values[1]	15	1			T39	3		T234	2		T204	2
auto[1]	values[2]	values[2]	15	1			T38	1		T304	1		T243	3
auto[1]	values[2]	values[3]	16	1			T21	3		T146	2		T224	5
auto[1]	values[2]	values[4]	16	1			T18	2		T78	1		T305	1
auto[1]	values[2]	values[5]	13	1			T21	2		T176	1		T229	2
auto[1]	values[2]	values[6]	6	1			T18	2		T218	1		T306	2
auto[1]	values[2]	values[7]	12	1			T174	1		T213	1		T251	1
auto[1]	values[3]	values[0]	21	1			T40	2		T43	3		T282	2
auto[1]	values[3]	values[1]	5	1			T41	4		T207	1		-	-
auto[1]	values[3]	values[2]	11	1			T44	2		T174	1		T229	1
auto[1]	values[3]	values[3]	9	1			T78	2		T31	1		T277	2
auto[1]	values[3]	values[4]	5	1			T78	1		T307	1		T308	2
auto[1]	values[3]	values[5]	9	1			T16	5		T243	1		T303	2
auto[1]	values[3]	values[6]	18	1			T38	1		T18	1		T221	1
auto[1]	values[3]	values[7]	26	1			T18	1		T234	1		T233	2
auto[1]	values[4]	values[0]	12	1			T224	3		T305	4		T202	2
auto[1]	values[4]	values[1]	21	1			T195	3		T78	1		T227	1
auto[1]	values[4]	values[2]	19	1			T39	2		T309	8		T150	7
auto[1]	values[4]	values[3]	10	1			T16	1		T78	1		T146	4
auto[1]	values[4]	values[4]	19	1			T39	2		T221	2		T146	6
auto[1]	values[4]	values[5]	16	1			T3	3		T42	2		T21	1
auto[1]	values[4]	values[6]	10	1			T38	3		T44	1		T226	1
auto[1]	values[4]	values[7]	12	1			T44	1		T168	1		T78	3
auto[1]	values[5]	values[0]	10	1			T310	1		T311	1		T304	2
auto[1]	values[5]	values[1]	14	1			T225	2		T150	9		T312	1
auto[1]	values[5]	values[2]	7	1			T174	1		T195	1		T243	1
auto[1]	values[5]	values[3]	19	1			T39	3		T78	1		T213	2
auto[1]	values[5]	values[4]	2	1			T288	2		-	-		-	-
auto[1]	values[5]	values[5]	13	1			T214	2		T251	2		T313	1
auto[1]	values[5]	values[6]	11	1			T39	1		T44	1		T208	1
auto[1]	values[5]	values[7]	19	1			T38	2		T176	1		T204	1
auto[1]	values[6]	values[0]	7	1			T21	3		T168	1		T78	2
auto[1]	values[6]	values[1]	11	1			T78	1		T218	2		T314	1
auto[1]	values[6]	values[2]	6	1			T229	4		T243	1		T202	1
auto[1]	values[6]	values[3]	18	1			T221	3		T282	7		T271	2
auto[1]	values[6]	values[4]	17	1			T205	1		T227	2		T243	2
auto[1]	values[6]	values[5]	6	1			T271	2		T300	3		T315	1
auto[1]	values[6]	values[6]	11	1			T243	1		T316	2		T241	1
auto[1]	values[6]	values[7]	13	1			T38	1		T78	3		T246	1
auto[1]	values[7]	values[0]	14	1			T44	5		T205	2		T277	2
auto[1]	values[7]	values[1]	11	1			T199	1		T78	2		T276	2
auto[1]	values[7]	values[2]	10	1			T175	1		T78	1		T220	1
auto[1]	values[7]	values[3]	6	1			T11	1		T38	1		T18	1
auto[1]	values[7]	values[4]	5	1			T144	2		T205	1		T271	1
auto[1]	values[7]	values[5]	16	1			T234	1		T78	3		T146	1
auto[1]	values[7]	values[6]	4	1			T317	1		T318	2		T298	1
auto[1]	values[7]	values[7]	6	1			T293	1		T238	2		T314	2