Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4242	1			T3	87		T13	20		T14	45
values[1]	4224	1			T16	25		T70	32		T219	16
values[2]	3637	1			T2	20		T14	33		T50	22
values[3]	4682	1			T4	14		T8	26		T13	20
values[4]	4181	1			T1	18		T5	10		T13	20
values[5]	3807	1			T13	40		T58	2		T27	22
values[6]	4012	1			T2	20		T15	74		T68	4
values[7]	4224	1			T13	60		T14	20		T57	22

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	4501	1			T13	20		T57	22		T15	74
values[1]	3753	1			T3	87		T13	20		T58	2
values[2]	4155	1			T5	10		T13	20		T14	65
values[3]	4147	1			T4	14		T14	33		T68	4
values[4]	3977	1			T50	22		T59	14		T27	22
values[5]	4571	1			T1	18		T2	20		T13	40
values[6]	3076	1			T8	26		T13	40		T16	23
values[7]	4829	1			T2	20		T13	20		T14	22

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

32213

1

T1

18

T2

40

T3

87

auto[1]

796

1

T13

4

T14

1

T50

2

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	558	1			T13	20		T16	23		T243	14
auto[0]	values[0]	values[1]	504	1			T3	87		T22	45		T198	37
auto[0]	values[0]	values[2]	600	1			T14	44		T67	2		T94	8
auto[0]	values[0]	values[3]	493	1			T16	19		T256	32		T163	20
auto[0]	values[0]	values[4]	641	1			T16	103		T22	33		T165	19
auto[0]	values[0]	values[5]	498	1			T274	2		T54	20		T166	19
auto[0]	values[0]	values[6]	389	1			T166	25		T236	20		T190	22
auto[0]	values[0]	values[7]	443	1			T20	20		T21	24		T198	113
auto[0]	values[1]	values[0]	446	1			T189	26		T64	34		T283	6
auto[0]	values[1]	values[1]	419	1			T79	10		T22	46		T226	22
auto[0]	values[1]	values[2]	643	1			T250	12		T187	16		T191	18
auto[0]	values[1]	values[3]	435	1			T53	31		T54	20		T275	10
auto[0]	values[1]	values[4]	361	1			T70	32		T219	16		T20	20
auto[0]	values[1]	values[5]	684	1			T163	20		T187	20		T189	20
auto[0]	values[1]	values[6]	443	1			T198	20		T236	19		T223	33
auto[0]	values[1]	values[7]	687	1			T16	24		T214	18		T22	20
auto[0]	values[2]	values[0]	210	1			T16	20		T83	12		T22	40
auto[0]	values[2]	values[1]	452	1			T165	19		T187	29		T153	67
auto[0]	values[2]	values[2]	543	1			T93	10		T16	81		T20	42
auto[0]	values[2]	values[3]	554	1			T14	33		T53	89		T21	26
auto[0]	values[2]	values[4]	250	1			T50	20		T153	20		T189	20
auto[0]	values[2]	values[5]	534	1			T54	20		T187	24		T191	20
auto[0]	values[2]	values[6]	454	1			T22	56		T165	20		T153	67
auto[0]	values[2]	values[7]	531	1			T2	20		T251	4		T56	44
auto[0]	values[3]	values[0]	516	1			T21	20		T230	10		T191	19
auto[0]	values[3]	values[1]	713	1			T154	25		T186	20		T252	20
auto[0]	values[3]	values[2]	429	1			T13	20		T53	20		T189	62
auto[0]	values[3]	values[3]	443	1			T4	14		T16	53		T54	20
auto[0]	values[3]	values[4]	840	1			T226	190		T153	205		T236	20
auto[0]	values[3]	values[5]	618	1			T56	22		T190	20		T273	2
auto[0]	values[3]	values[6]	378	1			T8	26		T277	4		T20	19
auto[0]	values[3]	values[7]	651	1			T14	22		T16	97		T21	20
auto[0]	values[4]	values[0]	502	1			T16	28		T54	20		T254	14
auto[0]	values[4]	values[1]	564	1			T16	20		T56	20		T217	21
auto[0]	values[4]	values[2]	407	1			T5	10		T22	20		T186	28
auto[0]	values[4]	values[3]	321	1			T187	23		T217	27		T263	14
auto[0]	values[4]	values[4]	411	1			T59	14		T16	20		T244	10
auto[0]	values[4]	values[5]	625	1			T1	18		T20	95		T22	19
auto[0]	values[4]	values[6]	287	1			T13	20		T16	22		T163	20
auto[0]	values[4]	values[7]	968	1			T39	10		T284	2		T285	8
auto[0]	values[5]	values[0]	731	1			T163	20		T165	20		T91	4
auto[0]	values[5]	values[1]	309	1			T13	20		T58	2		T259	2
auto[0]	values[5]	values[2]	469	1			T16	25		T187	20		T191	20
auto[0]	values[5]	values[3]	455	1			T54	20		T132	12		T153	79
auto[0]	values[5]	values[4]	374	1			T27	22		T54	18		T20	21
auto[0]	values[5]	values[5]	587	1			T13	17		T163	19		T191	19
auto[0]	values[5]	values[6]	393	1			T207	10		T141	18		T188	20
auto[0]	values[5]	values[7]	399	1			T16	52		T56	31		T22	25
auto[0]	values[6]	values[0]	824	1			T15	74		T16	143		T186	20
auto[0]	values[6]	values[1]	281	1			T189	40		T215	37		T286	20
auto[0]	values[6]	values[2]	506	1			T16	20		T267	8		T187	20
auto[0]	values[6]	values[3]	646	1			T68	4		T56	96		T166	22
auto[0]	values[6]	values[4]	614	1			T16	40		T56	20		T187	19
auto[0]	values[6]	values[5]	395	1			T2	20		T21	20		T56	22
auto[0]	values[6]	values[6]	241	1			T258	6		T234	41		T218	19
auto[0]	values[6]	values[7]	424	1			T20	56		T280	18		T154	20
auto[0]	values[7]	values[0]	607	1			T57	22		T52	10		T84	10
auto[0]	values[7]	values[1]	422	1			T56	63		T261	26		T203	98
auto[0]	values[7]	values[2]	464	1			T14	20		T81	14		T20	36
auto[0]	values[7]	values[3]	698	1			T53	102		T266	52		T22	29
auto[0]	values[7]	values[4]	392	1			T229	14		T20	22		T164	12
auto[0]	values[7]	values[5]	498	1			T13	20		T53	20		T268	4
auto[0]	values[7]	values[6]	407	1			T13	20		T257	8		T202	8
auto[0]	values[7]	values[7]	632	1			T13	19		T181	4		T47	29
auto[1]	values[0]	values[0]	20	1			T16	1		T198	4		T203	3
auto[1]	values[0]	values[1]	9	1			T22	2		T198	3		T205	1
auto[1]	values[0]	values[2]	8	1			T14	1		T205	1		T246	2
auto[1]	values[0]	values[3]	18	1			T16	1		T198	3		T153	2
auto[1]	values[0]	values[4]	14	1			T22	2		T165	1		T217	1
auto[1]	values[0]	values[5]	22	1			T166	1		T22	2		T189	1
auto[1]	values[0]	values[6]	13	1			T190	1		T235	3		T212	1
auto[1]	values[0]	values[7]	12	1			T20	1		T198	4		T212	2
auto[1]	values[1]	values[0]	10	1			T189	1		T64	1		T281	2
auto[1]	values[1]	values[1]	19	1			T287	2		T288	1		T289	3
auto[1]	values[1]	values[2]	24	1			T187	4		T191	2		T189	2
auto[1]	values[1]	values[3]	8	1			T47	2		T199	1		T290	1
auto[1]	values[1]	values[4]	13	1			T192	1		T213	2		T291	5
auto[1]	values[1]	values[5]	16	1			T262	2		T292	2		T293	1
auto[1]	values[1]	values[6]	9	1			T236	1		T223	3		T41	2
auto[1]	values[1]	values[7]	7	1			T16	1		T188	3		T241	1
auto[1]	values[2]	values[0]	3	1			T16	2		T187	1		-	-
auto[1]	values[2]	values[1]	14	1			T165	1		T154	1		T238	3
auto[1]	values[2]	values[2]	18	1			T16	1		T20	1		T165	1
auto[1]	values[2]	values[3]	13	1			T53	2		T189	3		T294	1
auto[1]	values[2]	values[4]	11	1			T50	2		T295	1		T296	3
auto[1]	values[2]	values[5]	22	1			T187	2		T154	2		T186	1
auto[1]	values[2]	values[6]	14	1			T22	1		T188	1		T142	1
auto[1]	values[2]	values[7]	14	1			T166	1		T141	1		T286	3
auto[1]	values[3]	values[0]	20	1			T191	1		T189	1		T203	3
auto[1]	values[3]	values[1]	12	1			T199	3		T157	1		T209	1
auto[1]	values[3]	values[2]	7	1			T189	1		T297	2		T298	1
auto[1]	values[3]	values[3]	13	1			T56	4		T189	3		T218	1
auto[1]	values[3]	values[4]	21	1			T153	7		T223	1		T199	3
auto[1]	values[3]	values[5]	5	1			T184	2		T299	3		-	-
auto[1]	values[3]	values[6]	9	1			T20	1		T198	1		T300	4
auto[1]	values[3]	values[7]	7	1			T16	1		T281	4		T301	1
auto[1]	values[4]	values[0]	11	1			T16	4		T189	1		T192	1
auto[1]	values[4]	values[1]	11	1			T217	3		T195	3		T203	2
auto[1]	values[4]	values[2]	6	1			T203	1		T215	1		T216	1
auto[1]	values[4]	values[3]	7	1			T187	1		T302	2		T269	1
auto[1]	values[4]	values[4]	8	1			T217	1		T291	4		T303	1
auto[1]	values[4]	values[5]	21	1			T20	1		T22	1		T186	1
auto[1]	values[4]	values[6]	10	1			T16	1		T191	1		T194	1
auto[1]	values[4]	values[7]	22	1			T153	1		T189	5		T195	1
auto[1]	values[5]	values[0]	11	1			T218	1		T290	3		T286	1
auto[1]	values[5]	values[1]	2	1			T304	2		-	-		-	-
auto[1]	values[5]	values[2]	16	1			T16	3		T187	1		T190	2
auto[1]	values[5]	values[3]	18	1			T153	3		T290	1		T246	1
auto[1]	values[5]	values[4]	5	1			T54	2		T199	2		T220	1
auto[1]	values[5]	values[5]	16	1			T13	3		T163	1		T191	1
auto[1]	values[5]	values[6]	13	1			T141	2		T238	1		T142	1
auto[1]	values[5]	values[7]	9	1			T56	1		T22	2		T238	1
auto[1]	values[6]	values[0]	11	1			T16	3		T305	5		T43	1
auto[1]	values[6]	values[1]	6	1			T215	5		T306	1		-	-
auto[1]	values[6]	values[2]	10	1			T204	1		T307	2		T308	1
auto[1]	values[6]	values[3]	11	1			T166	3		T163	1		T199	2
auto[1]	values[6]	values[4]	13	1			T187	1		T190	1		T186	3
auto[1]	values[6]	values[5]	19	1			T56	2		T218	3		T157	1
auto[1]	values[6]	values[6]	5	1			T234	3		T218	1		T305	1
auto[1]	values[6]	values[7]	6	1			T20	2		T188	2		T184	1
auto[1]	values[7]	values[0]	21	1			T52	2		T55	2		T189	4
auto[1]	values[7]	values[1]	16	1			T56	2		T203	2		T309	1
auto[1]	values[7]	values[2]	5	1			T200	1		T290	2		T310	1
auto[1]	values[7]	values[3]	14	1			T22	1		T187	1		T154	4
auto[1]	values[7]	values[4]	9	1			T20	2		T154	2		T223	1
auto[1]	values[7]	values[5]	11	1			T190	1		T234	3		T212	2
auto[1]	values[7]	values[6]	11	1			T205	1		T199	1		T290	2
auto[1]	values[7]	values[7]	17	1			T13	1		T47	1		T198	2