Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
dashboard | hierarchy | modlist | groups | tests | asserts


Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 66 0 66 100.00
Crosses 128 0 128 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_filtered 2 0 2 100.00 100 1 1 2
cp_opcode 64 0 64 100.00 100 1 1 64


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 128 0 128 100.00 100 1 1 0


Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_filtered

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 14065 1 T2 6 T4 2 T5 101
auto[1] 46947 1 T2 6 T3 137 T4 2



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 64 0 64 100.00


Automatically Generated Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] 1268 1 T5 9 T9 3 T10 2
auto[4:7] 25004 1 T2 12 T3 34 T5 36
auto[8:11] 1277 1 T3 1 T5 10 T9 8
auto[12:15] 312 1 T3 1 T5 1 T29 1
auto[16:19] 331 1 T3 1 T5 2 T15 1
auto[20:23] 1899 1 T3 11 T5 11 T9 4
auto[24:27] 331 1 T5 1 T10 1 T15 2
auto[28:31] 337 1 T3 2 T5 2 T10 1
auto[32:35] 382 1 T5 3 T10 4 T13 1
auto[36:39] 348 1 T3 6 T5 1 T10 1
auto[40:43] 386 1 T5 2 T13 1 T29 6
auto[44:47] 337 1 T3 2 T5 3 T13 2
auto[48:51] 304 1 T3 1 T5 1 T15 4
auto[52:55] 1841 1 T3 6 T5 11 T9 5
auto[56:59] 1280 1 T3 3 T5 2 T9 8
auto[60:63] 334 1 T5 1 T9 1 T15 6
auto[64:67] 327 1 T3 1 T5 2 T10 2
auto[68:71] 291 1 T10 1 T13 3 T15 1
auto[72:75] 306 1 T3 1 T5 1 T15 3
auto[76:79] 302 1 T3 1 T13 1 T15 9
auto[80:83] 316 1 T5 5 T9 1 T10 2
auto[84:87] 345 1 T5 2 T9 1 T111 2
auto[88:91] 1835 1 T3 8 T4 2 T5 5
auto[92:95] 339 1 T3 2 T10 1 T15 2
auto[96:99] 394 1 T3 1 T5 1 T9 2
auto[100:103] 317 1 T3 1 T5 2 T15 2
auto[104:107] 1253 1 T3 1 T5 10 T9 4
auto[108:111] 367 1 T5 1 T13 2 T110 1
auto[112:115] 362 1 T5 5 T10 1 T15 5
auto[116:119] 371 1 T5 1 T9 1 T15 1
auto[120:123] 346 1 T5 1 T15 1 T29 4
auto[124:127] 339 1 T9 1 T13 4 T15 2
auto[128:131] 340 1 T5 3 T15 1 T36 2
auto[132:135] 339 1 T5 1 T9 2 T10 2
auto[136:139] 313 1 T3 3 T5 2 T9 4
auto[140:143] 329 1 T5 3 T9 1 T10 2
auto[144:147] 323 1 T5 5 T9 1 T13 3
auto[148:151] 327 1 T5 1 T10 2 T15 2
auto[152:155] 366 1 T3 1 T5 1 T10 1
auto[156:159] 1961 1 T3 7 T5 10 T9 5
auto[160:163] 320 1 T5 2 T13 1 T29 1
auto[164:167] 301 1 T3 1 T5 2 T9 5
auto[168:171] 352 1 T3 1 T5 1 T15 3
auto[172:175] 322 1 T3 1 T5 3 T10 2
auto[176:179] 295 1 T3 3 T5 1 T13 2
auto[180:183] 1854 1 T3 5 T5 5 T9 7
auto[184:187] 1302 1 T3 6 T4 2 T5 10
auto[188:191] 315 1 T10 2 T15 4 T29 5
auto[192:195] 329 1 T5 2 T9 4 T15 3
auto[196:199] 333 1 T5 2 T9 2 T10 1
auto[200:203] 339 1 T3 3 T5 5 T10 1
auto[204:207] 373 1 T3 1 T5 1 T9 1
auto[208:211] 324 1 T3 2 T10 1 T13 3
auto[212:215] 350 1 T9 5 T13 1 T15 1
auto[216:219] 310 1 T10 2 T33 2 T15 3
auto[220:223] 367 1 T3 1 T5 2 T9 2
auto[224:227] 336 1 T3 3 T5 5 T9 1
auto[228:231] 347 1 T5 2 T33 1 T15 1
auto[232:235] 2800 1 T3 10 T5 11 T9 13
auto[236:239] 341 1 T3 1 T10 2 T13 1
auto[240:243] 346 1 T5 1 T9 1 T13 3
auto[244:247] 338 1 T3 4 T5 3 T9 1
auto[248:251] 355 1 T13 2 T15 4 T29 7
auto[252:255] 284 1 T5 1 T29 2 T36 1



Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for cr_all

Bins
cp_opcodecp_filteredCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] auto[0] 428 1 T5 4 T9 1 T36 6
auto[0:3] auto[1] 840 1 T5 5 T9 2 T10 2
auto[4:7] auto[0] 5053 1 T2 6 T5 23 T9 66
auto[4:7] auto[1] 19951 1 T2 6 T3 34 T5 13
auto[8:11] auto[0] 410 1 T5 1 T9 3 T11 2
auto[8:11] auto[1] 867 1 T3 1 T5 9 T9 5
auto[12:15] auto[0] 75 1 T54 2 T52 1 T55 1
auto[12:15] auto[1] 237 1 T3 1 T5 1 T29 1
auto[16:19] auto[0] 81 1 T36 1 T52 6 T55 1
auto[16:19] auto[1] 250 1 T3 1 T5 2 T15 1
auto[20:23] auto[0] 431 1 T5 6 T9 2 T12 3
auto[20:23] auto[1] 1468 1 T3 11 T5 5 T9 2
auto[24:27] auto[0] 74 1 T5 1 T36 1 T38 1
auto[24:27] auto[1] 257 1 T10 1 T15 2 T29 3
auto[28:31] auto[0] 67 1 T5 2 T36 3 T38 1
auto[28:31] auto[1] 270 1 T3 2 T10 1 T13 4
auto[32:35] auto[0] 69 1 T5 2 T36 1 T55 2
auto[32:35] auto[1] 313 1 T5 1 T10 4 T13 1
auto[36:39] auto[0] 77 1 T81 3 T38 1 T53 1
auto[36:39] auto[1] 271 1 T3 6 T5 1 T10 1
auto[40:43] auto[0] 85 1 T5 1 T36 2 T52 1
auto[40:43] auto[1] 301 1 T5 1 T13 1 T29 6
auto[44:47] auto[0] 87 1 T5 3 T36 1 T55 1
auto[44:47] auto[1] 250 1 T3 2 T13 2 T29 5
auto[48:51] auto[0] 49 1 T52 1 T57 1 T17 2
auto[48:51] auto[1] 255 1 T3 1 T5 1 T15 4
auto[52:55] auto[0] 388 1 T5 3 T9 4 T98 2
auto[52:55] auto[1] 1453 1 T3 6 T5 8 T9 1
auto[56:59] auto[0] 433 1 T9 8 T33 1 T36 8
auto[56:59] auto[1] 847 1 T3 3 T5 2 T10 2
auto[60:63] auto[0] 81 1 T5 1 T9 1 T52 1
auto[60:63] auto[1] 253 1 T15 6 T29 1 T44 3
auto[64:67] auto[0] 74 1 T5 1 T52 1 T55 1
auto[64:67] auto[1] 253 1 T3 1 T5 1 T10 2
auto[68:71] auto[0] 64 1 T36 1 T81 1 T52 3
auto[68:71] auto[1] 227 1 T10 1 T13 3 T15 1
auto[72:75] auto[0] 94 1 T5 1 T38 1 T52 2
auto[72:75] auto[1] 212 1 T3 1 T15 3 T29 4
auto[76:79] auto[0] 79 1 T52 1 T56 1 T17 2
auto[76:79] auto[1] 223 1 T3 1 T13 1 T15 9
auto[80:83] auto[0] 63 1 T5 2 T38 1 T55 2
auto[80:83] auto[1] 253 1 T5 3 T9 1 T10 2
auto[84:87] auto[0] 86 1 T111 1 T36 2 T38 1
auto[84:87] auto[1] 259 1 T5 2 T9 1 T111 1
auto[88:91] auto[0] 409 1 T4 1 T5 1 T9 1
auto[88:91] auto[1] 1426 1 T3 8 T4 1 T5 4
auto[92:95] auto[0] 88 1 T38 3 T56 4 T57 2
auto[92:95] auto[1] 251 1 T3 2 T10 1 T15 2
auto[96:99] auto[0] 76 1 T9 2 T36 1 T110 3
auto[96:99] auto[1] 318 1 T3 1 T5 1 T10 3
auto[100:103] auto[0] 70 1 T38 1 T52 1 T55 3
auto[100:103] auto[1] 247 1 T3 1 T5 2 T15 2
auto[104:107] auto[0] 414 1 T5 3 T9 4 T11 3
auto[104:107] auto[1] 839 1 T3 1 T5 7 T10 2
auto[108:111] auto[0] 94 1 T5 1 T81 2 T38 3
auto[108:111] auto[1] 273 1 T13 2 T110 1 T53 1
auto[112:115] auto[0] 75 1 T5 2 T38 3 T53 1
auto[112:115] auto[1] 287 1 T5 3 T10 1 T15 5
auto[116:119] auto[0] 96 1 T36 2 T38 1 T55 3
auto[116:119] auto[1] 275 1 T5 1 T9 1 T15 1
auto[120:123] auto[0] 76 1 T5 1 T30 1 T36 2
auto[120:123] auto[1] 270 1 T15 1 T29 4 T30 1
auto[124:127] auto[0] 59 1 T9 1 T36 2 T110 1
auto[124:127] auto[1] 280 1 T13 4 T15 2 T29 2
auto[128:131] auto[0] 70 1 T5 1 T36 1 T38 1
auto[128:131] auto[1] 270 1 T5 2 T15 1 T36 1
auto[132:135] auto[0] 74 1 T57 3 T193 2 T180 4
auto[132:135] auto[1] 265 1 T5 1 T9 2 T10 2
auto[136:139] auto[0] 69 1 T5 2 T38 1 T55 2
auto[136:139] auto[1] 244 1 T3 3 T9 4 T13 1
auto[140:143] auto[0] 84 1 T5 2 T9 1 T36 1
auto[140:143] auto[1] 245 1 T5 1 T10 2 T15 1
auto[144:147] auto[0] 69 1 T5 1 T9 1 T55 1
auto[144:147] auto[1] 254 1 T5 4 T13 3 T33 2
auto[148:151] auto[0] 91 1 T52 2 T57 2 T17 1
auto[148:151] auto[1] 236 1 T5 1 T10 2 T15 2
auto[152:155] auto[0] 87 1 T5 1 T30 1 T57 1
auto[152:155] auto[1] 279 1 T3 1 T10 1 T30 1
auto[156:159] auto[0] 457 1 T5 6 T9 1 T12 2
auto[156:159] auto[1] 1504 1 T3 7 T5 4 T9 4
auto[160:163] auto[0] 52 1 T5 2 T36 2 T197 1
auto[160:163] auto[1] 268 1 T13 1 T29 1 T36 1
auto[164:167] auto[0] 77 1 T9 5 T33 1 T36 3
auto[164:167] auto[1] 224 1 T3 1 T5 2 T15 4
auto[168:171] auto[0] 102 1 T36 1 T55 2 T56 2
auto[168:171] auto[1] 250 1 T3 1 T5 1 T15 3
auto[172:175] auto[0] 69 1 T55 1 T56 2 T57 3
auto[172:175] auto[1] 253 1 T3 1 T5 3 T10 2
auto[176:179] auto[0] 68 1 T201 1 T99 3 T19 1
auto[176:179] auto[1] 227 1 T3 3 T5 1 T13 2
auto[180:183] auto[0] 439 1 T5 4 T9 4 T14 3
auto[180:183] auto[1] 1415 1 T3 5 T5 1 T9 3
auto[184:187] auto[0] 432 1 T4 1 T9 1 T11 2
auto[184:187] auto[1] 870 1 T3 6 T4 1 T5 10
auto[188:191] auto[0] 72 1 T36 1 T38 2 T57 1
auto[188:191] auto[1] 243 1 T10 2 T15 4 T29 5
auto[192:195] auto[0] 75 1 T9 3 T55 1 T57 1
auto[192:195] auto[1] 254 1 T5 2 T9 1 T15 3
auto[196:199] auto[0] 80 1 T5 1 T9 2 T55 4
auto[196:199] auto[1] 253 1 T5 1 T10 1 T15 2
auto[200:203] auto[0] 94 1 T5 4 T36 1 T99 1
auto[200:203] auto[1] 245 1 T3 3 T5 1 T10 1
auto[204:207] auto[0] 63 1 T5 1 T9 1 T36 3
auto[204:207] auto[1] 310 1 T3 1 T13 2 T15 4
auto[208:211] auto[0] 68 1 T36 2 T55 1 T56 5
auto[208:211] auto[1] 256 1 T3 2 T10 1 T13 3
auto[212:215] auto[0] 76 1 T36 1 T55 1 T56 1
auto[212:215] auto[1] 274 1 T9 5 T13 1 T15 1
auto[216:219] auto[0] 71 1 T36 6 T57 5 T99 1
auto[216:219] auto[1] 239 1 T10 2 T33 2 T15 3
auto[220:223] auto[0] 73 1 T5 1 T36 1 T55 2
auto[220:223] auto[1] 294 1 T3 1 T5 1 T9 2
auto[224:227] auto[0] 84 1 T5 3 T36 1 T52 1
auto[224:227] auto[1] 252 1 T3 3 T5 2 T9 1
auto[228:231] auto[0] 77 1 T5 2 T33 1 T38 3
auto[228:231] auto[1] 270 1 T15 1 T44 3 T46 2
auto[232:235] auto[0] 838 1 T5 7 T9 10 T11 1
auto[232:235] auto[1] 1962 1 T3 10 T5 4 T9 3
auto[236:239] auto[0] 73 1 T36 1 T55 3 T56 4
auto[236:239] auto[1] 268 1 T3 1 T10 2 T13 1
auto[240:243] auto[0] 74 1 T5 1 T9 1 T33 2
auto[240:243] auto[1] 272 1 T13 3 T33 1 T15 4
auto[244:247] auto[0] 65 1 T5 2 T36 1 T55 1
auto[244:247] auto[1] 273 1 T3 4 T5 1 T9 1
auto[248:251] auto[0] 62 1 T110 1 T56 2 T57 1
auto[248:251] auto[1] 293 1 T13 2 T15 4 T29 7
auto[252:255] auto[0] 75 1 T5 1 T55 1 T56 3
auto[252:255] auto[1] 209 1 T29 2 T36 1 T52 2

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%