Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14333

1

T4

11

T8

181

T9

7

auto[1]

39520

1

T1

2

T4

11

T5

120

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1297	1			T5	2		T8	9		T9	2
auto[4:7]	21164	1			T4	2		T5	18		T8	274
auto[8:11]	1189	1			T4	6		T5	2		T8	11
auto[12:15]	318	1			T5	1		T8	2		T13	3
auto[16:19]	307	1			T5	2		T8	2		T12	1
auto[20:23]	1645	1			T4	2		T5	5		T8	7
auto[24:27]	269	1			T5	1		T12	1		T33	1
auto[28:31]	315	1			T5	1		T8	1		T13	3
auto[32:35]	295	1			T5	1		T8	5		T12	1
auto[36:39]	304	1			T13	1		T33	1		T27	2
auto[40:43]	325	1			T5	2		T8	1		T12	2
auto[44:47]	283	1			T12	1		T13	1		T32	2
auto[48:51]	309	1			T13	1		T97	4		T33	3
auto[52:55]	1723	1			T4	2		T5	3		T8	5
auto[56:59]	1344	1			T5	2		T8	10		T11	2
auto[60:63]	299	1			T8	1		T13	1		T33	1
auto[64:67]	320	1			T8	1		T32	1		T48	2
auto[68:71]	249	1			T8	1		T12	1		T13	2
auto[72:75]	310	1			T13	2		T33	2		T53	1
auto[76:79]	280	1			T8	1		T12	1		T13	2
auto[80:83]	301	1			T8	3		T32	1		T33	3
auto[84:87]	331	1			T5	1		T8	2		T13	4
auto[88:91]	1675	1			T4	2		T5	3		T8	7
auto[92:95]	299	1			T5	2		T13	2		T64	1
auto[96:99]	302	1			T5	3		T12	2		T13	2
auto[100:103]	269	1			T5	1		T13	2		T32	1
auto[104:107]	1220	1			T4	2		T5	3		T8	12
auto[108:111]	333	1			T5	2		T12	2		T13	2
auto[112:115]	303	1			T8	1		T13	1		T32	4
auto[116:119]	261	1			T5	1		T8	2		T12	2
auto[120:123]	318	1			T8	2		T13	3		T64	1
auto[124:127]	329	1			T5	1		T33	4		T64	1
auto[128:131]	312	1			T5	3		T12	1		T13	3
auto[132:135]	322	1			T8	2		T13	3		T33	1
auto[136:139]	282	1			T8	4		T64	2		T15	7
auto[140:143]	277	1			T8	1		T13	2		T33	2
auto[144:147]	278	1			T5	1		T8	1		T12	1
auto[148:151]	317	1			T5	1		T12	1		T32	3
auto[152:155]	290	1			T5	4		T12	5		T32	1
auto[156:159]	1702	1			T5	2		T8	9		T12	8
auto[160:163]	317	1			T5	4		T12	2		T33	1
auto[164:167]	337	1			T5	4		T8	3		T13	3
auto[168:171]	286	1			T5	2		T8	3		T12	3
auto[172:175]	285	1			T5	2		T8	1		T13	1
auto[176:179]	293	1			T64	1		T48	3		T15	4
auto[180:183]	1572	1			T5	11		T8	13		T12	5
auto[184:187]	1194	1			T5	2		T8	8		T12	7
auto[188:191]	319	1			T5	1		T8	2		T12	1
auto[192:195]	267	1			T8	3		T12	3		T13	1
auto[196:199]	278	1			T13	1		T32	2		T33	3
auto[200:203]	276	1			T13	2		T33	2		T64	1
auto[204:207]	282	1			T8	4		T12	4		T32	1
auto[208:211]	314	1			T5	3		T8	1		T32	2
auto[212:215]	294	1			T8	2		T13	3		T32	1
auto[216:219]	250	1			T8	2		T13	1		T33	3
auto[220:223]	313	1			T4	2		T5	2		T8	1
auto[224:227]	272	1			T5	2		T13	1		T32	1
auto[228:231]	313	1			T5	1		T8	3		T9	4
auto[232:235]	2634	1			T1	2		T5	8		T8	11
auto[236:239]	288	1			T8	1		T13	5		T33	3
auto[240:243]	318	1			T5	4		T8	1		T9	2
auto[244:247]	307	1			T5	2		T33	4		T53	2
auto[248:251]	282	1			T4	2		T5	1		T8	2
auto[252:255]	296	1			T4	2		T5	3		T9	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	503	1			T8	4		T9	1		T11	1
auto[0:3]	auto[1]	794	1			T5	2		T8	5		T9	1
auto[4:7]	auto[0]	4706	1			T4	1		T8	102		T12	14
auto[4:7]	auto[1]	16458	1			T4	1		T5	18		T8	172
auto[8:11]	auto[0]	468	1			T4	3		T8	10		T12	3
auto[8:11]	auto[1]	721	1			T4	3		T5	2		T8	1
auto[12:15]	auto[0]	88	1			T8	1		T13	1		T33	1
auto[12:15]	auto[1]	230	1			T5	1		T8	1		T13	2
auto[16:19]	auto[0]	79	1			T8	1		T13	1		T33	2
auto[16:19]	auto[1]	228	1			T5	2		T8	1		T12	1
auto[20:23]	auto[0]	436	1			T4	1		T8	4		T12	3
auto[20:23]	auto[1]	1209	1			T4	1		T5	5		T8	3
auto[24:27]	auto[0]	71	1			T12	1		T85	2		T226	2
auto[24:27]	auto[1]	198	1			T5	1		T33	1		T48	2
auto[28:31]	auto[0]	88	1			T8	1		T13	3		T64	1
auto[28:31]	auto[1]	227	1			T5	1		T64	2		T48	1
auto[32:35]	auto[0]	60	1			T8	2		T13	1		T48	1
auto[32:35]	auto[1]	235	1			T5	1		T8	3		T12	1
auto[36:39]	auto[0]	63	1			T33	1		T202	1		T20	1
auto[36:39]	auto[1]	241	1			T13	1		T27	2		T181	2
auto[40:43]	auto[0]	103	1			T8	1		T12	2		T48	3
auto[40:43]	auto[1]	222	1			T5	2		T48	3		T15	6
auto[44:47]	auto[0]	79	1			T12	1		T13	1		T97	3
auto[44:47]	auto[1]	204	1			T32	2		T97	3		T15	4
auto[48:51]	auto[0]	79	1			T97	2		T33	1		T64	1
auto[48:51]	auto[1]	230	1			T13	1		T97	2		T33	2
auto[52:55]	auto[0]	491	1			T4	1		T8	4		T12	1
auto[52:55]	auto[1]	1232	1			T4	1		T5	3		T8	1
auto[56:59]	auto[0]	498	1			T8	4		T11	1		T12	2
auto[56:59]	auto[1]	846	1			T5	2		T8	6		T11	1
auto[60:63]	auto[0]	83	1			T8	1		T13	1		T33	1
auto[60:63]	auto[1]	216	1			T26	2		T181	2		T182	1
auto[64:67]	auto[0]	96	1			T48	2		T15	2		T23	3
auto[64:67]	auto[1]	224	1			T8	1		T32	1		T23	3
auto[68:71]	auto[0]	69	1			T8	1		T12	1		T48	1
auto[68:71]	auto[1]	180	1			T13	2		T32	1		T48	1
auto[72:75]	auto[0]	95	1			T33	2		T53	1		T202	1
auto[72:75]	auto[1]	215	1			T13	2		T15	2		T181	1
auto[76:79]	auto[0]	71	1			T13	1		T62	1		T15	2
auto[76:79]	auto[1]	209	1			T8	1		T12	1		T13	1
auto[80:83]	auto[0]	84	1			T8	2		T33	3		T177	2
auto[80:83]	auto[1]	217	1			T8	1		T32	1		T15	1
auto[84:87]	auto[0]	127	1			T8	1		T13	4		T33	1
auto[84:87]	auto[1]	204	1			T5	1		T8	1		T33	3
auto[88:91]	auto[0]	447	1			T4	1		T8	7		T9	1
auto[88:91]	auto[1]	1228	1			T4	1		T5	3		T9	1
auto[92:95]	auto[0]	80	1			T13	1		T64	1		T48	1
auto[92:95]	auto[1]	219	1			T5	2		T13	1		T15	1
auto[96:99]	auto[0]	80	1			T12	2		T13	2		T64	2
auto[96:99]	auto[1]	222	1			T5	3		T48	1		T15	3
auto[100:103]	auto[0]	57	1			T13	2		T48	3		T85	1
auto[100:103]	auto[1]	212	1			T5	1		T32	1		T66	8
auto[104:107]	auto[0]	489	1			T4	1		T8	3		T12	5
auto[104:107]	auto[1]	731	1			T4	1		T5	3		T8	9
auto[108:111]	auto[0]	87	1			T12	1		T15	1		T260	1
auto[108:111]	auto[1]	246	1			T5	2		T12	1		T13	2
auto[112:115]	auto[0]	71	1			T13	1		T47	2		T180	3
auto[112:115]	auto[1]	232	1			T8	1		T32	4		T47	2
auto[116:119]	auto[0]	63	1			T12	1		T48	2		T24	2
auto[116:119]	auto[1]	198	1			T5	1		T8	2		T12	1
auto[120:123]	auto[0]	81	1			T8	2		T13	3		T48	1
auto[120:123]	auto[1]	237	1			T64	1		T27	2		T38	4
auto[124:127]	auto[0]	89	1			T33	1		T24	1		T85	1
auto[124:127]	auto[1]	240	1			T5	1		T33	3		T64	1
auto[128:131]	auto[0]	82	1			T12	1		T13	1		T33	1
auto[128:131]	auto[1]	230	1			T5	3		T13	2		T32	1
auto[132:135]	auto[0]	79	1			T13	3		T33	1		T40	1
auto[132:135]	auto[1]	243	1			T8	2		T26	1		T27	3
auto[136:139]	auto[0]	75	1			T8	2		T15	2		T22	1
auto[136:139]	auto[1]	207	1			T8	2		T64	2		T15	5
auto[140:143]	auto[0]	58	1			T13	1		T33	1		T64	3
auto[140:143]	auto[1]	219	1			T8	1		T13	1		T33	1
auto[144:147]	auto[0]	69	1			T8	1		T15	1		T179	2
auto[144:147]	auto[1]	209	1			T5	1		T12	1		T13	1
auto[148:151]	auto[0]	77	1			T12	1		T15	2		T85	1
auto[148:151]	auto[1]	240	1			T5	1		T32	3		T33	1
auto[152:155]	auto[0]	70	1			T33	1		T85	1		T202	2
auto[152:155]	auto[1]	220	1			T5	4		T12	5		T32	1
auto[156:159]	auto[0]	462	1			T8	1		T13	2		T33	1
auto[156:159]	auto[1]	1240	1			T5	2		T8	8		T12	8
auto[160:163]	auto[0]	88	1			T202	1		T179	4		T177	2
auto[160:163]	auto[1]	229	1			T5	4		T12	2		T33	1
auto[164:167]	auto[0]	98	1			T8	3		T13	1		T64	2
auto[164:167]	auto[1]	239	1			T5	4		T13	2		T38	1
auto[168:171]	auto[0]	79	1			T8	1		T12	3		T48	2
auto[168:171]	auto[1]	207	1			T5	2		T8	2		T15	1
auto[172:175]	auto[0]	83	1			T13	1		T33	1		T48	1
auto[172:175]	auto[1]	202	1			T5	2		T8	1		T33	1
auto[176:179]	auto[0]	90	1			T48	1		T38	1		T249	4
auto[176:179]	auto[1]	203	1			T64	1		T48	2		T15	4
auto[180:183]	auto[0]	414	1			T8	7		T12	2		T13	1
auto[180:183]	auto[1]	1158	1			T5	11		T8	6		T12	3
auto[184:187]	auto[0]	437	1			T8	2		T12	6		T33	1
auto[184:187]	auto[1]	757	1			T5	2		T8	6		T12	1
auto[188:191]	auto[0]	83	1			T8	1		T15	3		T202	2
auto[188:191]	auto[1]	236	1			T5	1		T8	1		T12	1
auto[192:195]	auto[0]	66	1			T8	1		T12	3		T62	1
auto[192:195]	auto[1]	201	1			T8	2		T13	1		T64	1
auto[196:199]	auto[0]	80	1			T33	1		T64	1		T15	3
auto[196:199]	auto[1]	198	1			T13	1		T32	2		T33	2
auto[200:203]	auto[0]	83	1			T13	2		T33	1		T15	2
auto[200:203]	auto[1]	193	1			T33	1		T64	1		T48	3
auto[204:207]	auto[0]	65	1			T12	3		T234	6		T239	2
auto[204:207]	auto[1]	217	1			T8	4		T12	1		T32	1
auto[208:211]	auto[0]	76	1			T33	2		T202	1		T179	1
auto[208:211]	auto[1]	238	1			T5	3		T8	1		T32	2
auto[212:215]	auto[0]	69	1			T8	2		T13	1		T33	1
auto[212:215]	auto[1]	225	1			T13	2		T32	1		T33	5
auto[216:219]	auto[0]	73	1			T33	1		T15	1		T26	2
auto[216:219]	auto[1]	177	1			T8	2		T13	1		T33	2
auto[220:223]	auto[0]	85	1			T4	1		T8	1		T13	2
auto[220:223]	auto[1]	228	1			T4	1		T5	2		T33	1
auto[224:227]	auto[0]	55	1			T53	1		T15	1		T51	1
auto[224:227]	auto[1]	217	1			T5	2		T13	1		T32	1
auto[228:231]	auto[0]	63	1			T9	2		T47	1		T74	1
auto[228:231]	auto[1]	250	1			T5	1		T8	3		T9	2
auto[232:235]	auto[0]	872	1			T8	5		T9	1		T12	9
auto[232:235]	auto[1]	1762	1			T1	2		T5	8		T8	6
auto[236:239]	auto[0]	75	1			T8	1		T13	4		T33	3
auto[236:239]	auto[1]	213	1			T13	1		T15	2		T40	2
auto[240:243]	auto[0]	86	1			T9	1		T33	1		T15	2
auto[240:243]	auto[1]	232	1			T5	4		T8	1		T9	1
auto[244:247]	auto[0]	86	1			T33	2		T20	4		T234	1
auto[244:247]	auto[1]	221	1			T5	2		T33	2		T53	2
auto[248:251]	auto[0]	84	1			T4	1		T8	2		T13	1
auto[248:251]	auto[1]	198	1			T4	1		T5	1		T15	3
auto[252:255]	auto[0]	90	1			T4	1		T9	1		T33	2
auto[252:255]	auto[1]	206	1			T4	1		T5	3		T9	1