Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3972	1			T2	28		T6	20		T11	20
values[1]	3553	1			T2	40		T3	20		T25	21
values[2]	3843	1			T2	60		T6	23		T11	116
values[3]	4035	1			T2	20		T3	113		T6	20
values[4]	3798	1			T2	136		T6	69		T11	20
values[5]	3485	1			T6	20		T13	20		T26	20
values[6]	3959	1			T2	78		T25	24		T14	94
values[7]	4076	1			T2	53		T6	23		T11	41

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3814	1			T2	20		T11	20		T26	92
values[1]	3705	1			T6	63		T11	73		T14	62
values[2]	3683	1			T11	20		T71	6		T26	50
values[3]	3642	1			T2	68		T6	23		T11	43
values[4]	4263	1			T2	234		T6	20		T11	41
values[5]	3185	1			T2	33		T25	71		T26	25
values[6]	4462	1			T2	60		T3	113		T6	29
values[7]	3967	1			T3	20		T6	40		T35	6

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

29939

1

T2

409

T3

131

T6

169

auto[1]

782

1

T2

6

T3

2

T6

6

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	456	1			T26	72		T179	20		T60	18
auto[0]	values[0]	values[1]	343	1			T187	31		T69	22		T173	20
auto[0]	values[0]	values[2]	531	1			T39	22		T187	20		T193	96
auto[0]	values[0]	values[3]	588	1			T2	28		T11	20		T100	4
auto[0]	values[0]	values[4]	444	1			T26	57		T14	20		T224	21
auto[0]	values[0]	values[5]	526	1			T184	26		T196	26		T212	21
auto[0]	values[0]	values[6]	456	1			T78	2		T211	20		T218	17
auto[0]	values[0]	values[7]	532	1			T6	20		T155	10		T211	20
auto[0]	values[1]	values[0]	282	1			T243	20		T210	37		T30	20
auto[0]	values[1]	values[1]	601	1			T187	40		T173	19		T210	93
auto[0]	values[1]	values[2]	520	1			T26	49		T194	22		T233	6
auto[0]	values[1]	values[3]	391	1			T69	20		T179	20		T173	20
auto[0]	values[1]	values[4]	598	1			T210	34		T189	20		T206	21
auto[0]	values[1]	values[5]	348	1			T25	20		T118	24		T193	20
auto[0]	values[1]	values[6]	360	1			T2	40		T14	45		T185	22
auto[0]	values[1]	values[7]	370	1			T3	20		T188	19		T265	2
auto[0]	values[2]	values[0]	679	1			T2	20		T11	20		T266	20
auto[0]	values[2]	values[1]	283	1			T11	69		T14	60		T224	20
auto[0]	values[2]	values[2]	475	1			T71	6		T38	6		T60	19
auto[0]	values[2]	values[3]	542	1			T2	20		T6	23		T11	22
auto[0]	values[2]	values[4]	391	1			T40	16		T187	20		T173	18
auto[0]	values[2]	values[5]	304	1			T25	47		T26	25		T179	19
auto[0]	values[2]	values[6]	515	1			T2	20		T246	12		T181	58
auto[0]	values[2]	values[7]	557	1			T35	6		T70	4		T26	72
auto[0]	values[3]	values[0]	530	1			T193	71		T194	41		T20	23
auto[0]	values[3]	values[1]	473	1			T172	20		T224	34		T194	37
auto[0]	values[3]	values[2]	236	1			T224	25		T267	10		T189	17
auto[0]	values[3]	values[3]	461	1			T2	20		T37	19		T173	17
auto[0]	values[3]	values[4]	622	1			T6	18		T160	28		T172	20
auto[0]	values[3]	values[5]	503	1			T187	22		T193	85		T241	16
auto[0]	values[3]	values[6]	702	1			T3	111		T193	151		T172	20
auto[0]	values[3]	values[7]	410	1			T40	20		T173	20		T60	16
auto[0]	values[4]	values[0]	353	1			T73	4		T40	19		T172	20
auto[0]	values[4]	values[1]	468	1			T6	37		T40	37		T160	20
auto[0]	values[4]	values[2]	469	1			T194	22		T180	20		T60	18
auto[0]	values[4]	values[3]	326	1			T211	20		T268	6		T242	20
auto[0]	values[4]	values[4]	614	1			T2	133		T11	20		T30	23
auto[0]	values[4]	values[5]	270	1			T216	6		T193	26		T194	32
auto[0]	values[4]	values[6]	646	1			T6	29		T74	14		T40	20
auto[0]	values[4]	values[7]	531	1			T172	20		T179	17		T184	24
auto[0]	values[5]	values[0]	404	1			T26	20		T60	35		T269	4
auto[0]	values[5]	values[1]	466	1			T187	20		T172	20		T181	40
auto[0]	values[5]	values[2]	644	1			T14	44		T40	20		T160	24
auto[0]	values[5]	values[3]	332	1			T184	43		T264	14		T31	25
auto[0]	values[5]	values[4]	507	1			T187	31		T188	76		T195	20
auto[0]	values[5]	values[5]	279	1			T188	29		T222	24		T198	16
auto[0]	values[5]	values[6]	278	1			T13	19		T40	19		T270	18
auto[0]	values[5]	values[7]	466	1			T6	19		T271	69		T272	24
auto[0]	values[6]	values[0]	501	1			T40	18		T172	20		T173	20
auto[0]	values[6]	values[1]	426	1			T273	4		T179	19		T181	18
auto[0]	values[6]	values[2]	411	1			T244	12		T196	94		T177	56
auto[0]	values[6]	values[3]	518	1			T25	21		T187	20		T210	47
auto[0]	values[6]	values[4]	391	1			T2	77		T40	19		T69	20
auto[0]	values[6]	values[5]	485	1			T195	27		T240	21		T274	24
auto[0]	values[6]	values[6]	740	1			T172	19		T275	18		T276	6
auto[0]	values[6]	values[7]	412	1			T14	92		T277	4		T30	28
auto[0]	values[7]	values[0]	502	1			T188	31		T69	18		T181	21
auto[0]	values[7]	values[1]	550	1			T6	23		T72	10		T221	2
auto[0]	values[7]	values[2]	300	1			T11	17		T215	18		T179	20
auto[0]	values[7]	values[3]	384	1			T40	20		T120	14		T172	19
auto[0]	values[7]	values[4]	596	1			T2	20		T11	19		T223	8
auto[0]	values[7]	values[5]	381	1			T2	31		T195	25		T210	17
auto[0]	values[7]	values[6]	663	1			T26	52		T278	26		T184	18
auto[0]	values[7]	values[7]	597	1			T14	61		T179	19		T189	93
auto[1]	values[0]	values[0]	12	1			T60	2		T279	2		T234	4
auto[1]	values[0]	values[1]	12	1			T187	2		T69	3		T280	5
auto[1]	values[0]	values[2]	12	1			T39	4		T193	3		T196	2
auto[1]	values[0]	values[3]	11	1			T194	2		T181	2		T196	1
auto[1]	values[0]	values[4]	11	1			T20	2		T211	1		T124	1
auto[1]	values[0]	values[5]	19	1			T184	1		T196	2		T212	1
auto[1]	values[0]	values[6]	13	1			T218	3		T230	2		T281	4
auto[1]	values[0]	values[7]	6	1			T206	2		T262	1		T183	2
auto[1]	values[1]	values[0]	14	1			T210	1		T234	1		T260	7
auto[1]	values[1]	values[1]	16	1			T173	1		T210	3		T205	2
auto[1]	values[1]	values[2]	10	1			T26	1		T123	3		T147	1
auto[1]	values[1]	values[3]	9	1			T181	1		T60	1		T123	5
auto[1]	values[1]	values[4]	7	1			T251	3		T192	1		T282	2
auto[1]	values[1]	values[5]	13	1			T25	1		T172	2		T242	1
auto[1]	values[1]	values[6]	5	1			T14	1		T283	2		T284	2
auto[1]	values[1]	values[7]	9	1			T188	1		T230	2		T262	2
auto[1]	values[2]	values[0]	6	1			T174	3		T177	1		T123	1
auto[1]	values[2]	values[1]	12	1			T11	4		T14	2		T211	2
auto[1]	values[2]	values[2]	12	1			T38	2		T60	1		T206	1
auto[1]	values[2]	values[3]	22	1			T11	1		T14	4		T172	1
auto[1]	values[2]	values[4]	18	1			T40	4		T173	2		T210	1
auto[1]	values[2]	values[5]	10	1			T25	3		T179	1		T261	2
auto[1]	values[2]	values[6]	7	1			T259	1		T285	1		T126	1
auto[1]	values[2]	values[7]	10	1			T26	1		T60	1		T249	1
auto[1]	values[3]	values[0]	13	1			T194	2		T230	1		T286	2
auto[1]	values[3]	values[1]	5	1			T224	1		T123	1		T191	1
auto[1]	values[3]	values[2]	12	1			T267	2		T189	3		T287	2
auto[1]	values[3]	values[3]	9	1			T37	2		T173	3		T189	1
auto[1]	values[3]	values[4]	15	1			T6	2		T160	4		T202	2
auto[1]	values[3]	values[5]	11	1			T193	1		T194	1		T189	3
auto[1]	values[3]	values[6]	19	1			T3	2		T193	2		T76	2
auto[1]	values[3]	values[7]	14	1			T60	4		T30	4		T288	1
auto[1]	values[4]	values[0]	15	1			T40	1		T31	2		T234	2
auto[1]	values[4]	values[1]	17	1			T6	3		T40	3		T195	1
auto[1]	values[4]	values[2]	14	1			T194	1		T60	2		T251	2
auto[1]	values[4]	values[3]	11	1			T234	5		T289	3		T259	1
auto[1]	values[4]	values[4]	17	1			T2	3		T30	1		T177	3
auto[1]	values[4]	values[5]	2	1			T76	2		-	-		-	-
auto[1]	values[4]	values[6]	20	1			T187	2		T172	2		T181	2
auto[1]	values[4]	values[7]	25	1			T179	3		T184	1		T173	3
auto[1]	values[5]	values[0]	19	1			T60	5		T191	2		T147	1
auto[1]	values[5]	values[1]	12	1			T187	2		T189	1		T20	2
auto[1]	values[5]	values[2]	25	1			T160	1		T20	2		T211	1
auto[1]	values[5]	values[3]	13	1			T184	2		T31	1		T22	3
auto[1]	values[5]	values[4]	13	1			T187	1		T188	1		T20	2
auto[1]	values[5]	values[5]	12	1			T253	2		T290	1		T220	2
auto[1]	values[5]	values[6]	7	1			T13	1		T40	1		T289	1
auto[1]	values[5]	values[7]	8	1			T6	1		T291	1		T123	1
auto[1]	values[6]	values[0]	12	1			T40	2		T210	1		T230	1
auto[1]	values[6]	values[1]	7	1			T179	1		T181	2		T211	2
auto[1]	values[6]	values[2]	6	1			T292	1		T293	1		T294	1
auto[1]	values[6]	values[3]	15	1			T25	3		T206	2		T227	1
auto[1]	values[6]	values[4]	5	1			T2	1		T40	1		T282	3
auto[1]	values[6]	values[5]	11	1			T218	1		T295	1		T296	2
auto[1]	values[6]	values[6]	12	1			T172	1		T275	2		T174	2
auto[1]	values[6]	values[7]	7	1			T14	2		T147	4		T297	1
auto[1]	values[7]	values[0]	16	1			T188	2		T69	2		T298	2
auto[1]	values[7]	values[1]	14	1			T19	1		T275	1		T174	2
auto[1]	values[7]	values[2]	6	1			T11	3		T242	1		T289	2
auto[1]	values[7]	values[3]	10	1			T172	1		T60	2		T293	2
auto[1]	values[7]	values[4]	14	1			T11	2		T173	2		T121	1
auto[1]	values[7]	values[5]	11	1			T2	2		T210	3		T123	1
auto[1]	values[7]	values[6]	19	1			T26	2		T184	2		T211	2
auto[1]	values[7]	values[7]	13	1			T179	1		T189	2		T30	5