Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

12827

1

T2

2

T3

24

T4

2

auto[1]

48639

1

T1

120

T2

2

T3

285

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1282	1			T1	1		T3	4		T4	2
auto[4:7]	25167	1			T1	18		T3	96		T7	101
auto[8:11]	1357	1			T1	2		T3	9		T7	7
auto[12:15]	298	1			T1	1		T3	1		T7	1
auto[16:19]	363	1			T3	1		T7	1		T33	1
auto[20:23]	1827	1			T1	7		T3	16		T7	1
auto[24:27]	332	1			T3	2		T33	2		T40	1
auto[28:31]	349	1			T1	1		T3	3		T7	1
auto[32:35]	304	1			T40	3		T38	1		T18	4
auto[36:39]	335	1			T3	3		T33	1		T40	2
auto[40:43]	318	1			T3	2		T7	3		T33	1
auto[44:47]	312	1			T1	1		T3	4		T7	4
auto[48:51]	337	1			T1	3		T40	2		T38	2
auto[52:55]	1938	1			T1	8		T3	5		T7	4
auto[56:59]	1323	1			T1	1		T3	1		T7	9
auto[60:63]	326	1			T1	3		T3	4		T7	2
auto[64:67]	354	1			T1	4		T3	4		T7	5
auto[68:71]	330	1			T3	1		T7	2		T40	1
auto[72:75]	340	1			T1	1		T3	1		T7	1
auto[76:79]	329	1			T1	1		T3	2		T33	6
auto[80:83]	374	1			T1	1		T33	1		T40	3
auto[84:87]	362	1			T1	1		T3	5		T7	5
auto[88:91]	1820	1			T1	4		T2	2		T3	11
auto[92:95]	328	1			T1	5		T11	2		T33	2
auto[96:99]	355	1			T3	3		T7	1		T16	4
auto[100:103]	328	1			T1	1		T39	2		T40	1
auto[104:107]	1269	1			T1	2		T3	6		T7	6
auto[108:111]	338	1			T1	1		T3	4		T7	1
auto[112:115]	357	1			T7	2		T33	1		T40	3
auto[116:119]	367	1			T1	3		T3	5		T7	1
auto[120:123]	354	1			T3	1		T7	3		T33	3
auto[124:127]	369	1			T3	3		T7	1		T33	1
auto[128:131]	371	1			T3	4		T40	3		T38	2
auto[132:135]	350	1			T1	2		T3	1		T40	2
auto[136:139]	340	1			T1	2		T3	1		T7	1
auto[140:143]	326	1			T40	3		T38	4		T18	2
auto[144:147]	354	1			T3	1		T7	1		T13	2
auto[148:151]	332	1			T1	2		T3	1		T7	1
auto[152:155]	317	1			T1	1		T3	5		T40	1
auto[156:159]	1928	1			T1	4		T2	2		T3	9
auto[160:163]	339	1			T1	2		T3	3		T7	3
auto[164:167]	356	1			T1	1		T3	6		T7	1
auto[168:171]	337	1			T3	5		T33	2		T40	6
auto[172:175]	353	1			T3	1		T33	3		T40	6
auto[176:179]	328	1			T1	3		T3	5		T7	1
auto[180:183]	1856	1			T1	5		T3	11		T7	5
auto[184:187]	1307	1			T1	1		T3	5		T7	4
auto[188:191]	323	1			T1	1		T3	1		T11	2
auto[192:195]	314	1			T3	5		T7	1		T33	3
auto[196:199]	314	1			T3	3		T48	3		T34	1
auto[200:203]	333	1			T33	2		T40	5		T38	3
auto[204:207]	305	1			T33	3		T40	1		T48	1
auto[208:211]	362	1			T1	1		T3	4		T38	7
auto[212:215]	323	1			T1	2		T3	2		T7	3
auto[216:219]	389	1			T1	2		T3	3		T33	3
auto[220:223]	345	1			T1	2		T3	5		T7	1
auto[224:227]	320	1			T7	1		T33	1		T40	5
auto[228:231]	361	1			T1	1		T3	3		T7	1
auto[232:235]	2784	1			T1	6		T3	14		T7	5
auto[236:239]	290	1			T1	1		T3	7		T38	1
auto[240:243]	321	1			T1	1		T33	2		T38	2
auto[244:247]	341	1			T1	5		T7	1		T11	2
auto[248:251]	362	1			T1	2		T3	6		T7	1
auto[252:255]	343	1			T1	3		T3	1		T33	4

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	432	1			T3	3		T4	1		T7	1
auto[0:3]	auto[1]	850	1			T1	1		T3	1		T4	1
auto[4:7]	auto[0]	4070	1			T3	1		T7	65		T11	1
auto[4:7]	auto[1]	21097	1			T1	18		T3	95		T7	36
auto[8:11]	auto[0]	454	1			T7	6		T13	2		T39	2
auto[8:11]	auto[1]	903	1			T1	2		T3	9		T7	1
auto[12:15]	auto[0]	60	1			T7	1		T35	1		T230	1
auto[12:15]	auto[1]	238	1			T1	1		T3	1		T40	2
auto[16:19]	auto[0]	66	1			T18	1		T43	2		T19	2
auto[16:19]	auto[1]	297	1			T3	1		T7	1		T33	1
auto[20:23]	auto[0]	386	1			T3	1		T7	1		T13	2
auto[20:23]	auto[1]	1441	1			T1	7		T3	15		T13	2
auto[24:27]	auto[0]	77	1			T33	2		T34	1		T43	2
auto[24:27]	auto[1]	255	1			T3	2		T40	1		T38	3
auto[28:31]	auto[0]	68	1			T7	1		T40	3		T18	3
auto[28:31]	auto[1]	281	1			T1	1		T3	3		T40	1
auto[32:35]	auto[0]	59	1			T18	3		T34	1		T171	3
auto[32:35]	auto[1]	245	1			T40	3		T38	1		T18	1
auto[36:39]	auto[0]	84	1			T33	1		T18	1		T34	1
auto[36:39]	auto[1]	251	1			T3	3		T40	2		T38	2
auto[40:43]	auto[0]	69	1			T7	3		T40	3		T34	3
auto[40:43]	auto[1]	249	1			T3	2		T33	1		T38	5
auto[44:47]	auto[0]	80	1			T7	1		T33	3		T40	2
auto[44:47]	auto[1]	232	1			T1	1		T3	4		T7	3
auto[48:51]	auto[0]	75	1			T40	1		T18	2		T34	4
auto[48:51]	auto[1]	262	1			T1	3		T40	1		T38	2
auto[52:55]	auto[0]	460	1			T3	2		T7	2		T39	3
auto[52:55]	auto[1]	1478	1			T1	8		T3	3		T7	2
auto[56:59]	auto[0]	442	1			T7	4		T13	1		T39	2
auto[56:59]	auto[1]	881	1			T1	1		T3	1		T7	5
auto[60:63]	auto[0]	61	1			T3	2		T7	2		T40	2
auto[60:63]	auto[1]	265	1			T1	3		T3	2		T40	3
auto[64:67]	auto[0]	63	1			T7	3		T43	3		T213	1
auto[64:67]	auto[1]	291	1			T1	4		T3	4		T7	2
auto[68:71]	auto[0]	62	1			T40	1		T69	2		T35	1
auto[68:71]	auto[1]	268	1			T3	1		T7	2		T69	2
auto[72:75]	auto[0]	75	1			T33	4		T40	1		T18	1
auto[72:75]	auto[1]	265	1			T1	1		T3	1		T7	1
auto[76:79]	auto[0]	70	1			T33	3		T43	1		T35	1
auto[76:79]	auto[1]	259	1			T1	1		T3	2		T33	3
auto[80:83]	auto[0]	77	1			T34	2		T35	6		T154	1
auto[80:83]	auto[1]	297	1			T1	1		T33	1		T40	3
auto[84:87]	auto[0]	83	1			T40	1		T69	1		T42	2
auto[84:87]	auto[1]	279	1			T1	1		T3	5		T7	5
auto[88:91]	auto[0]	406	1			T2	1		T4	1		T7	2
auto[88:91]	auto[1]	1414	1			T1	4		T2	1		T3	11
auto[92:95]	auto[0]	69	1			T11	1		T33	2		T34	2
auto[92:95]	auto[1]	259	1			T1	5		T11	1		T40	2
auto[96:99]	auto[0]	79	1			T3	3		T7	1		T16	2
auto[96:99]	auto[1]	276	1			T16	2		T40	1		T38	6
auto[100:103]	auto[0]	72	1			T39	1		T40	1		T69	1
auto[100:103]	auto[1]	256	1			T1	1		T39	1		T69	1
auto[104:107]	auto[0]	424	1			T7	6		T16	1		T33	9
auto[104:107]	auto[1]	845	1			T1	2		T3	6		T16	1
auto[108:111]	auto[0]	78	1			T39	1		T42	3		T34	2
auto[108:111]	auto[1]	260	1			T1	1		T3	4		T7	1
auto[112:115]	auto[0]	63	1			T7	2		T33	1		T18	2
auto[112:115]	auto[1]	294	1			T40	3		T38	1		T48	5
auto[116:119]	auto[0]	79	1			T7	1		T40	1		T42	1
auto[116:119]	auto[1]	288	1			T1	3		T3	5		T33	1
auto[120:123]	auto[0]	77	1			T3	1		T7	1		T33	1
auto[120:123]	auto[1]	277	1			T7	2		T33	2		T38	3
auto[124:127]	auto[0]	84	1			T7	1		T40	1		T34	5
auto[124:127]	auto[1]	285	1			T3	3		T33	1		T40	2
auto[128:131]	auto[0]	83	1			T40	3		T18	1		T34	1
auto[128:131]	auto[1]	288	1			T3	4		T38	2		T48	2
auto[132:135]	auto[0]	88	1			T40	1		T69	1		T18	2
auto[132:135]	auto[1]	262	1			T1	2		T3	1		T40	1
auto[136:139]	auto[0]	78	1			T33	1		T34	1		T43	1
auto[136:139]	auto[1]	262	1			T1	2		T3	1		T7	1
auto[140:143]	auto[0]	68	1			T18	2		T248	1		T154	1
auto[140:143]	auto[1]	258	1			T40	3		T38	4		T48	2
auto[144:147]	auto[0]	73	1			T13	1		T19	1		T213	1
auto[144:147]	auto[1]	281	1			T3	1		T7	1		T13	1
auto[148:151]	auto[0]	73	1			T18	1		T19	3		T213	1
auto[148:151]	auto[1]	259	1			T1	2		T3	1		T7	1
auto[152:155]	auto[0]	66	1			T40	1		T34	2		T191	1
auto[152:155]	auto[1]	251	1			T1	1		T3	5		T38	1
auto[156:159]	auto[0]	393	1			T2	1		T3	1		T7	3
auto[156:159]	auto[1]	1535	1			T1	4		T2	1		T3	8
auto[160:163]	auto[0]	82	1			T3	1		T7	1		T39	1
auto[160:163]	auto[1]	257	1			T1	2		T3	2		T7	2
auto[164:167]	auto[0]	76	1			T33	3		T40	3		T35	2
auto[164:167]	auto[1]	280	1			T1	1		T3	6		T7	1
auto[168:171]	auto[0]	75	1			T33	1		T40	3		T42	2
auto[168:171]	auto[1]	262	1			T3	5		T33	1		T40	3
auto[172:175]	auto[0]	89	1			T33	1		T40	6		T34	2
auto[172:175]	auto[1]	264	1			T3	1		T33	2		T38	1
auto[176:179]	auto[0]	69	1			T3	1		T33	1		T40	3
auto[176:179]	auto[1]	259	1			T1	3		T3	4		T7	1
auto[180:183]	auto[0]	414	1			T3	2		T7	1		T33	6
auto[180:183]	auto[1]	1442	1			T1	5		T3	9		T7	4
auto[184:187]	auto[0]	438	1			T3	2		T7	3		T39	1
auto[184:187]	auto[1]	869	1			T1	1		T3	3		T7	1
auto[188:191]	auto[0]	76	1			T3	1		T11	1		T34	1
auto[188:191]	auto[1]	247	1			T1	1		T11	1		T40	3
auto[192:195]	auto[0]	53	1			T33	1		T40	1		T18	1
auto[192:195]	auto[1]	261	1			T3	5		T7	1		T33	2
auto[196:199]	auto[0]	77	1			T43	2		T191	3		T172	1
auto[196:199]	auto[1]	237	1			T3	3		T48	3		T34	1
auto[200:203]	auto[0]	87	1			T33	1		T40	3		T18	1
auto[200:203]	auto[1]	246	1			T33	1		T40	2		T38	3
auto[204:207]	auto[0]	59	1			T40	1		T34	1		T191	1
auto[204:207]	auto[1]	246	1			T33	3		T48	1		T42	1
auto[208:211]	auto[0]	76	1			T3	1		T19	2		T171	1
auto[208:211]	auto[1]	286	1			T1	1		T3	3		T38	7
auto[212:215]	auto[0]	74	1			T7	3		T13	1		T19	2
auto[212:215]	auto[1]	249	1			T1	2		T3	2		T13	1
auto[216:219]	auto[0]	67	1			T33	2		T40	3		T191	1
auto[216:219]	auto[1]	322	1			T1	2		T3	3		T33	1
auto[220:223]	auto[0]	71	1			T3	1		T7	1		T11	2
auto[220:223]	auto[1]	274	1			T1	2		T3	4		T11	2
auto[224:227]	auto[0]	72	1			T7	1		T40	2		T18	1
auto[224:227]	auto[1]	248	1			T33	1		T40	3		T38	4
auto[228:231]	auto[0]	80	1			T40	1		T18	1		T34	1
auto[228:231]	auto[1]	281	1			T1	1		T3	3		T7	1
auto[232:235]	auto[0]	701	1			T3	1		T7	4		T13	1
auto[232:235]	auto[1]	2083	1			T1	6		T3	13		T7	1
auto[236:239]	auto[0]	62	1			T18	2		T43	1		T191	1
auto[236:239]	auto[1]	228	1			T1	1		T3	7		T38	1
auto[240:243]	auto[0]	64	1			T18	2		T159	1		T241	2
auto[240:243]	auto[1]	257	1			T1	1		T33	2		T38	2
auto[244:247]	auto[0]	88	1			T7	1		T11	1		T33	1
auto[244:247]	auto[1]	253	1			T1	5		T11	1		T38	1
auto[248:251]	auto[0]	63	1			T11	1		T33	1		T67	1
auto[248:251]	auto[1]	299	1			T1	2		T3	6		T7	1
auto[252:255]	auto[0]	88	1			T33	3		T42	4		T34	1
auto[252:255]	auto[1]	255	1			T1	3		T3	1		T33	1