Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::spi_device_buffer_boundary_cg

Group : spi_device_env_pkg::spi_device_env_cov::spi_device_buffer_boundary_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
87.50	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

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Summary for Group spi_device_env_pkg::spi_device_env_cov::spi_device_buffer_boundary_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	8	1	7	87.50

Variables for Group spi_device_env_pkg::spi_device_env_cov::spi_device_buffer_boundary_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_flip_position	2	0	2	100.00	100	1	1	2
cp_opcode	6	1	5	83.33	100	1	1	0

Summary for Variable cp_flip_position

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_flip_position

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

75

1

T157

1

T159

3

T181

3

auto[1]

21

1

T157

1

T159

1

T181

1

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Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	1	5	83.33

User Defined Bins for cp_opcode

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
read_ops[0x6b]	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
read_ops[0x03]	18	1			T182	4		T183	2		T184	6
read_ops[0x0b]	16	1			T159	4		T181	4		T185	8
read_ops[0x3b]	22	1			T186	6		T187	2		T184	4
read_ops[0xbb]	24	1			T188	4		T189	2		T190	6
read_ops[0xeb]	16	1			T157	2		T191	2		T192	2