Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14727

1

T3

3

T5

42

T6

416

auto[1]

45518

1

T3

3

T5

4

T6

206

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1304	1			T6	8		T8	9		T9	2
auto[4:7]	23655	1			T3	6		T5	38		T6	403
auto[8:11]	1240	1			T6	8		T8	11		T9	10
auto[12:15]	356	1			T6	4		T8	5		T9	2
auto[16:19]	336	1			T8	6		T9	1		T11	1
auto[20:23]	1836	1			T6	6		T8	17		T9	5
auto[24:27]	300	1			T6	3		T8	1		T9	1
auto[28:31]	324	1			T8	2		T11	2		T27	1
auto[32:35]	366	1			T6	2		T8	5		T11	6
auto[36:39]	346	1			T6	2		T8	2		T9	2
auto[40:43]	343	1			T6	6		T8	1		T11	4
auto[44:47]	376	1			T8	5		T11	4		T27	1
auto[48:51]	374	1			T6	5		T8	2		T11	9
auto[52:55]	1854	1			T6	12		T8	15		T9	5
auto[56:59]	1344	1			T6	8		T8	14		T9	10
auto[60:63]	304	1			T6	2		T8	3		T9	1
auto[64:67]	305	1			T8	3		T11	9		T27	1
auto[68:71]	342	1			T8	3		T9	1		T11	7
auto[72:75]	323	1			T6	1		T8	2		T11	1
auto[76:79]	385	1			T6	1		T8	2		T11	6
auto[80:83]	324	1			T5	2		T6	8		T8	5
auto[84:87]	360	1			T6	2		T8	3		T11	4
auto[88:91]	1905	1			T6	7		T8	23		T9	6
auto[92:95]	350	1			T8	7		T11	5		T27	2
auto[96:99]	284	1			T6	7		T8	2		T9	3
auto[100:103]	330	1			T6	1		T8	2		T9	3
auto[104:107]	1346	1			T5	2		T6	12		T8	7
auto[108:111]	313	1			T8	2		T11	4		T27	4
auto[112:115]	358	1			T8	3		T11	5		T35	3
auto[116:119]	358	1			T6	3		T8	1		T11	4
auto[120:123]	319	1			T6	1		T8	7		T9	1
auto[124:127]	330	1			T6	3		T8	6		T11	3
auto[128:131]	349	1			T6	1		T8	3		T11	8
auto[132:135]	337	1			T8	4		T9	1		T11	3
auto[136:139]	346	1			T6	1		T9	3		T11	4
auto[140:143]	384	1			T6	1		T8	7		T9	1
auto[144:147]	351	1			T8	4		T9	1		T11	4
auto[148:151]	311	1			T6	1		T8	2		T11	3
auto[152:155]	356	1			T6	4		T8	5		T11	1
auto[156:159]	1924	1			T6	12		T8	11		T9	9
auto[160:163]	352	1			T8	3		T9	3		T11	1
auto[164:167]	304	1			T8	1		T9	1		T11	3
auto[168:171]	327	1			T6	2		T8	4		T9	2
auto[172:175]	309	1			T6	4		T8	2		T11	4
auto[176:179]	310	1			T6	3		T8	6		T11	2
auto[180:183]	1936	1			T6	13		T8	20		T9	4
auto[184:187]	1330	1			T6	13		T8	17		T9	6
auto[188:191]	355	1			T6	1		T8	3		T11	1
auto[192:195]	314	1			T8	2		T9	2		T11	4
auto[196:199]	374	1			T8	3		T9	7		T11	6
auto[200:203]	363	1			T6	3		T8	5		T11	8
auto[204:207]	338	1			T6	1		T11	3		T28	3
auto[208:211]	307	1			T6	7		T8	1		T11	2
auto[212:215]	346	1			T5	2		T6	1		T8	2
auto[216:219]	307	1			T6	1		T8	2		T9	3
auto[220:223]	385	1			T6	2		T8	7		T9	1
auto[224:227]	335	1			T6	6		T8	3		T9	1
auto[228:231]	320	1			T6	3		T8	6		T9	4
auto[232:235]	2962	1			T5	2		T6	17		T8	16
auto[236:239]	333	1			T6	3		T8	2		T11	1
auto[240:243]	363	1			T6	1		T11	5		T27	2
auto[244:247]	348	1			T6	1		T8	6		T9	2
auto[248:251]	310	1			T6	1		T8	7		T11	2
auto[252:255]	369	1			T6	4		T8	5		T11	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	425	1			T6	2		T8	5		T11	8
auto[0:3]	auto[1]	879	1			T6	6		T8	4		T9	2
auto[4:7]	auto[0]	5439	1			T3	3		T5	38		T6	307
auto[4:7]	auto[1]	18216	1			T3	3		T6	96		T8	219
auto[8:11]	auto[0]	450	1			T6	3		T8	2		T9	6
auto[8:11]	auto[1]	790	1			T6	5		T8	9		T9	4
auto[12:15]	auto[0]	86	1			T6	2		T28	1		T35	2
auto[12:15]	auto[1]	270	1			T6	2		T8	5		T9	2
auto[16:19]	auto[0]	83	1			T8	5		T35	2		T16	2
auto[16:19]	auto[1]	253	1			T8	1		T9	1		T11	1
auto[20:23]	auto[0]	447	1			T6	5		T8	3		T9	2
auto[20:23]	auto[1]	1389	1			T6	1		T8	14		T9	3
auto[24:27]	auto[0]	64	1			T11	1		T27	1		T28	4
auto[24:27]	auto[1]	236	1			T6	3		T8	1		T9	1
auto[28:31]	auto[0]	87	1			T8	1		T27	1		T35	1
auto[28:31]	auto[1]	237	1			T8	1		T11	2		T35	2
auto[32:35]	auto[0]	71	1			T6	2		T11	2		T40	2
auto[32:35]	auto[1]	295	1			T8	5		T11	4		T28	2
auto[36:39]	auto[0]	71	1			T6	2		T11	1		T27	1
auto[36:39]	auto[1]	275	1			T8	2		T9	2		T11	1
auto[40:43]	auto[0]	87	1			T6	2		T11	3		T27	2
auto[40:43]	auto[1]	256	1			T6	4		T8	1		T11	1
auto[44:47]	auto[0]	80	1			T8	1		T27	1		T28	1
auto[44:47]	auto[1]	296	1			T8	4		T11	4		T28	3
auto[48:51]	auto[0]	75	1			T6	4		T8	1		T11	4
auto[48:51]	auto[1]	299	1			T6	1		T8	1		T11	5
auto[52:55]	auto[0]	434	1			T6	3		T8	4		T9	2
auto[52:55]	auto[1]	1420	1			T6	9		T8	11		T9	3
auto[56:59]	auto[0]	472	1			T6	6		T8	4		T9	4
auto[56:59]	auto[1]	872	1			T6	2		T8	10		T9	6
auto[60:63]	auto[0]	45	1			T8	1		T9	1		T35	2
auto[60:63]	auto[1]	259	1			T6	2		T8	2		T11	7
auto[64:67]	auto[0]	67	1			T11	6		T37	1		T16	1
auto[64:67]	auto[1]	238	1			T8	3		T11	3		T27	1
auto[68:71]	auto[0]	61	1			T35	1		T159	1		T20	3
auto[68:71]	auto[1]	281	1			T8	3		T9	1		T11	7
auto[72:75]	auto[0]	91	1			T8	1		T16	3		T79	5
auto[72:75]	auto[1]	232	1			T6	1		T8	1		T11	1
auto[76:79]	auto[0]	89	1			T8	1		T11	1		T27	1
auto[76:79]	auto[1]	296	1			T6	1		T8	1		T11	5
auto[80:83]	auto[0]	68	1			T5	1		T6	2		T8	1
auto[80:83]	auto[1]	256	1			T5	1		T6	6		T8	4
auto[84:87]	auto[0]	85	1			T6	2		T8	2		T11	1
auto[84:87]	auto[1]	275	1			T8	1		T11	3		T28	1
auto[88:91]	auto[0]	446	1			T6	4		T8	2		T9	3
auto[88:91]	auto[1]	1459	1			T6	3		T8	21		T9	3
auto[92:95]	auto[0]	73	1			T8	2		T11	1		T79	1
auto[92:95]	auto[1]	277	1			T8	5		T11	4		T27	2
auto[96:99]	auto[0]	68	1			T6	2		T9	3		T11	1
auto[96:99]	auto[1]	216	1			T6	5		T8	2		T27	1
auto[100:103]	auto[0]	86	1			T9	3		T27	3		T16	3
auto[100:103]	auto[1]	244	1			T6	1		T8	2		T11	3
auto[104:107]	auto[0]	451	1			T5	1		T6	10		T8	1
auto[104:107]	auto[1]	895	1			T5	1		T6	2		T8	6
auto[108:111]	auto[0]	71	1			T11	3		T27	1		T35	2
auto[108:111]	auto[1]	242	1			T8	2		T11	1		T27	3
auto[112:115]	auto[0]	69	1			T35	1		T37	1		T16	3
auto[112:115]	auto[1]	289	1			T8	3		T11	5		T35	2
auto[116:119]	auto[0]	63	1			T6	2		T27	3		T79	5
auto[116:119]	auto[1]	295	1			T6	1		T8	1		T11	4
auto[120:123]	auto[0]	81	1			T6	1		T9	1		T11	1
auto[120:123]	auto[1]	238	1			T8	7		T11	6		T28	1
auto[124:127]	auto[0]	91	1			T6	2		T8	1		T28	2
auto[124:127]	auto[1]	239	1			T6	1		T8	5		T11	3
auto[128:131]	auto[0]	74	1			T6	1		T11	1		T37	1
auto[128:131]	auto[1]	275	1			T8	3		T11	7		T35	2
auto[132:135]	auto[0]	69	1			T9	1		T11	2		T27	2
auto[132:135]	auto[1]	268	1			T8	4		T11	1		T27	1
auto[136:139]	auto[0]	92	1			T6	1		T9	3		T11	4
auto[136:139]	auto[1]	254	1			T36	1		T75	3		T18	3
auto[140:143]	auto[0]	95	1			T8	1		T9	1		T28	1
auto[140:143]	auto[1]	289	1			T6	1		T8	6		T11	4
auto[144:147]	auto[0]	74	1			T11	1		T27	1		T35	4
auto[144:147]	auto[1]	277	1			T8	4		T9	1		T11	3
auto[148:151]	auto[0]	68	1			T27	2		T38	1		T71	3
auto[148:151]	auto[1]	243	1			T6	1		T8	2		T11	3
auto[152:155]	auto[0]	81	1			T6	2		T27	1		T28	1
auto[152:155]	auto[1]	275	1			T6	2		T8	5		T11	1
auto[156:159]	auto[0]	431	1			T6	7		T9	7		T11	8
auto[156:159]	auto[1]	1493	1			T6	5		T8	11		T9	2
auto[160:163]	auto[0]	70	1			T35	2		T37	4		T79	2
auto[160:163]	auto[1]	282	1			T8	3		T9	3		T11	1
auto[164:167]	auto[0]	63	1			T8	1		T11	2		T27	4
auto[164:167]	auto[1]	241	1			T9	1		T11	1		T35	1
auto[168:171]	auto[0]	94	1			T6	2		T8	1		T9	1
auto[168:171]	auto[1]	233	1			T8	3		T9	1		T11	1
auto[172:175]	auto[0]	84	1			T6	1		T27	1		T28	2
auto[172:175]	auto[1]	225	1			T6	3		T8	2		T11	4
auto[176:179]	auto[0]	73	1			T11	1		T27	3		T16	1
auto[176:179]	auto[1]	237	1			T6	3		T8	6		T11	1
auto[180:183]	auto[0]	461	1			T6	9		T8	4		T9	2
auto[180:183]	auto[1]	1475	1			T6	4		T8	16		T9	2
auto[184:187]	auto[0]	447	1			T6	4		T8	4		T9	3
auto[184:187]	auto[1]	883	1			T6	9		T8	13		T9	3
auto[188:191]	auto[0]	81	1			T6	1		T8	3		T28	3
auto[188:191]	auto[1]	274	1			T11	1		T27	1		T28	1
auto[192:195]	auto[0]	75	1			T8	1		T11	1		T27	1
auto[192:195]	auto[1]	239	1			T8	1		T9	2		T11	3
auto[196:199]	auto[0]	90	1			T8	2		T9	6		T11	3
auto[196:199]	auto[1]	284	1			T8	1		T9	1		T11	3
auto[200:203]	auto[0]	95	1			T6	3		T8	5		T27	1
auto[200:203]	auto[1]	268	1			T11	8		T27	1		T35	1
auto[204:207]	auto[0]	85	1			T6	1		T28	2		T35	5
auto[204:207]	auto[1]	253	1			T11	3		T28	1		T35	2
auto[208:211]	auto[0]	75	1			T6	2		T11	1		T27	3
auto[208:211]	auto[1]	232	1			T6	5		T8	1		T11	1
auto[212:215]	auto[0]	86	1			T5	1		T6	1		T9	3
auto[212:215]	auto[1]	260	1			T5	1		T8	2		T11	2
auto[216:219]	auto[0]	62	1			T9	2		T27	3		T35	1
auto[216:219]	auto[1]	245	1			T6	1		T8	2		T9	1
auto[220:223]	auto[0]	85	1			T6	1		T8	1		T9	1
auto[220:223]	auto[1]	300	1			T6	1		T8	6		T11	8
auto[224:227]	auto[0]	92	1			T6	5		T9	1		T11	2
auto[224:227]	auto[1]	243	1			T6	1		T8	3		T35	2
auto[228:231]	auto[0]	72	1			T6	1		T8	2		T9	4
auto[228:231]	auto[1]	248	1			T6	2		T8	4		T11	4
auto[232:235]	auto[0]	811	1			T5	1		T6	5		T8	4
auto[232:235]	auto[1]	2151	1			T5	1		T6	12		T8	12
auto[236:239]	auto[0]	73	1			T6	2		T16	1		T79	1
auto[236:239]	auto[1]	260	1			T6	1		T8	2		T11	1
auto[240:243]	auto[0]	85	1			T6	1		T11	1		T27	2
auto[240:243]	auto[1]	278	1			T11	4		T37	1		T36	5
auto[244:247]	auto[0]	69	1			T8	2		T11	2		T27	2
auto[244:247]	auto[1]	279	1			T6	1		T8	4		T9	2
auto[248:251]	auto[0]	58	1			T8	2		T28	2		T37	1
auto[248:251]	auto[1]	252	1			T6	1		T8	5		T11	2
auto[252:255]	auto[0]	81	1			T6	3		T8	2		T11	1
auto[252:255]	auto[1]	288	1			T6	1		T8	3		T11	1