SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 8 | 0 | 8 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_flip_position | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_opcode | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 103 | 1 | T44 | 8 | T45 | 1 | T159 | 5 | ||||
auto[1] | 32 | 1 | T44 | 2 | T45 | 1 | T159 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
read_ops[0x03] | 37 | 1 | T159 | 2 | T161 | 2 | T302 | 4 | ||||
read_ops[0x0b] | 24 | 1 | T44 | 6 | T159 | 4 | T303 | 2 | ||||
read_ops[0x3b] | 10 | 1 | T304 | 1 | T305 | 2 | T306 | 2 | ||||
read_ops[0x6b] | 18 | 1 | T161 | 6 | T307 | 6 | T308 | 2 | ||||
read_ops[0xbb] | 15 | 1 | T307 | 4 | T308 | 1 | T309 | 2 | ||||
read_ops[0xeb] | 31 | 1 | T44 | 4 | T45 | 2 | T161 | 4 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |