| T546 |
/workspace/coverage/default/28.sram_ctrl_smoke.513157229 |
|
|
Mar 03 01:15:53 PM PST 24 |
Mar 03 01:16:12 PM PST 24 |
1080429165 ps |
| T547 |
/workspace/coverage/default/11.sram_ctrl_stress_all.2792823526 |
|
|
Mar 03 01:11:34 PM PST 24 |
Mar 03 02:45:21 PM PST 24 |
186657982184 ps |
| T548 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.4046743717 |
|
|
Mar 03 01:10:36 PM PST 24 |
Mar 03 01:12:38 PM PST 24 |
9192972445 ps |
| T549 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.489357512 |
|
|
Mar 03 01:15:30 PM PST 24 |
Mar 03 01:15:34 PM PST 24 |
346686373 ps |
| T550 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.407155269 |
|
|
Mar 03 01:16:03 PM PST 24 |
Mar 03 01:20:26 PM PST 24 |
7882763389 ps |
| T551 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.1498422828 |
|
|
Mar 03 01:15:05 PM PST 24 |
Mar 03 01:26:01 PM PST 24 |
31226812815 ps |
| T552 |
/workspace/coverage/default/34.sram_ctrl_alert_test.3479528918 |
|
|
Mar 03 01:17:42 PM PST 24 |
Mar 03 01:17:43 PM PST 24 |
34052381 ps |
| T553 |
/workspace/coverage/default/39.sram_ctrl_executable.3798052200 |
|
|
Mar 03 01:18:46 PM PST 24 |
Mar 03 01:43:29 PM PST 24 |
23304860156 ps |
| T554 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3095391953 |
|
|
Mar 03 01:13:30 PM PST 24 |
Mar 03 01:13:41 PM PST 24 |
4409777882 ps |
| T555 |
/workspace/coverage/default/5.sram_ctrl_regwen.2061009481 |
|
|
Mar 03 01:10:43 PM PST 24 |
Mar 03 01:18:08 PM PST 24 |
5514887191 ps |
| T556 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.103705598 |
|
|
Mar 03 01:10:29 PM PST 24 |
Mar 03 01:12:23 PM PST 24 |
2393605136 ps |
| T557 |
/workspace/coverage/default/30.sram_ctrl_alert_test.4073933928 |
|
|
Mar 03 01:16:34 PM PST 24 |
Mar 03 01:16:35 PM PST 24 |
17965492 ps |
| T558 |
/workspace/coverage/default/30.sram_ctrl_regwen.3576782904 |
|
|
Mar 03 01:16:25 PM PST 24 |
Mar 03 01:35:25 PM PST 24 |
83023511203 ps |
| T559 |
/workspace/coverage/default/17.sram_ctrl_bijection.3875168152 |
|
|
Mar 03 01:13:10 PM PST 24 |
Mar 03 01:47:35 PM PST 24 |
243305687332 ps |
| T560 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.1673579839 |
|
|
Mar 03 01:14:27 PM PST 24 |
Mar 03 01:15:45 PM PST 24 |
7797178504 ps |
| T561 |
/workspace/coverage/default/13.sram_ctrl_smoke.4165040180 |
|
|
Mar 03 01:11:58 PM PST 24 |
Mar 03 01:12:21 PM PST 24 |
1753413286 ps |
| T562 |
/workspace/coverage/default/37.sram_ctrl_alert_test.1929052319 |
|
|
Mar 03 01:18:16 PM PST 24 |
Mar 03 01:18:17 PM PST 24 |
21236401 ps |
| T563 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1663743875 |
|
|
Mar 03 01:19:19 PM PST 24 |
Mar 03 01:19:36 PM PST 24 |
564091414 ps |
| T564 |
/workspace/coverage/default/17.sram_ctrl_regwen.3496215377 |
|
|
Mar 03 01:13:17 PM PST 24 |
Mar 03 01:25:25 PM PST 24 |
20019203053 ps |
| T565 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1314350191 |
|
|
Mar 03 01:20:49 PM PST 24 |
Mar 03 01:20:53 PM PST 24 |
1780913676 ps |
| T566 |
/workspace/coverage/default/10.sram_ctrl_smoke.2143413414 |
|
|
Mar 03 01:11:21 PM PST 24 |
Mar 03 01:11:39 PM PST 24 |
2803660389 ps |
| T567 |
/workspace/coverage/default/46.sram_ctrl_executable.2120793790 |
|
|
Mar 03 01:20:23 PM PST 24 |
Mar 03 01:52:00 PM PST 24 |
108085441038 ps |
| T568 |
/workspace/coverage/default/8.sram_ctrl_regwen.4149378259 |
|
|
Mar 03 01:11:03 PM PST 24 |
Mar 03 01:15:11 PM PST 24 |
3114675921 ps |
| T569 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.1865177102 |
|
|
Mar 03 01:18:31 PM PST 24 |
Mar 03 01:20:59 PM PST 24 |
14094671265 ps |
| T570 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4038119098 |
|
|
Mar 03 01:20:30 PM PST 24 |
Mar 03 01:24:23 PM PST 24 |
20567889828 ps |
| T571 |
/workspace/coverage/default/24.sram_ctrl_bijection.4073838999 |
|
|
Mar 03 01:14:47 PM PST 24 |
Mar 03 01:39:20 PM PST 24 |
89752136448 ps |
| T572 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2493208160 |
|
|
Mar 03 01:14:46 PM PST 24 |
Mar 03 01:15:10 PM PST 24 |
840573408 ps |
| T573 |
/workspace/coverage/default/31.sram_ctrl_bijection.3366281317 |
|
|
Mar 03 01:16:34 PM PST 24 |
Mar 03 01:25:34 PM PST 24 |
96913295970 ps |
| T574 |
/workspace/coverage/default/23.sram_ctrl_alert_test.4263977495 |
|
|
Mar 03 01:14:46 PM PST 24 |
Mar 03 01:14:47 PM PST 24 |
19751295 ps |
| T575 |
/workspace/coverage/default/23.sram_ctrl_smoke.3359604520 |
|
|
Mar 03 01:14:35 PM PST 24 |
Mar 03 01:14:51 PM PST 24 |
1041882878 ps |
| T576 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2208642652 |
|
|
Mar 03 01:15:05 PM PST 24 |
Mar 03 01:15:08 PM PST 24 |
350339720 ps |
| T577 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2065725290 |
|
|
Mar 03 01:11:34 PM PST 24 |
Mar 03 01:12:30 PM PST 24 |
10507594717 ps |
| T578 |
/workspace/coverage/default/25.sram_ctrl_alert_test.819870987 |
|
|
Mar 03 01:15:15 PM PST 24 |
Mar 03 01:15:17 PM PST 24 |
12394651 ps |
| T579 |
/workspace/coverage/default/24.sram_ctrl_stress_all.2415459215 |
|
|
Mar 03 01:15:02 PM PST 24 |
Mar 03 03:26:25 PM PST 24 |
555201856978 ps |
| T580 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.132512289 |
|
|
Mar 03 01:10:22 PM PST 24 |
Mar 03 01:16:45 PM PST 24 |
15700515574 ps |
| T581 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1914750571 |
|
|
Mar 03 01:20:17 PM PST 24 |
Mar 03 01:30:50 PM PST 24 |
11746898784 ps |
| T582 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2426230840 |
|
|
Mar 03 01:15:16 PM PST 24 |
Mar 03 01:15:58 PM PST 24 |
1136336086 ps |
| T583 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3646886137 |
|
|
Mar 03 01:20:37 PM PST 24 |
Mar 03 01:25:50 PM PST 24 |
36563599878 ps |
| T584 |
/workspace/coverage/default/33.sram_ctrl_smoke.2036606280 |
|
|
Mar 03 01:17:33 PM PST 24 |
Mar 03 01:17:45 PM PST 24 |
2132866592 ps |
| T585 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.3450400827 |
|
|
Mar 03 01:10:58 PM PST 24 |
Mar 03 01:13:17 PM PST 24 |
28719984045 ps |
| T586 |
/workspace/coverage/default/30.sram_ctrl_stress_all.3807023689 |
|
|
Mar 03 01:16:36 PM PST 24 |
Mar 03 03:38:40 PM PST 24 |
436095698222 ps |
| T587 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.2982528401 |
|
|
Mar 03 01:16:35 PM PST 24 |
Mar 03 01:17:41 PM PST 24 |
103331310809 ps |
| T588 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3945990146 |
|
|
Mar 03 01:10:53 PM PST 24 |
Mar 03 01:10:55 PM PST 24 |
80508093 ps |
| T589 |
/workspace/coverage/default/21.sram_ctrl_executable.2134688148 |
|
|
Mar 03 01:14:12 PM PST 24 |
Mar 03 01:30:04 PM PST 24 |
163097548440 ps |
| T590 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2927728705 |
|
|
Mar 03 01:10:06 PM PST 24 |
Mar 03 01:12:45 PM PST 24 |
12634639705 ps |
| T591 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.888180126 |
|
|
Mar 03 01:14:44 PM PST 24 |
Mar 03 01:14:48 PM PST 24 |
683147873 ps |
| T592 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.2555177772 |
|
|
Mar 03 01:15:30 PM PST 24 |
Mar 03 01:18:01 PM PST 24 |
18184880466 ps |
| T593 |
/workspace/coverage/default/21.sram_ctrl_smoke.1559555144 |
|
|
Mar 03 01:14:04 PM PST 24 |
Mar 03 01:14:12 PM PST 24 |
5737912913 ps |
| T594 |
/workspace/coverage/default/9.sram_ctrl_regwen.1558250129 |
|
|
Mar 03 01:11:22 PM PST 24 |
Mar 03 01:23:18 PM PST 24 |
11164099637 ps |
| T595 |
/workspace/coverage/default/22.sram_ctrl_regwen.912698486 |
|
|
Mar 03 01:14:27 PM PST 24 |
Mar 03 01:34:59 PM PST 24 |
8931513239 ps |
| T596 |
/workspace/coverage/default/25.sram_ctrl_bijection.3564072449 |
|
|
Mar 03 01:15:03 PM PST 24 |
Mar 03 01:40:33 PM PST 24 |
44419718269 ps |
| T597 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.260923801 |
|
|
Mar 03 01:20:50 PM PST 24 |
Mar 03 01:22:58 PM PST 24 |
32904692383 ps |
| T598 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3688840575 |
|
|
Mar 03 01:10:38 PM PST 24 |
Mar 03 01:10:46 PM PST 24 |
181921258 ps |
| T599 |
/workspace/coverage/default/33.sram_ctrl_bijection.3850877711 |
|
|
Mar 03 01:17:33 PM PST 24 |
Mar 03 01:50:25 PM PST 24 |
517784641383 ps |
| T600 |
/workspace/coverage/default/5.sram_ctrl_stress_all.897353758 |
|
|
Mar 03 01:10:47 PM PST 24 |
Mar 03 01:53:08 PM PST 24 |
111573704814 ps |
| T601 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2717637620 |
|
|
Mar 03 01:10:51 PM PST 24 |
Mar 03 01:16:16 PM PST 24 |
66738500435 ps |
| T602 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.2193818218 |
|
|
Mar 03 01:15:19 PM PST 24 |
Mar 03 01:23:14 PM PST 24 |
9569448559 ps |
| T603 |
/workspace/coverage/default/18.sram_ctrl_bijection.1376276430 |
|
|
Mar 03 01:13:23 PM PST 24 |
Mar 03 01:51:36 PM PST 24 |
524593112436 ps |
| T604 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.203001321 |
|
|
Mar 03 01:14:27 PM PST 24 |
Mar 03 01:15:06 PM PST 24 |
25405618792 ps |
| T605 |
/workspace/coverage/default/21.sram_ctrl_bijection.626612082 |
|
|
Mar 03 01:14:04 PM PST 24 |
Mar 03 01:47:05 PM PST 24 |
111445696456 ps |
| T606 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.2328985608 |
|
|
Mar 03 01:15:09 PM PST 24 |
Mar 03 01:16:35 PM PST 24 |
59352676053 ps |
| T607 |
/workspace/coverage/default/16.sram_ctrl_alert_test.537731675 |
|
|
Mar 03 01:13:11 PM PST 24 |
Mar 03 01:13:12 PM PST 24 |
22511786 ps |
| T608 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.2173665231 |
|
|
Mar 03 01:10:28 PM PST 24 |
Mar 03 01:11:14 PM PST 24 |
14899082603 ps |
| T609 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3574803481 |
|
|
Mar 03 01:10:13 PM PST 24 |
Mar 03 01:11:12 PM PST 24 |
11943753059 ps |
| T610 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1193534466 |
|
|
Mar 03 01:10:12 PM PST 24 |
Mar 03 01:13:56 PM PST 24 |
3328017281 ps |
| T611 |
/workspace/coverage/default/36.sram_ctrl_partial_access.366730620 |
|
|
Mar 03 01:17:48 PM PST 24 |
Mar 03 01:18:03 PM PST 24 |
5389795948 ps |
| T612 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.1662450322 |
|
|
Mar 03 01:16:56 PM PST 24 |
Mar 03 01:16:59 PM PST 24 |
353410568 ps |
| T613 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.516890682 |
|
|
Mar 03 01:10:29 PM PST 24 |
Mar 03 01:15:45 PM PST 24 |
6722776159 ps |
| T614 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1577090518 |
|
|
Mar 03 01:17:55 PM PST 24 |
Mar 03 01:27:22 PM PST 24 |
94333138626 ps |
| T615 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.2766429230 |
|
|
Mar 03 01:16:04 PM PST 24 |
Mar 03 01:29:15 PM PST 24 |
12803710266 ps |
| T616 |
/workspace/coverage/default/4.sram_ctrl_bijection.1275225074 |
|
|
Mar 03 01:10:38 PM PST 24 |
Mar 03 01:50:09 PM PST 24 |
66223056126 ps |
| T617 |
/workspace/coverage/default/2.sram_ctrl_alert_test.1097453037 |
|
|
Mar 03 01:10:31 PM PST 24 |
Mar 03 01:10:32 PM PST 24 |
151643655 ps |
| T618 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.1932644690 |
|
|
Mar 03 01:15:52 PM PST 24 |
Mar 03 01:17:54 PM PST 24 |
1580657274 ps |
| T619 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2693612947 |
|
|
Mar 03 01:10:19 PM PST 24 |
Mar 03 01:10:23 PM PST 24 |
3088723293 ps |
| T620 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.4116762129 |
|
|
Mar 03 01:13:18 PM PST 24 |
Mar 03 01:13:21 PM PST 24 |
474190599 ps |
| T621 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.800182183 |
|
|
Mar 03 01:12:12 PM PST 24 |
Mar 03 01:12:51 PM PST 24 |
995830806 ps |
| T622 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3829633714 |
|
|
Mar 03 01:13:48 PM PST 24 |
Mar 03 01:14:52 PM PST 24 |
9438494334 ps |
| T623 |
/workspace/coverage/default/1.sram_ctrl_stress_all.1664399809 |
|
|
Mar 03 01:10:21 PM PST 24 |
Mar 03 02:11:24 PM PST 24 |
33691044910 ps |
| T624 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.4114059583 |
|
|
Mar 03 01:10:32 PM PST 24 |
Mar 03 01:29:13 PM PST 24 |
17414833357 ps |
| T625 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.3399460692 |
|
|
Mar 03 01:10:44 PM PST 24 |
Mar 03 01:15:27 PM PST 24 |
13899452654 ps |
| T626 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2302741723 |
|
|
Mar 03 01:10:47 PM PST 24 |
Mar 03 01:40:45 PM PST 24 |
31027939726 ps |
| T627 |
/workspace/coverage/default/4.sram_ctrl_smoke.2698618303 |
|
|
Mar 03 01:10:36 PM PST 24 |
Mar 03 01:13:17 PM PST 24 |
5473811284 ps |
| T628 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.2373292096 |
|
|
Mar 03 01:15:10 PM PST 24 |
Mar 03 01:21:37 PM PST 24 |
21595100426 ps |
| T629 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.1611243128 |
|
|
Mar 03 01:17:44 PM PST 24 |
Mar 03 01:20:10 PM PST 24 |
9963822074 ps |
| T630 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1203770276 |
|
|
Mar 03 01:18:56 PM PST 24 |
Mar 03 01:19:14 PM PST 24 |
1451529931 ps |
| T631 |
/workspace/coverage/default/44.sram_ctrl_alert_test.4140910892 |
|
|
Mar 03 01:20:03 PM PST 24 |
Mar 03 01:20:04 PM PST 24 |
35287328 ps |
| T632 |
/workspace/coverage/default/45.sram_ctrl_stress_all.2331443933 |
|
|
Mar 03 01:20:14 PM PST 24 |
Mar 03 02:57:00 PM PST 24 |
194946618099 ps |
| T633 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2928567243 |
|
|
Mar 03 01:10:59 PM PST 24 |
Mar 03 01:12:12 PM PST 24 |
9421473367 ps |
| T634 |
/workspace/coverage/default/12.sram_ctrl_alert_test.232166054 |
|
|
Mar 03 01:11:53 PM PST 24 |
Mar 03 01:11:55 PM PST 24 |
14297954 ps |
| T635 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3134774865 |
|
|
Mar 03 01:20:59 PM PST 24 |
Mar 03 03:03:20 PM PST 24 |
1001448258595 ps |
| T636 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4248727880 |
|
|
Mar 03 01:10:14 PM PST 24 |
Mar 03 01:10:45 PM PST 24 |
1661122138 ps |
| T637 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.4268271899 |
|
|
Mar 03 01:11:22 PM PST 24 |
Mar 03 01:13:37 PM PST 24 |
3558552013 ps |
| T638 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.175619929 |
|
|
Mar 03 01:15:03 PM PST 24 |
Mar 03 01:17:45 PM PST 24 |
10552337256 ps |
| T639 |
/workspace/coverage/default/38.sram_ctrl_smoke.1966283965 |
|
|
Mar 03 01:18:16 PM PST 24 |
Mar 03 01:18:29 PM PST 24 |
1666560516 ps |
| T640 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.227556233 |
|
|
Mar 03 01:19:18 PM PST 24 |
Mar 03 01:19:22 PM PST 24 |
693400193 ps |
| T641 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.323808604 |
|
|
Mar 03 01:13:02 PM PST 24 |
Mar 03 01:15:28 PM PST 24 |
28796430783 ps |
| T642 |
/workspace/coverage/default/1.sram_ctrl_bijection.2659550514 |
|
|
Mar 03 01:10:13 PM PST 24 |
Mar 03 01:49:40 PM PST 24 |
261753318641 ps |
| T643 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1909877370 |
|
|
Mar 03 01:17:34 PM PST 24 |
Mar 03 01:20:16 PM PST 24 |
49155044846 ps |
| T644 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4176323302 |
|
|
Mar 03 01:10:39 PM PST 24 |
Mar 03 01:38:09 PM PST 24 |
18258847516 ps |
| T645 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.3138259993 |
|
|
Mar 03 01:17:47 PM PST 24 |
Mar 03 01:20:16 PM PST 24 |
7253415543 ps |
| T646 |
/workspace/coverage/default/37.sram_ctrl_executable.3753123326 |
|
|
Mar 03 01:18:16 PM PST 24 |
Mar 03 01:45:59 PM PST 24 |
22214823203 ps |
| T647 |
/workspace/coverage/default/3.sram_ctrl_alert_test.641500969 |
|
|
Mar 03 01:10:37 PM PST 24 |
Mar 03 01:10:40 PM PST 24 |
32001689 ps |
| T648 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.4275883385 |
|
|
Mar 03 01:17:28 PM PST 24 |
Mar 03 01:18:38 PM PST 24 |
24657484630 ps |
| T649 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1322593424 |
|
|
Mar 03 01:13:18 PM PST 24 |
Mar 03 01:13:31 PM PST 24 |
1990249432 ps |
| T650 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2415979919 |
|
|
Mar 03 01:20:22 PM PST 24 |
Mar 03 01:20:52 PM PST 24 |
1152304482 ps |
| T651 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1661982371 |
|
|
Mar 03 01:20:44 PM PST 24 |
Mar 03 01:21:26 PM PST 24 |
4035139463 ps |
| T652 |
/workspace/coverage/default/34.sram_ctrl_bijection.2321451193 |
|
|
Mar 03 01:17:40 PM PST 24 |
Mar 03 01:49:31 PM PST 24 |
88487270881 ps |
| T653 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.499612883 |
|
|
Mar 03 01:20:05 PM PST 24 |
Mar 03 01:20:09 PM PST 24 |
724265910 ps |
| T654 |
/workspace/coverage/default/20.sram_ctrl_alert_test.1383891768 |
|
|
Mar 03 01:14:04 PM PST 24 |
Mar 03 01:14:05 PM PST 24 |
31680253 ps |
| T655 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.4100214399 |
|
|
Mar 03 01:17:37 PM PST 24 |
Mar 03 01:17:40 PM PST 24 |
347969091 ps |
| T656 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.3487225932 |
|
|
Mar 03 01:12:12 PM PST 24 |
Mar 03 01:30:32 PM PST 24 |
7575710539 ps |
| T657 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2459092190 |
|
|
Mar 03 01:11:57 PM PST 24 |
Mar 03 01:21:29 PM PST 24 |
240399725129 ps |
| T658 |
/workspace/coverage/default/29.sram_ctrl_regwen.1530624349 |
|
|
Mar 03 01:16:17 PM PST 24 |
Mar 03 01:30:32 PM PST 24 |
14009314805 ps |
| T659 |
/workspace/coverage/default/35.sram_ctrl_smoke.2156841881 |
|
|
Mar 03 01:17:43 PM PST 24 |
Mar 03 01:18:00 PM PST 24 |
4587982769 ps |
| T660 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.524468406 |
|
|
Mar 03 01:11:15 PM PST 24 |
Mar 03 01:12:28 PM PST 24 |
13511893395 ps |
| T661 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3663428041 |
|
|
Mar 03 01:11:14 PM PST 24 |
Mar 03 01:11:45 PM PST 24 |
7511487648 ps |
| T662 |
/workspace/coverage/default/41.sram_ctrl_regwen.1637234827 |
|
|
Mar 03 01:19:18 PM PST 24 |
Mar 03 01:30:50 PM PST 24 |
47300811066 ps |
| T663 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2439018320 |
|
|
Mar 03 01:10:46 PM PST 24 |
Mar 03 01:13:26 PM PST 24 |
10406068734 ps |
| T664 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3559312899 |
|
|
Mar 03 01:10:06 PM PST 24 |
Mar 03 01:17:13 PM PST 24 |
16138156757 ps |
| T665 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.4122327170 |
|
|
Mar 03 01:13:24 PM PST 24 |
Mar 03 01:14:01 PM PST 24 |
21709218355 ps |
| T666 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.190634690 |
|
|
Mar 03 01:14:47 PM PST 24 |
Mar 03 01:15:53 PM PST 24 |
973544360 ps |
| T667 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1002590275 |
|
|
Mar 03 01:12:11 PM PST 24 |
Mar 03 01:42:29 PM PST 24 |
102872046025 ps |
| T668 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2322324107 |
|
|
Mar 03 01:10:24 PM PST 24 |
Mar 03 01:11:45 PM PST 24 |
2711899549 ps |
| T669 |
/workspace/coverage/default/47.sram_ctrl_partial_access.669266253 |
|
|
Mar 03 01:20:30 PM PST 24 |
Mar 03 01:20:34 PM PST 24 |
1750571201 ps |
| T670 |
/workspace/coverage/default/15.sram_ctrl_partial_access.1826870324 |
|
|
Mar 03 01:12:28 PM PST 24 |
Mar 03 01:12:52 PM PST 24 |
5741090893 ps |
| T671 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3453509806 |
|
|
Mar 03 01:10:52 PM PST 24 |
Mar 03 01:43:44 PM PST 24 |
27480812349 ps |
| T672 |
/workspace/coverage/default/47.sram_ctrl_regwen.706936695 |
|
|
Mar 03 01:20:36 PM PST 24 |
Mar 03 01:31:27 PM PST 24 |
103343709637 ps |
| T673 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2109835760 |
|
|
Mar 03 01:12:05 PM PST 24 |
Mar 03 01:12:08 PM PST 24 |
362215388 ps |
| T674 |
/workspace/coverage/default/6.sram_ctrl_alert_test.550977081 |
|
|
Mar 03 01:10:50 PM PST 24 |
Mar 03 01:10:52 PM PST 24 |
14135349 ps |
| T675 |
/workspace/coverage/default/7.sram_ctrl_bijection.913630410 |
|
|
Mar 03 01:10:45 PM PST 24 |
Mar 03 01:42:21 PM PST 24 |
487359132774 ps |
| T676 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1185618459 |
|
|
Mar 03 01:14:49 PM PST 24 |
Mar 03 01:22:27 PM PST 24 |
17816497238 ps |
| T677 |
/workspace/coverage/default/4.sram_ctrl_alert_test.1514924970 |
|
|
Mar 03 01:10:38 PM PST 24 |
Mar 03 01:10:40 PM PST 24 |
14861606 ps |
| T678 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2529280951 |
|
|
Mar 03 01:20:24 PM PST 24 |
Mar 03 01:20:27 PM PST 24 |
1781060561 ps |
| T679 |
/workspace/coverage/default/43.sram_ctrl_executable.3251867881 |
|
|
Mar 03 01:19:46 PM PST 24 |
Mar 03 01:31:17 PM PST 24 |
21997084403 ps |
| T680 |
/workspace/coverage/default/3.sram_ctrl_executable.4120820243 |
|
|
Mar 03 01:10:32 PM PST 24 |
Mar 03 01:17:25 PM PST 24 |
41269295305 ps |
| T681 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.3397790499 |
|
|
Mar 03 01:19:03 PM PST 24 |
Mar 03 01:19:45 PM PST 24 |
6384270735 ps |
| T682 |
/workspace/coverage/default/38.sram_ctrl_executable.3773072679 |
|
|
Mar 03 01:18:31 PM PST 24 |
Mar 03 01:20:31 PM PST 24 |
6642634295 ps |
| T683 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.258071182 |
|
|
Mar 03 01:20:49 PM PST 24 |
Mar 03 01:24:01 PM PST 24 |
2616178917 ps |
| T684 |
/workspace/coverage/default/14.sram_ctrl_smoke.1665310757 |
|
|
Mar 03 01:12:13 PM PST 24 |
Mar 03 01:12:19 PM PST 24 |
1448274530 ps |
| T685 |
/workspace/coverage/default/12.sram_ctrl_executable.1113237013 |
|
|
Mar 03 01:11:51 PM PST 24 |
Mar 03 01:29:20 PM PST 24 |
37433801715 ps |
| T686 |
/workspace/coverage/default/5.sram_ctrl_executable.118330755 |
|
|
Mar 03 01:10:45 PM PST 24 |
Mar 03 01:31:41 PM PST 24 |
30104386048 ps |
| T687 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.3183800476 |
|
|
Mar 03 01:17:36 PM PST 24 |
Mar 03 01:23:01 PM PST 24 |
66578789346 ps |
| T688 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2656287184 |
|
|
Mar 03 01:19:17 PM PST 24 |
Mar 03 01:27:19 PM PST 24 |
46595652122 ps |
| T689 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1274994376 |
|
|
Mar 03 01:16:27 PM PST 24 |
Mar 03 01:22:20 PM PST 24 |
5356108650 ps |
| T690 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3061521946 |
|
|
Mar 03 01:16:11 PM PST 24 |
Mar 03 01:19:54 PM PST 24 |
3301691718 ps |
| T691 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2448669987 |
|
|
Mar 03 01:15:37 PM PST 24 |
Mar 03 01:22:49 PM PST 24 |
14900630723 ps |
| T692 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1017931169 |
|
|
Mar 03 01:11:20 PM PST 24 |
Mar 03 01:11:23 PM PST 24 |
1348706403 ps |
| T693 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3554646847 |
|
|
Mar 03 01:20:59 PM PST 24 |
Mar 03 01:21:08 PM PST 24 |
708114901 ps |
| T694 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.2013188596 |
|
|
Mar 03 01:13:17 PM PST 24 |
Mar 03 01:14:23 PM PST 24 |
23702897295 ps |
| T695 |
/workspace/coverage/default/15.sram_ctrl_alert_test.3496789145 |
|
|
Mar 03 01:12:48 PM PST 24 |
Mar 03 01:12:49 PM PST 24 |
44026621 ps |
| T696 |
/workspace/coverage/default/28.sram_ctrl_bijection.43880738 |
|
|
Mar 03 01:15:54 PM PST 24 |
Mar 03 01:56:10 PM PST 24 |
147909956735 ps |
| T697 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2583012302 |
|
|
Mar 03 01:15:31 PM PST 24 |
Mar 03 01:16:16 PM PST 24 |
1166147854 ps |
| T698 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.650868264 |
|
|
Mar 03 01:11:40 PM PST 24 |
Mar 03 01:14:27 PM PST 24 |
2904324380 ps |
| T699 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.263204170 |
|
|
Mar 03 01:20:45 PM PST 24 |
Mar 03 01:24:21 PM PST 24 |
18597269212 ps |
| T700 |
/workspace/coverage/default/15.sram_ctrl_regwen.3780677117 |
|
|
Mar 03 01:12:42 PM PST 24 |
Mar 03 01:20:01 PM PST 24 |
9629014415 ps |
| T701 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.439887660 |
|
|
Mar 03 01:15:15 PM PST 24 |
Mar 03 01:15:19 PM PST 24 |
1340169376 ps |
| T702 |
/workspace/coverage/default/49.sram_ctrl_regwen.2835580691 |
|
|
Mar 03 01:20:57 PM PST 24 |
Mar 03 01:37:01 PM PST 24 |
66397640287 ps |
| T703 |
/workspace/coverage/default/41.sram_ctrl_stress_all.3590307626 |
|
|
Mar 03 01:19:20 PM PST 24 |
Mar 03 03:17:00 PM PST 24 |
200031130748 ps |
| T704 |
/workspace/coverage/default/37.sram_ctrl_regwen.1798752492 |
|
|
Mar 03 01:18:18 PM PST 24 |
Mar 03 01:38:48 PM PST 24 |
17658296409 ps |
| T705 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3095672299 |
|
|
Mar 03 01:18:24 PM PST 24 |
Mar 03 01:21:49 PM PST 24 |
32906182471 ps |
| T706 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.265777865 |
|
|
Mar 03 01:16:41 PM PST 24 |
Mar 03 01:19:21 PM PST 24 |
60709107259 ps |
| T707 |
/workspace/coverage/default/35.sram_ctrl_partial_access.2321026297 |
|
|
Mar 03 01:17:45 PM PST 24 |
Mar 03 01:17:50 PM PST 24 |
720349791 ps |
| T708 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.2206511141 |
|
|
Mar 03 01:19:39 PM PST 24 |
Mar 03 01:21:26 PM PST 24 |
80982163975 ps |
| T709 |
/workspace/coverage/default/22.sram_ctrl_alert_test.1317348238 |
|
|
Mar 03 01:14:35 PM PST 24 |
Mar 03 01:14:36 PM PST 24 |
52205927 ps |
| T710 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3743718406 |
|
|
Mar 03 01:10:47 PM PST 24 |
Mar 03 01:10:50 PM PST 24 |
891262952 ps |
| T711 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2298210656 |
|
|
Mar 03 01:17:44 PM PST 24 |
Mar 03 01:23:45 PM PST 24 |
20863757157 ps |
| T712 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2078526205 |
|
|
Mar 03 01:15:57 PM PST 24 |
Mar 03 01:22:26 PM PST 24 |
37564658904 ps |
| T713 |
/workspace/coverage/default/16.sram_ctrl_smoke.1483115872 |
|
|
Mar 03 01:12:48 PM PST 24 |
Mar 03 01:13:19 PM PST 24 |
3014252968 ps |
| T714 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2117209651 |
|
|
Mar 03 01:10:21 PM PST 24 |
Mar 03 01:10:59 PM PST 24 |
4732833784 ps |
| T715 |
/workspace/coverage/default/8.sram_ctrl_stress_all.3246448405 |
|
|
Mar 03 01:11:08 PM PST 24 |
Mar 03 01:33:24 PM PST 24 |
37079347179 ps |
| T716 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.2349778757 |
|
|
Mar 03 01:12:03 PM PST 24 |
Mar 03 01:14:40 PM PST 24 |
31283852666 ps |
| T717 |
/workspace/coverage/default/8.sram_ctrl_smoke.1681776979 |
|
|
Mar 03 01:10:56 PM PST 24 |
Mar 03 01:11:22 PM PST 24 |
6636139488 ps |
| T718 |
/workspace/coverage/default/32.sram_ctrl_regwen.1083141393 |
|
|
Mar 03 01:16:55 PM PST 24 |
Mar 03 01:40:20 PM PST 24 |
60015395093 ps |
| T719 |
/workspace/coverage/default/36.sram_ctrl_smoke.4217756896 |
|
|
Mar 03 01:17:48 PM PST 24 |
Mar 03 01:20:01 PM PST 24 |
467442065 ps |
| T720 |
/workspace/coverage/default/49.sram_ctrl_executable.2092080589 |
|
|
Mar 03 01:20:50 PM PST 24 |
Mar 03 01:23:54 PM PST 24 |
23933594994 ps |
| T721 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2046052939 |
|
|
Mar 03 01:11:15 PM PST 24 |
Mar 03 01:14:13 PM PST 24 |
11765570253 ps |
| T722 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.844762975 |
|
|
Mar 03 01:13:39 PM PST 24 |
Mar 03 01:14:54 PM PST 24 |
12955763973 ps |
| T723 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.4073646328 |
|
|
Mar 03 01:10:38 PM PST 24 |
Mar 03 01:13:47 PM PST 24 |
12587699619 ps |
| T724 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2080365533 |
|
|
Mar 03 01:11:50 PM PST 24 |
Mar 03 01:14:22 PM PST 24 |
25844191706 ps |
| T725 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.653188677 |
|
|
Mar 03 01:18:17 PM PST 24 |
Mar 03 01:21:32 PM PST 24 |
2553390345 ps |
| T726 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.624552228 |
|
|
Mar 03 01:15:16 PM PST 24 |
Mar 03 01:20:39 PM PST 24 |
82437298204 ps |
| T727 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.2711447537 |
|
|
Mar 03 01:16:00 PM PST 24 |
Mar 03 01:21:58 PM PST 24 |
31963975448 ps |
| T728 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2597880944 |
|
|
Mar 03 01:20:01 PM PST 24 |
Mar 03 01:20:21 PM PST 24 |
667947190 ps |
| T729 |
/workspace/coverage/default/23.sram_ctrl_stress_all.2432226701 |
|
|
Mar 03 01:14:46 PM PST 24 |
Mar 03 02:30:02 PM PST 24 |
1932028156301 ps |
| T730 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.4270179550 |
|
|
Mar 03 01:18:31 PM PST 24 |
Mar 03 01:18:48 PM PST 24 |
1202756177 ps |
| T731 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2072611216 |
|
|
Mar 03 01:11:36 PM PST 24 |
Mar 03 01:12:37 PM PST 24 |
5276389896 ps |
| T732 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.3586328230 |
|
|
Mar 03 01:15:53 PM PST 24 |
Mar 03 01:15:56 PM PST 24 |
688153500 ps |
| T733 |
/workspace/coverage/default/20.sram_ctrl_regwen.2427777570 |
|
|
Mar 03 01:14:03 PM PST 24 |
Mar 03 01:33:26 PM PST 24 |
57574063595 ps |
| T734 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2600752179 |
|
|
Mar 03 01:13:02 PM PST 24 |
Mar 03 01:13:10 PM PST 24 |
262195986 ps |
| T735 |
/workspace/coverage/default/1.sram_ctrl_executable.592822343 |
|
|
Mar 03 01:10:18 PM PST 24 |
Mar 03 01:18:35 PM PST 24 |
7314332898 ps |
| T736 |
/workspace/coverage/default/38.sram_ctrl_regwen.1843404038 |
|
|
Mar 03 01:18:31 PM PST 24 |
Mar 03 01:33:14 PM PST 24 |
20455822353 ps |
| T737 |
/workspace/coverage/default/33.sram_ctrl_partial_access.4155850275 |
|
|
Mar 03 01:17:32 PM PST 24 |
Mar 03 01:19:19 PM PST 24 |
5257627792 ps |
| T738 |
/workspace/coverage/default/27.sram_ctrl_alert_test.1916760848 |
|
|
Mar 03 01:15:53 PM PST 24 |
Mar 03 01:15:54 PM PST 24 |
53694509 ps |
| T739 |
/workspace/coverage/default/16.sram_ctrl_partial_access.295550864 |
|
|
Mar 03 01:12:56 PM PST 24 |
Mar 03 01:13:00 PM PST 24 |
3443488131 ps |
| T740 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2181452093 |
|
|
Mar 03 01:10:28 PM PST 24 |
Mar 03 01:10:39 PM PST 24 |
1521857673 ps |
| T741 |
/workspace/coverage/default/46.sram_ctrl_smoke.2422199712 |
|
|
Mar 03 01:20:18 PM PST 24 |
Mar 03 01:20:28 PM PST 24 |
932570109 ps |
| T742 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.2875488349 |
|
|
Mar 03 01:13:36 PM PST 24 |
Mar 03 01:18:25 PM PST 24 |
28151158577 ps |
| T743 |
/workspace/coverage/default/40.sram_ctrl_partial_access.4004323203 |
|
|
Mar 03 01:18:53 PM PST 24 |
Mar 03 01:21:42 PM PST 24 |
1337080002 ps |
| T744 |
/workspace/coverage/default/40.sram_ctrl_executable.2996219679 |
|
|
Mar 03 01:19:02 PM PST 24 |
Mar 03 01:29:37 PM PST 24 |
10602362205 ps |
| T745 |
/workspace/coverage/default/41.sram_ctrl_bijection.54150949 |
|
|
Mar 03 01:19:10 PM PST 24 |
Mar 03 01:26:38 PM PST 24 |
12762224696 ps |
| T746 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.3378211325 |
|
|
Mar 03 01:16:30 PM PST 24 |
Mar 03 01:21:46 PM PST 24 |
62682037536 ps |
| T747 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.3437222228 |
|
|
Mar 03 01:12:41 PM PST 24 |
Mar 03 01:12:45 PM PST 24 |
1987386505 ps |
| T748 |
/workspace/coverage/default/6.sram_ctrl_partial_access.363523793 |
|
|
Mar 03 01:10:45 PM PST 24 |
Mar 03 01:12:58 PM PST 24 |
1044795535 ps |
| T749 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.824209477 |
|
|
Mar 03 01:10:35 PM PST 24 |
Mar 03 01:13:09 PM PST 24 |
7186743980 ps |
| T750 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.582071626 |
|
|
Mar 03 01:10:46 PM PST 24 |
Mar 03 01:11:10 PM PST 24 |
1103880463 ps |
| T751 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2549170936 |
|
|
Mar 03 01:12:27 PM PST 24 |
Mar 03 02:08:07 PM PST 24 |
74029760918 ps |
| T752 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.993136904 |
|
|
Mar 03 01:18:24 PM PST 24 |
Mar 03 01:32:12 PM PST 24 |
7811859197 ps |
| T753 |
/workspace/coverage/default/26.sram_ctrl_regwen.237639237 |
|
|
Mar 03 01:15:30 PM PST 24 |
Mar 03 01:15:59 PM PST 24 |
2666663540 ps |
| T754 |
/workspace/coverage/default/12.sram_ctrl_smoke.2999298788 |
|
|
Mar 03 01:11:33 PM PST 24 |
Mar 03 01:11:42 PM PST 24 |
861687879 ps |
| T755 |
/workspace/coverage/default/2.sram_ctrl_stress_all.1140818033 |
|
|
Mar 03 01:10:28 PM PST 24 |
Mar 03 01:38:31 PM PST 24 |
34971526717 ps |
| T756 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.1122350881 |
|
|
Mar 03 01:10:37 PM PST 24 |
Mar 03 01:10:42 PM PST 24 |
443469336 ps |
| T757 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1278482812 |
|
|
Mar 03 01:11:22 PM PST 24 |
Mar 03 01:13:32 PM PST 24 |
6462942804 ps |
| T758 |
/workspace/coverage/default/32.sram_ctrl_executable.352285663 |
|
|
Mar 03 01:16:55 PM PST 24 |
Mar 03 01:31:27 PM PST 24 |
15165360938 ps |
| T759 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3064817358 |
|
|
Mar 03 01:20:59 PM PST 24 |
Mar 03 01:27:58 PM PST 24 |
11279888031 ps |
| T760 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1631313358 |
|
|
Mar 03 01:19:46 PM PST 24 |
Mar 03 01:20:17 PM PST 24 |
17255149572 ps |
| T761 |
/workspace/coverage/default/47.sram_ctrl_alert_test.262779229 |
|
|
Mar 03 01:20:38 PM PST 24 |
Mar 03 01:20:39 PM PST 24 |
40354487 ps |
| T762 |
/workspace/coverage/default/46.sram_ctrl_bijection.1225974143 |
|
|
Mar 03 01:20:16 PM PST 24 |
Mar 03 01:53:14 PM PST 24 |
122195690265 ps |
| T763 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3896796309 |
|
|
Mar 03 01:19:40 PM PST 24 |
Mar 03 01:21:47 PM PST 24 |
1551882061 ps |
| T764 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1849628022 |
|
|
Mar 03 01:20:38 PM PST 24 |
Mar 03 01:23:09 PM PST 24 |
10182096255 ps |
| T765 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3671600356 |
|
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Mar 03 01:12:28 PM PST 24 |
Mar 03 01:20:05 PM PST 24 |
4210939799 ps |
| T766 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1629531432 |
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|
Mar 03 01:11:56 PM PST 24 |
Mar 03 01:15:03 PM PST 24 |
3341911698 ps |
| T767 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3067482185 |
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|
Mar 03 01:14:10 PM PST 24 |
Mar 03 01:14:41 PM PST 24 |
25140944158 ps |
| T768 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.137094195 |
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Mar 03 01:11:34 PM PST 24 |
Mar 03 01:16:27 PM PST 24 |
57399641731 ps |
| T769 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1708412701 |
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|
Mar 03 01:19:54 PM PST 24 |
Mar 03 01:20:19 PM PST 24 |
1800244762 ps |
| T770 |
/workspace/coverage/default/11.sram_ctrl_bijection.2695252727 |
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Mar 03 01:11:27 PM PST 24 |
Mar 03 01:40:05 PM PST 24 |
119659955765 ps |
| T771 |
/workspace/coverage/default/45.sram_ctrl_alert_test.2745607506 |
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Mar 03 01:20:14 PM PST 24 |
Mar 03 01:20:15 PM PST 24 |
85046841 ps |
| T772 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4100324892 |
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|
Mar 03 12:35:25 PM PST 24 |
Mar 03 12:35:29 PM PST 24 |
153087538 ps |
| T773 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2383358899 |
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Mar 03 12:35:25 PM PST 24 |
Mar 03 12:35:29 PM PST 24 |
61397705 ps |
| T52 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3986714716 |
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Mar 03 12:35:28 PM PST 24 |
Mar 03 12:35:30 PM PST 24 |
38957373 ps |
| T53 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.423766583 |
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|
Mar 03 12:35:36 PM PST 24 |
Mar 03 12:36:24 PM PST 24 |
7333428310 ps |
| T100 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3990786641 |
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|
Mar 03 12:35:07 PM PST 24 |
Mar 03 12:35:10 PM PST 24 |
215857989 ps |
| T96 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.70420418 |
|
|
Mar 03 12:35:06 PM PST 24 |
Mar 03 12:35:08 PM PST 24 |
17236380 ps |
| T54 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1825322867 |
|
|
Mar 03 12:35:26 PM PST 24 |
Mar 03 12:35:27 PM PST 24 |
13171888 ps |
| T97 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1993202514 |
|
|
Mar 03 12:35:06 PM PST 24 |
Mar 03 12:35:08 PM PST 24 |
28761046 ps |
| T55 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2638591135 |
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Mar 03 12:35:26 PM PST 24 |
Mar 03 12:36:16 PM PST 24 |
7470742790 ps |
| T56 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.931836548 |
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Mar 03 12:35:10 PM PST 24 |
Mar 03 12:35:41 PM PST 24 |
30667862273 ps |
| T86 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3090826618 |
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Mar 03 12:35:11 PM PST 24 |
Mar 03 12:35:11 PM PST 24 |
48376843 ps |
| T774 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3244775650 |
|
|
Mar 03 12:35:16 PM PST 24 |
Mar 03 12:35:22 PM PST 24 |
364123035 ps |
| T775 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3797460151 |
|
|
Mar 03 12:35:30 PM PST 24 |
Mar 03 12:35:34 PM PST 24 |
479779501 ps |
| T98 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2203094784 |
|
|
Mar 03 12:35:25 PM PST 24 |
Mar 03 12:35:28 PM PST 24 |
88318567 ps |
| T101 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3149261389 |
|
|
Mar 03 12:35:03 PM PST 24 |
Mar 03 12:35:05 PM PST 24 |
816326009 ps |
| T57 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2919207114 |
|
|
Mar 03 12:35:07 PM PST 24 |
Mar 03 12:35:08 PM PST 24 |
20938250 ps |
| T87 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.681000377 |
|
|
Mar 03 12:35:37 PM PST 24 |
Mar 03 12:35:38 PM PST 24 |
54732968 ps |
| T102 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1695522926 |
|
|
Mar 03 12:35:02 PM PST 24 |
Mar 03 12:35:04 PM PST 24 |
100340270 ps |
| T776 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2924061391 |
|
|
Mar 03 12:35:05 PM PST 24 |
Mar 03 12:35:07 PM PST 24 |
29678358 ps |
| T777 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.77536191 |
|
|
Mar 03 12:35:06 PM PST 24 |
Mar 03 12:35:15 PM PST 24 |
256746322 ps |
| T58 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.4042736227 |
|
|
Mar 03 12:35:21 PM PST 24 |
Mar 03 12:35:21 PM PST 24 |
28984046 ps |
| T778 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3032338822 |
|
|
Mar 03 12:35:42 PM PST 24 |
Mar 03 12:35:45 PM PST 24 |
376015644 ps |
| T779 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.5091288 |
|
|
Mar 03 12:35:08 PM PST 24 |
Mar 03 12:35:13 PM PST 24 |
982502084 ps |
| T59 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.835091623 |
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Mar 03 12:35:30 PM PST 24 |
Mar 03 12:35:58 PM PST 24 |
13225676612 ps |