| T792 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.2085551109 |
|
|
Jun 22 05:22:00 PM PDT 24 |
Jun 22 05:23:27 PM PDT 24 |
52986931979 ps |
| T793 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2070863210 |
|
|
Jun 22 05:21:42 PM PDT 24 |
Jun 22 05:22:26 PM PDT 24 |
3170049595 ps |
| T794 |
/workspace/coverage/default/40.sram_ctrl_alert_test.1742722686 |
|
|
Jun 22 05:24:59 PM PDT 24 |
Jun 22 05:25:00 PM PDT 24 |
15892759 ps |
| T795 |
/workspace/coverage/default/29.sram_ctrl_stress_all.2672068814 |
|
|
Jun 22 05:23:12 PM PDT 24 |
Jun 22 06:20:45 PM PDT 24 |
32316266907 ps |
| T796 |
/workspace/coverage/default/24.sram_ctrl_partial_access.2495176157 |
|
|
Jun 22 05:22:09 PM PDT 24 |
Jun 22 05:22:22 PM PDT 24 |
488997923 ps |
| T797 |
/workspace/coverage/default/49.sram_ctrl_partial_access.941661702 |
|
|
Jun 22 05:26:42 PM PDT 24 |
Jun 22 05:27:20 PM PDT 24 |
699544840 ps |
| T798 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.643785478 |
|
|
Jun 22 05:25:19 PM PDT 24 |
Jun 22 05:30:51 PM PDT 24 |
21768823148 ps |
| T799 |
/workspace/coverage/default/4.sram_ctrl_bijection.2571288956 |
|
|
Jun 22 05:20:30 PM PDT 24 |
Jun 22 05:55:40 PM PDT 24 |
407021705150 ps |
| T800 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2218882731 |
|
|
Jun 22 05:26:13 PM PDT 24 |
Jun 22 05:26:29 PM PDT 24 |
2829026778 ps |
| T801 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.1635049795 |
|
|
Jun 22 05:24:58 PM PDT 24 |
Jun 22 05:26:34 PM PDT 24 |
5846674533 ps |
| T802 |
/workspace/coverage/default/43.sram_ctrl_stress_all.4255072818 |
|
|
Jun 22 05:25:32 PM PDT 24 |
Jun 22 06:26:59 PM PDT 24 |
60817254965 ps |
| T803 |
/workspace/coverage/default/27.sram_ctrl_regwen.2216678225 |
|
|
Jun 22 05:22:50 PM PDT 24 |
Jun 22 05:29:00 PM PDT 24 |
9555104855 ps |
| T804 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.143787119 |
|
|
Jun 22 05:25:19 PM PDT 24 |
Jun 22 05:28:01 PM PDT 24 |
20019635949 ps |
| T805 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3999643027 |
|
|
Jun 22 05:22:12 PM PDT 24 |
Jun 22 05:27:17 PM PDT 24 |
69347746710 ps |
| T806 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2871124314 |
|
|
Jun 22 05:25:47 PM PDT 24 |
Jun 22 05:46:33 PM PDT 24 |
11075818047 ps |
| T807 |
/workspace/coverage/default/4.sram_ctrl_alert_test.3751767748 |
|
|
Jun 22 05:20:31 PM PDT 24 |
Jun 22 05:20:32 PM PDT 24 |
14854678 ps |
| T808 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1467454980 |
|
|
Jun 22 05:20:46 PM PDT 24 |
Jun 22 05:23:29 PM PDT 24 |
10691891199 ps |
| T809 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.2275193235 |
|
|
Jun 22 05:23:05 PM PDT 24 |
Jun 22 05:23:58 PM PDT 24 |
8899866132 ps |
| T810 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2669199890 |
|
|
Jun 22 05:26:40 PM PDT 24 |
Jun 22 05:31:40 PM PDT 24 |
20519697741 ps |
| T811 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.3733972460 |
|
|
Jun 22 05:20:56 PM PDT 24 |
Jun 22 05:23:53 PM PDT 24 |
10040856419 ps |
| T812 |
/workspace/coverage/default/13.sram_ctrl_alert_test.4248092637 |
|
|
Jun 22 05:21:02 PM PDT 24 |
Jun 22 05:21:03 PM PDT 24 |
37592485 ps |
| T813 |
/workspace/coverage/default/31.sram_ctrl_executable.3102538548 |
|
|
Jun 22 05:23:33 PM PDT 24 |
Jun 22 05:34:03 PM PDT 24 |
33671962147 ps |
| T814 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3650925925 |
|
|
Jun 22 05:20:23 PM PDT 24 |
Jun 22 05:29:43 PM PDT 24 |
4590690010 ps |
| T815 |
/workspace/coverage/default/17.sram_ctrl_bijection.804400796 |
|
|
Jun 22 05:21:20 PM PDT 24 |
Jun 22 05:39:33 PM PDT 24 |
54359666612 ps |
| T816 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3847496690 |
|
|
Jun 22 05:24:59 PM PDT 24 |
Jun 22 05:30:37 PM PDT 24 |
11138062703 ps |
| T817 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.2920776016 |
|
|
Jun 22 05:21:45 PM PDT 24 |
Jun 22 05:21:52 PM PDT 24 |
2699847078 ps |
| T818 |
/workspace/coverage/default/5.sram_ctrl_regwen.1043147677 |
|
|
Jun 22 05:20:34 PM PDT 24 |
Jun 22 05:26:26 PM PDT 24 |
38718562287 ps |
| T819 |
/workspace/coverage/default/13.sram_ctrl_bijection.603858180 |
|
|
Jun 22 05:20:56 PM PDT 24 |
Jun 22 05:50:53 PM PDT 24 |
295179338896 ps |
| T820 |
/workspace/coverage/default/6.sram_ctrl_smoke.1339245024 |
|
|
Jun 22 05:20:35 PM PDT 24 |
Jun 22 05:20:45 PM PDT 24 |
716568628 ps |
| T821 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2322714044 |
|
|
Jun 22 05:22:09 PM PDT 24 |
Jun 22 05:26:35 PM PDT 24 |
29249270574 ps |
| T822 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.3292501044 |
|
|
Jun 22 05:20:33 PM PDT 24 |
Jun 22 05:35:07 PM PDT 24 |
15273713798 ps |
| T823 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.2387061527 |
|
|
Jun 22 05:21:34 PM PDT 24 |
Jun 22 05:31:26 PM PDT 24 |
32321115615 ps |
| T824 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.1572330822 |
|
|
Jun 22 05:22:25 PM PDT 24 |
Jun 22 05:22:48 PM PDT 24 |
3733858210 ps |
| T825 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1347163151 |
|
|
Jun 22 05:20:36 PM PDT 24 |
Jun 22 05:27:48 PM PDT 24 |
6617476545 ps |
| T826 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2769901161 |
|
|
Jun 22 05:24:09 PM PDT 24 |
Jun 22 05:28:37 PM PDT 24 |
28787722995 ps |
| T827 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.1618901021 |
|
|
Jun 22 05:25:18 PM PDT 24 |
Jun 22 05:27:52 PM PDT 24 |
791206497 ps |
| T828 |
/workspace/coverage/default/13.sram_ctrl_partial_access.1804656607 |
|
|
Jun 22 05:20:57 PM PDT 24 |
Jun 22 05:21:02 PM PDT 24 |
415312873 ps |
| T829 |
/workspace/coverage/default/15.sram_ctrl_alert_test.3629635886 |
|
|
Jun 22 05:21:12 PM PDT 24 |
Jun 22 05:21:13 PM PDT 24 |
11583593 ps |
| T830 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1767656042 |
|
|
Jun 22 05:20:34 PM PDT 24 |
Jun 22 05:47:46 PM PDT 24 |
23480277057 ps |
| T33 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.3701315647 |
|
|
Jun 22 05:20:24 PM PDT 24 |
Jun 22 05:20:28 PM PDT 24 |
419940873 ps |
| T831 |
/workspace/coverage/default/5.sram_ctrl_partial_access.1283095037 |
|
|
Jun 22 05:20:35 PM PDT 24 |
Jun 22 05:20:58 PM PDT 24 |
11272565881 ps |
| T832 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1411944004 |
|
|
Jun 22 05:26:42 PM PDT 24 |
Jun 22 05:26:50 PM PDT 24 |
3946657671 ps |
| T833 |
/workspace/coverage/default/13.sram_ctrl_smoke.2340181627 |
|
|
Jun 22 05:20:59 PM PDT 24 |
Jun 22 05:21:20 PM PDT 24 |
2295667179 ps |
| T834 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.2923062991 |
|
|
Jun 22 05:25:03 PM PDT 24 |
Jun 22 05:26:04 PM PDT 24 |
22156820692 ps |
| T835 |
/workspace/coverage/default/8.sram_ctrl_regwen.2674301346 |
|
|
Jun 22 05:20:44 PM PDT 24 |
Jun 22 05:35:53 PM PDT 24 |
11952614591 ps |
| T836 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.731090772 |
|
|
Jun 22 05:22:02 PM PDT 24 |
Jun 22 05:22:51 PM PDT 24 |
15498666914 ps |
| T837 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2436115672 |
|
|
Jun 22 05:20:38 PM PDT 24 |
Jun 22 06:21:04 PM PDT 24 |
259360793280 ps |
| T838 |
/workspace/coverage/default/20.sram_ctrl_bijection.2240978869 |
|
|
Jun 22 05:21:44 PM PDT 24 |
Jun 22 06:13:34 PM PDT 24 |
871055168341 ps |
| T839 |
/workspace/coverage/default/14.sram_ctrl_alert_test.1802509524 |
|
|
Jun 22 05:21:05 PM PDT 24 |
Jun 22 05:21:06 PM PDT 24 |
13596852 ps |
| T840 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.3490990859 |
|
|
Jun 22 05:22:27 PM PDT 24 |
Jun 22 05:25:16 PM PDT 24 |
2792445299 ps |
| T841 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2649041384 |
|
|
Jun 22 05:21:05 PM PDT 24 |
Jun 22 06:37:14 PM PDT 24 |
554819109272 ps |
| T842 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3487396427 |
|
|
Jun 22 05:22:12 PM PDT 24 |
Jun 22 05:23:03 PM PDT 24 |
8255139716 ps |
| T843 |
/workspace/coverage/default/12.sram_ctrl_regwen.20339917 |
|
|
Jun 22 05:20:59 PM PDT 24 |
Jun 22 05:40:19 PM PDT 24 |
14862829845 ps |
| T844 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.2975391802 |
|
|
Jun 22 05:20:23 PM PDT 24 |
Jun 22 05:24:07 PM PDT 24 |
33992611898 ps |
| T845 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.790461294 |
|
|
Jun 22 05:21:13 PM PDT 24 |
Jun 22 05:23:52 PM PDT 24 |
1607105457 ps |
| T846 |
/workspace/coverage/default/21.sram_ctrl_executable.932276299 |
|
|
Jun 22 05:21:50 PM PDT 24 |
Jun 22 05:38:28 PM PDT 24 |
20581961647 ps |
| T847 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1764960988 |
|
|
Jun 22 05:21:05 PM PDT 24 |
Jun 22 05:26:39 PM PDT 24 |
71351906746 ps |
| T848 |
/workspace/coverage/default/19.sram_ctrl_bijection.3964301397 |
|
|
Jun 22 05:21:35 PM PDT 24 |
Jun 22 05:55:14 PM PDT 24 |
29039841625 ps |
| T849 |
/workspace/coverage/default/38.sram_ctrl_stress_all.1379247503 |
|
|
Jun 22 05:24:36 PM PDT 24 |
Jun 22 05:49:40 PM PDT 24 |
69374864391 ps |
| T850 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1025833439 |
|
|
Jun 22 05:26:12 PM PDT 24 |
Jun 22 05:28:59 PM PDT 24 |
2386051732 ps |
| T851 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2408963838 |
|
|
Jun 22 05:20:23 PM PDT 24 |
Jun 22 05:51:00 PM PDT 24 |
21349671882 ps |
| T852 |
/workspace/coverage/default/27.sram_ctrl_alert_test.3756729739 |
|
|
Jun 22 05:22:49 PM PDT 24 |
Jun 22 05:22:50 PM PDT 24 |
39481042 ps |
| T853 |
/workspace/coverage/default/3.sram_ctrl_bijection.1085397550 |
|
|
Jun 22 05:20:22 PM PDT 24 |
Jun 22 05:31:06 PM PDT 24 |
9549547659 ps |
| T854 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1315700129 |
|
|
Jun 22 05:21:03 PM PDT 24 |
Jun 22 05:25:57 PM PDT 24 |
5418399946 ps |
| T855 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.3247143120 |
|
|
Jun 22 05:22:03 PM PDT 24 |
Jun 22 05:33:16 PM PDT 24 |
11614014738 ps |
| T856 |
/workspace/coverage/default/48.sram_ctrl_partial_access.3575870967 |
|
|
Jun 22 05:26:26 PM PDT 24 |
Jun 22 05:26:58 PM PDT 24 |
536573232 ps |
| T857 |
/workspace/coverage/default/26.sram_ctrl_bijection.1224409028 |
|
|
Jun 22 05:22:27 PM PDT 24 |
Jun 22 05:36:07 PM PDT 24 |
216546492061 ps |
| T858 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.2773587379 |
|
|
Jun 22 05:20:31 PM PDT 24 |
Jun 22 05:20:39 PM PDT 24 |
873962905 ps |
| T859 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.4004775890 |
|
|
Jun 22 05:23:33 PM PDT 24 |
Jun 22 05:23:59 PM PDT 24 |
2480565487 ps |
| T860 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.2210260590 |
|
|
Jun 22 05:22:13 PM PDT 24 |
Jun 22 05:23:18 PM PDT 24 |
4009103218 ps |
| T861 |
/workspace/coverage/default/49.sram_ctrl_regwen.15785773 |
|
|
Jun 22 05:26:46 PM PDT 24 |
Jun 22 05:41:11 PM PDT 24 |
15583028485 ps |
| T862 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3236464928 |
|
|
Jun 22 05:25:37 PM PDT 24 |
Jun 22 05:41:48 PM PDT 24 |
11347096254 ps |
| T863 |
/workspace/coverage/default/7.sram_ctrl_executable.1869393248 |
|
|
Jun 22 05:20:36 PM PDT 24 |
Jun 22 05:31:29 PM PDT 24 |
16042838278 ps |
| T864 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.2169237764 |
|
|
Jun 22 05:24:15 PM PDT 24 |
Jun 22 05:42:04 PM PDT 24 |
6345510312 ps |
| T865 |
/workspace/coverage/default/44.sram_ctrl_executable.3379909707 |
|
|
Jun 22 05:25:46 PM PDT 24 |
Jun 22 05:43:28 PM PDT 24 |
45025166202 ps |
| T866 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.3088122025 |
|
|
Jun 22 05:24:31 PM PDT 24 |
Jun 22 05:46:40 PM PDT 24 |
19814959997 ps |
| T867 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.3676557177 |
|
|
Jun 22 05:24:16 PM PDT 24 |
Jun 22 05:25:35 PM PDT 24 |
6284594302 ps |
| T868 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.953496511 |
|
|
Jun 22 05:21:59 PM PDT 24 |
Jun 22 05:24:04 PM PDT 24 |
1804615775 ps |
| T869 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2542348878 |
|
|
Jun 22 05:20:43 PM PDT 24 |
Jun 22 05:53:51 PM PDT 24 |
135945311513 ps |
| T870 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1831482020 |
|
|
Jun 22 05:20:48 PM PDT 24 |
Jun 22 05:24:21 PM PDT 24 |
6866768493 ps |
| T871 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.2565356664 |
|
|
Jun 22 05:22:42 PM PDT 24 |
Jun 22 05:30:08 PM PDT 24 |
6567938531 ps |
| T872 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1775309088 |
|
|
Jun 22 05:26:39 PM PDT 24 |
Jun 22 05:27:57 PM PDT 24 |
4717768106 ps |
| T873 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.549854516 |
|
|
Jun 22 05:20:35 PM PDT 24 |
Jun 22 05:23:25 PM PDT 24 |
14419072181 ps |
| T874 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.1228433265 |
|
|
Jun 22 05:23:12 PM PDT 24 |
Jun 22 05:29:54 PM PDT 24 |
44789858654 ps |
| T875 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3449904193 |
|
|
Jun 22 05:25:46 PM PDT 24 |
Jun 22 05:26:07 PM PDT 24 |
849484653 ps |
| T876 |
/workspace/coverage/default/30.sram_ctrl_alert_test.1974692185 |
|
|
Jun 22 05:23:24 PM PDT 24 |
Jun 22 05:23:25 PM PDT 24 |
114830461 ps |
| T877 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2106920943 |
|
|
Jun 22 05:20:34 PM PDT 24 |
Jun 22 05:21:24 PM PDT 24 |
6917465277 ps |
| T878 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3069982803 |
|
|
Jun 22 05:22:01 PM PDT 24 |
Jun 22 05:28:01 PM PDT 24 |
6114089412 ps |
| T879 |
/workspace/coverage/default/35.sram_ctrl_executable.2790164250 |
|
|
Jun 22 05:24:04 PM PDT 24 |
Jun 22 05:31:51 PM PDT 24 |
40426180433 ps |
| T880 |
/workspace/coverage/default/34.sram_ctrl_stress_all.2892707755 |
|
|
Jun 22 05:24:02 PM PDT 24 |
Jun 22 05:58:37 PM PDT 24 |
54123993914 ps |
| T881 |
/workspace/coverage/default/12.sram_ctrl_partial_access.2592502388 |
|
|
Jun 22 05:20:59 PM PDT 24 |
Jun 22 05:21:20 PM PDT 24 |
4492996706 ps |
| T882 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.931740641 |
|
|
Jun 22 05:20:37 PM PDT 24 |
Jun 22 05:26:24 PM PDT 24 |
29736246948 ps |
| T883 |
/workspace/coverage/default/37.sram_ctrl_smoke.32662558 |
|
|
Jun 22 05:24:16 PM PDT 24 |
Jun 22 05:24:53 PM PDT 24 |
798066107 ps |
| T884 |
/workspace/coverage/default/30.sram_ctrl_executable.476257545 |
|
|
Jun 22 05:23:17 PM PDT 24 |
Jun 22 05:53:11 PM PDT 24 |
32150595720 ps |
| T885 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1851741299 |
|
|
Jun 22 05:25:55 PM PDT 24 |
Jun 22 05:26:26 PM PDT 24 |
4611789529 ps |
| T886 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.310649026 |
|
|
Jun 22 05:22:02 PM PDT 24 |
Jun 22 05:41:19 PM PDT 24 |
24526495848 ps |
| T887 |
/workspace/coverage/default/39.sram_ctrl_alert_test.615845095 |
|
|
Jun 22 05:24:53 PM PDT 24 |
Jun 22 05:24:54 PM PDT 24 |
18340298 ps |
| T888 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.4284207416 |
|
|
Jun 22 05:22:00 PM PDT 24 |
Jun 22 05:22:04 PM PDT 24 |
1354888512 ps |
| T889 |
/workspace/coverage/default/25.sram_ctrl_bijection.4216316794 |
|
|
Jun 22 05:22:22 PM PDT 24 |
Jun 22 05:45:22 PM PDT 24 |
108663213180 ps |
| T890 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.225343863 |
|
|
Jun 22 05:22:21 PM PDT 24 |
Jun 22 05:24:27 PM PDT 24 |
2578480622 ps |
| T891 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2982761268 |
|
|
Jun 22 05:25:23 PM PDT 24 |
Jun 22 05:31:27 PM PDT 24 |
21827363568 ps |
| T892 |
/workspace/coverage/default/15.sram_ctrl_stress_all.3148413694 |
|
|
Jun 22 05:21:13 PM PDT 24 |
Jun 22 06:45:42 PM PDT 24 |
332568219593 ps |
| T893 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2344256702 |
|
|
Jun 22 05:25:20 PM PDT 24 |
Jun 22 05:25:40 PM PDT 24 |
458283291 ps |
| T894 |
/workspace/coverage/default/9.sram_ctrl_stress_all.2639334645 |
|
|
Jun 22 05:20:51 PM PDT 24 |
Jun 22 07:23:22 PM PDT 24 |
161598088909 ps |
| T895 |
/workspace/coverage/default/22.sram_ctrl_smoke.843198063 |
|
|
Jun 22 05:22:00 PM PDT 24 |
Jun 22 05:22:15 PM PDT 24 |
4188180627 ps |
| T896 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.3537127993 |
|
|
Jun 22 05:21:12 PM PDT 24 |
Jun 22 05:22:41 PM PDT 24 |
50315210751 ps |
| T897 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.2380068433 |
|
|
Jun 22 05:23:40 PM PDT 24 |
Jun 22 05:24:10 PM PDT 24 |
11757363536 ps |
| T898 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.3414500821 |
|
|
Jun 22 05:22:41 PM PDT 24 |
Jun 22 05:25:52 PM PDT 24 |
15089417291 ps |
| T899 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.106466307 |
|
|
Jun 22 05:24:58 PM PDT 24 |
Jun 22 05:25:02 PM PDT 24 |
1350851576 ps |
| T900 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1878109730 |
|
|
Jun 22 05:20:15 PM PDT 24 |
Jun 22 05:22:52 PM PDT 24 |
17954260524 ps |
| T901 |
/workspace/coverage/default/6.sram_ctrl_bijection.132161567 |
|
|
Jun 22 05:20:37 PM PDT 24 |
Jun 22 05:57:09 PM PDT 24 |
31816934490 ps |
| T902 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.4130351122 |
|
|
Jun 22 05:26:16 PM PDT 24 |
Jun 22 05:26:22 PM PDT 24 |
2777603725 ps |
| T903 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2175394027 |
|
|
Jun 22 05:20:58 PM PDT 24 |
Jun 22 05:26:21 PM PDT 24 |
14026435288 ps |
| T904 |
/workspace/coverage/default/29.sram_ctrl_partial_access.3947073262 |
|
|
Jun 22 05:23:05 PM PDT 24 |
Jun 22 05:23:29 PM PDT 24 |
6272870675 ps |
| T905 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2473129153 |
|
|
Jun 22 05:20:17 PM PDT 24 |
Jun 22 05:20:21 PM PDT 24 |
1409362426 ps |
| T906 |
/workspace/coverage/default/36.sram_ctrl_bijection.1685655727 |
|
|
Jun 22 05:24:11 PM PDT 24 |
Jun 22 05:36:15 PM PDT 24 |
84993184439 ps |
| T907 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.671910798 |
|
|
Jun 22 05:21:41 PM PDT 24 |
Jun 22 05:21:51 PM PDT 24 |
9511030900 ps |
| T908 |
/workspace/coverage/default/46.sram_ctrl_regwen.297753282 |
|
|
Jun 22 05:26:11 PM PDT 24 |
Jun 22 05:40:28 PM PDT 24 |
18384079679 ps |
| T909 |
/workspace/coverage/default/9.sram_ctrl_executable.1758327457 |
|
|
Jun 22 05:20:50 PM PDT 24 |
Jun 22 05:26:11 PM PDT 24 |
42396833804 ps |
| T910 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.34361321 |
|
|
Jun 22 05:21:12 PM PDT 24 |
Jun 22 05:40:00 PM PDT 24 |
19769069401 ps |
| T911 |
/workspace/coverage/default/10.sram_ctrl_partial_access.3088864887 |
|
|
Jun 22 05:20:56 PM PDT 24 |
Jun 22 05:21:11 PM PDT 24 |
841242473 ps |
| T912 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.23995881 |
|
|
Jun 22 05:20:30 PM PDT 24 |
Jun 22 05:34:46 PM PDT 24 |
27263274633 ps |
| T913 |
/workspace/coverage/default/16.sram_ctrl_executable.1219555611 |
|
|
Jun 22 05:21:19 PM PDT 24 |
Jun 22 05:45:13 PM PDT 24 |
54519755959 ps |
| T914 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2660538782 |
|
|
Jun 22 05:21:04 PM PDT 24 |
Jun 22 05:29:04 PM PDT 24 |
9409798792 ps |
| T915 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.240928970 |
|
|
Jun 22 05:20:44 PM PDT 24 |
Jun 22 05:21:39 PM PDT 24 |
1820901710 ps |
| T916 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.469734889 |
|
|
Jun 22 05:20:24 PM PDT 24 |
Jun 22 05:21:47 PM PDT 24 |
13393628999 ps |
| T917 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.3783776632 |
|
|
Jun 22 05:24:30 PM PDT 24 |
Jun 22 05:25:54 PM PDT 24 |
3002055066 ps |
| T918 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1294507069 |
|
|
Jun 22 05:23:40 PM PDT 24 |
Jun 22 05:24:19 PM PDT 24 |
5287798646 ps |
| T919 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3371232196 |
|
|
Jun 22 05:26:25 PM PDT 24 |
Jun 22 05:32:08 PM PDT 24 |
18128061857 ps |
| T920 |
/workspace/coverage/default/28.sram_ctrl_regwen.389858447 |
|
|
Jun 22 05:22:51 PM PDT 24 |
Jun 22 05:30:51 PM PDT 24 |
3650603909 ps |
| T921 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1069703469 |
|
|
Jun 22 05:20:28 PM PDT 24 |
Jun 22 05:20:54 PM PDT 24 |
795679635 ps |
| T922 |
/workspace/coverage/default/22.sram_ctrl_partial_access.1550233021 |
|
|
Jun 22 05:21:59 PM PDT 24 |
Jun 22 05:22:12 PM PDT 24 |
514781698 ps |
| T923 |
/workspace/coverage/default/18.sram_ctrl_partial_access.1739592918 |
|
|
Jun 22 05:21:32 PM PDT 24 |
Jun 22 05:22:34 PM PDT 24 |
3771521248 ps |
| T924 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.282341042 |
|
|
Jun 22 05:24:38 PM PDT 24 |
Jun 22 05:27:38 PM PDT 24 |
5796434166 ps |
| T925 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3231275315 |
|
|
Jun 22 05:23:29 PM PDT 24 |
Jun 22 05:24:15 PM PDT 24 |
15717540451 ps |
| T926 |
/workspace/coverage/default/28.sram_ctrl_partial_access.840040728 |
|
|
Jun 22 05:22:49 PM PDT 24 |
Jun 22 05:23:22 PM PDT 24 |
1224331310 ps |
| T927 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1891434704 |
|
|
Jun 22 05:20:55 PM PDT 24 |
Jun 22 05:20:59 PM PDT 24 |
581079392 ps |
| T928 |
/workspace/coverage/default/4.sram_ctrl_smoke.2231421007 |
|
|
Jun 22 05:20:31 PM PDT 24 |
Jun 22 05:20:46 PM PDT 24 |
2420672750 ps |
| T929 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3349706257 |
|
|
Jun 22 05:20:48 PM PDT 24 |
Jun 22 05:20:49 PM PDT 24 |
15185702 ps |
| T930 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.766940698 |
|
|
Jun 22 05:22:50 PM PDT 24 |
Jun 22 05:26:53 PM PDT 24 |
3681964805 ps |
| T931 |
/workspace/coverage/default/31.sram_ctrl_bijection.2480549769 |
|
|
Jun 22 05:23:23 PM PDT 24 |
Jun 22 05:40:05 PM PDT 24 |
43367892386 ps |
| T932 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1061341366 |
|
|
Jun 22 05:24:57 PM PDT 24 |
Jun 22 05:26:54 PM PDT 24 |
783389691 ps |
| T933 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2564080503 |
|
|
Jun 22 05:25:58 PM PDT 24 |
Jun 22 05:26:02 PM PDT 24 |
1402920949 ps |
| T934 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.406188103 |
|
|
Jun 22 05:20:33 PM PDT 24 |
Jun 22 05:45:49 PM PDT 24 |
254000322544 ps |
| T935 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.619923159 |
|
|
Jun 22 05:24:03 PM PDT 24 |
Jun 22 05:25:23 PM PDT 24 |
2475574238 ps |
| T936 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.1261390508 |
|
|
Jun 22 05:21:34 PM PDT 24 |
Jun 22 05:29:35 PM PDT 24 |
5544828035 ps |
| T937 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3507854775 |
|
|
Jun 22 05:20:49 PM PDT 24 |
Jun 22 05:21:22 PM PDT 24 |
4247201858 ps |
| T938 |
/workspace/coverage/default/10.sram_ctrl_executable.1305093008 |
|
|
Jun 22 05:20:58 PM PDT 24 |
Jun 22 05:34:48 PM PDT 24 |
31205923495 ps |
| T939 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2293871475 |
|
|
Jun 22 05:23:06 PM PDT 24 |
Jun 22 05:29:53 PM PDT 24 |
69559886613 ps |
| T67 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1225871730 |
|
|
Jun 22 04:48:21 PM PDT 24 |
Jun 22 04:48:22 PM PDT 24 |
84499988 ps |
| T63 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1871452731 |
|
|
Jun 22 04:48:23 PM PDT 24 |
Jun 22 04:48:25 PM PDT 24 |
217916442 ps |
| T68 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2675536732 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:48:26 PM PDT 24 |
14683180 ps |
| T76 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3565856088 |
|
|
Jun 22 04:48:11 PM PDT 24 |
Jun 22 04:48:12 PM PDT 24 |
22681424 ps |
| T940 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1998064540 |
|
|
Jun 22 04:48:34 PM PDT 24 |
Jun 22 04:48:39 PM PDT 24 |
2087272958 ps |
| T941 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3613436929 |
|
|
Jun 22 04:48:25 PM PDT 24 |
Jun 22 04:48:30 PM PDT 24 |
2296387201 ps |
| T77 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2820684971 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:48:25 PM PDT 24 |
231754721 ps |
| T942 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1784409312 |
|
|
Jun 22 04:48:29 PM PDT 24 |
Jun 22 04:48:33 PM PDT 24 |
88096717 ps |
| T78 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.45785664 |
|
|
Jun 22 04:48:33 PM PDT 24 |
Jun 22 04:49:34 PM PDT 24 |
32026454823 ps |
| T64 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.243001010 |
|
|
Jun 22 04:48:23 PM PDT 24 |
Jun 22 04:48:26 PM PDT 24 |
783322100 ps |
| T79 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.678465814 |
|
|
Jun 22 04:48:16 PM PDT 24 |
Jun 22 04:49:07 PM PDT 24 |
7394767763 ps |
| T943 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1755666473 |
|
|
Jun 22 04:48:17 PM PDT 24 |
Jun 22 04:48:21 PM PDT 24 |
349028753 ps |
| T944 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3815413314 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:48:28 PM PDT 24 |
169381539 ps |
| T80 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2358593297 |
|
|
Jun 22 04:48:38 PM PDT 24 |
Jun 22 04:49:06 PM PDT 24 |
3885947967 ps |
| T945 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2326557787 |
|
|
Jun 22 04:48:09 PM PDT 24 |
Jun 22 04:48:14 PM PDT 24 |
172842985 ps |
| T81 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2067321589 |
|
|
Jun 22 04:48:25 PM PDT 24 |
Jun 22 04:48:53 PM PDT 24 |
9882386899 ps |
| T82 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3505351727 |
|
|
Jun 22 04:48:14 PM PDT 24 |
Jun 22 04:49:24 PM PDT 24 |
54231456099 ps |
| T946 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2665078358 |
|
|
Jun 22 04:48:30 PM PDT 24 |
Jun 22 04:48:34 PM PDT 24 |
270284017 ps |
| T947 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1388066324 |
|
|
Jun 22 04:48:26 PM PDT 24 |
Jun 22 04:48:30 PM PDT 24 |
1647890933 ps |
| T948 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1667702234 |
|
|
Jun 22 04:48:10 PM PDT 24 |
Jun 22 04:48:14 PM PDT 24 |
368997290 ps |
| T949 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1400529750 |
|
|
Jun 22 04:48:35 PM PDT 24 |
Jun 22 04:48:39 PM PDT 24 |
370464064 ps |
| T950 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4250411841 |
|
|
Jun 22 04:48:16 PM PDT 24 |
Jun 22 04:48:19 PM PDT 24 |
28239608 ps |
| T65 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3828636583 |
|
|
Jun 22 04:48:13 PM PDT 24 |
Jun 22 04:48:15 PM PDT 24 |
740536769 ps |
| T99 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.371802147 |
|
|
Jun 22 04:48:27 PM PDT 24 |
Jun 22 04:48:28 PM PDT 24 |
37295031 ps |
| T951 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2075733287 |
|
|
Jun 22 04:48:23 PM PDT 24 |
Jun 22 04:48:25 PM PDT 24 |
99221797 ps |
| T952 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3803839529 |
|
|
Jun 22 04:48:25 PM PDT 24 |
Jun 22 04:48:28 PM PDT 24 |
125312848 ps |
| T953 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.527145461 |
|
|
Jun 22 04:48:07 PM PDT 24 |
Jun 22 04:48:09 PM PDT 24 |
233117038 ps |
| T100 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.71519480 |
|
|
Jun 22 04:49:26 PM PDT 24 |
Jun 22 04:49:27 PM PDT 24 |
36297125 ps |
| T113 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2727448851 |
|
|
Jun 22 04:48:30 PM PDT 24 |
Jun 22 04:48:33 PM PDT 24 |
340019482 ps |
| T83 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2755606155 |
|
|
Jun 22 04:48:13 PM PDT 24 |
Jun 22 04:48:45 PM PDT 24 |
36914970768 ps |
| T954 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.145145491 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:48:25 PM PDT 24 |
14621398 ps |
| T955 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1449869598 |
|
|
Jun 22 04:48:40 PM PDT 24 |
Jun 22 04:48:42 PM PDT 24 |
24540724 ps |
| T956 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1587321724 |
|
|
Jun 22 04:48:36 PM PDT 24 |
Jun 22 04:48:37 PM PDT 24 |
39673522 ps |
| T957 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3799129115 |
|
|
Jun 22 04:48:39 PM PDT 24 |
Jun 22 04:48:41 PM PDT 24 |
87742184 ps |
| T84 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3724581810 |
|
|
Jun 22 04:48:08 PM PDT 24 |
Jun 22 04:48:11 PM PDT 24 |
45816906 ps |
| T114 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1884995206 |
|
|
Jun 22 04:48:29 PM PDT 24 |
Jun 22 04:48:31 PM PDT 24 |
191512883 ps |
| T958 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1253571889 |
|
|
Jun 22 04:48:13 PM PDT 24 |
Jun 22 04:48:17 PM PDT 24 |
237570845 ps |
| T118 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3409441218 |
|
|
Jun 22 04:48:16 PM PDT 24 |
Jun 22 04:48:18 PM PDT 24 |
133075452 ps |
| T85 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1904229317 |
|
|
Jun 22 04:48:19 PM PDT 24 |
Jun 22 04:48:20 PM PDT 24 |
20629740 ps |
| T86 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.4226563021 |
|
|
Jun 22 04:48:06 PM PDT 24 |
Jun 22 04:49:02 PM PDT 24 |
29358383444 ps |
| T959 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3988143175 |
|
|
Jun 22 04:48:19 PM PDT 24 |
Jun 22 04:48:23 PM PDT 24 |
1432523991 ps |
| T960 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1548932898 |
|
|
Jun 22 04:48:34 PM PDT 24 |
Jun 22 04:48:35 PM PDT 24 |
24966632 ps |
| T961 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2718272161 |
|
|
Jun 22 04:48:10 PM PDT 24 |
Jun 22 04:48:11 PM PDT 24 |
15929760 ps |
| T962 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.315820904 |
|
|
Jun 22 04:48:40 PM PDT 24 |
Jun 22 04:49:09 PM PDT 24 |
10381423978 ps |
| T963 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.131827846 |
|
|
Jun 22 04:48:32 PM PDT 24 |
Jun 22 04:48:35 PM PDT 24 |
56076274 ps |
| T964 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2518794149 |
|
|
Jun 22 04:48:08 PM PDT 24 |
Jun 22 04:48:09 PM PDT 24 |
14362090 ps |
| T965 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2774421130 |
|
|
Jun 22 04:48:20 PM PDT 24 |
Jun 22 04:48:21 PM PDT 24 |
14303880 ps |
| T966 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.14533389 |
|
|
Jun 22 04:48:26 PM PDT 24 |
Jun 22 04:48:27 PM PDT 24 |
20805076 ps |
| T87 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.88441977 |
|
|
Jun 22 04:48:16 PM PDT 24 |
Jun 22 04:49:17 PM PDT 24 |
100564576362 ps |
| T967 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1729018002 |
|
|
Jun 22 04:48:17 PM PDT 24 |
Jun 22 04:48:18 PM PDT 24 |
12990800 ps |
| T88 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1971887576 |
|
|
Jun 22 04:48:30 PM PDT 24 |
Jun 22 04:49:23 PM PDT 24 |
14107498359 ps |
| T968 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1209859997 |
|
|
Jun 22 04:48:19 PM PDT 24 |
Jun 22 04:48:21 PM PDT 24 |
62409713 ps |
| T969 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2001338749 |
|
|
Jun 22 04:48:23 PM PDT 24 |
Jun 22 04:48:27 PM PDT 24 |
119800373 ps |
| T970 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2933471014 |
|
|
Jun 22 04:48:33 PM PDT 24 |
Jun 22 04:48:35 PM PDT 24 |
18631030 ps |
| T971 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1423848540 |
|
|
Jun 22 04:48:19 PM PDT 24 |
Jun 22 04:48:21 PM PDT 24 |
18243716 ps |
| T972 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3343497805 |
|
|
Jun 22 04:48:32 PM PDT 24 |
Jun 22 04:48:33 PM PDT 24 |
35849279 ps |
| T124 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2234365023 |
|
|
Jun 22 04:48:06 PM PDT 24 |
Jun 22 04:48:09 PM PDT 24 |
640316542 ps |
| T93 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3816649479 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:49:35 PM PDT 24 |
70490447727 ps |
| T973 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.893313183 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:48:25 PM PDT 24 |
18189126 ps |
| T974 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3769592322 |
|
|
Jun 22 04:48:26 PM PDT 24 |
Jun 22 04:48:27 PM PDT 24 |
63508468 ps |
| T975 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2923522442 |
|
|
Jun 22 04:48:39 PM PDT 24 |
Jun 22 04:48:45 PM PDT 24 |
234880074 ps |
| T976 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1067076235 |
|
|
Jun 22 04:48:25 PM PDT 24 |
Jun 22 04:48:31 PM PDT 24 |
740751798 ps |
| T115 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2176955147 |
|
|
Jun 22 04:48:16 PM PDT 24 |
Jun 22 04:48:20 PM PDT 24 |
1797831614 ps |
| T977 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2322052166 |
|
|
Jun 22 04:48:10 PM PDT 24 |
Jun 22 04:48:14 PM PDT 24 |
734850648 ps |
| T116 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1088421411 |
|
|
Jun 22 04:48:34 PM PDT 24 |
Jun 22 04:48:36 PM PDT 24 |
236249275 ps |
| T978 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2368871651 |
|
|
Jun 22 04:48:14 PM PDT 24 |
Jun 22 04:48:15 PM PDT 24 |
42711680 ps |
| T98 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2909491220 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:48:26 PM PDT 24 |
61858482 ps |
| T979 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2420985418 |
|
|
Jun 22 04:48:40 PM PDT 24 |
Jun 22 04:48:47 PM PDT 24 |
1465520563 ps |
| T980 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2022283389 |
|
|
Jun 22 04:48:09 PM PDT 24 |
Jun 22 04:49:03 PM PDT 24 |
7229690008 ps |
| T981 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3957729638 |
|
|
Jun 22 04:48:30 PM PDT 24 |
Jun 22 04:48:34 PM PDT 24 |
41251493 ps |
| T982 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2041655894 |
|
|
Jun 22 04:48:22 PM PDT 24 |
Jun 22 04:48:25 PM PDT 24 |
351352261 ps |
| T983 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.697588302 |
|
|
Jun 22 04:48:13 PM PDT 24 |
Jun 22 04:48:14 PM PDT 24 |
18494386 ps |
| T984 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.4174841745 |
|
|
Jun 22 04:48:17 PM PDT 24 |
Jun 22 04:48:20 PM PDT 24 |
62161671 ps |
| T985 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2715149789 |
|
|
Jun 22 04:48:18 PM PDT 24 |
Jun 22 04:48:22 PM PDT 24 |
380525248 ps |
| T986 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.6186276 |
|
|
Jun 22 04:48:11 PM PDT 24 |
Jun 22 04:48:13 PM PDT 24 |
310186031 ps |
| T987 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3917131144 |
|
|
Jun 22 04:48:13 PM PDT 24 |
Jun 22 04:48:15 PM PDT 24 |
16135023 ps |
| T988 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1129790596 |
|
|
Jun 22 04:48:10 PM PDT 24 |
Jun 22 04:48:11 PM PDT 24 |
115683068 ps |
| T989 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.330538744 |
|
|
Jun 22 04:48:40 PM PDT 24 |
Jun 22 04:49:35 PM PDT 24 |
14833654986 ps |
| T119 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3691224061 |
|
|
Jun 22 04:48:38 PM PDT 24 |
Jun 22 04:48:41 PM PDT 24 |
265335189 ps |
| T990 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1307664084 |
|
|
Jun 22 04:48:19 PM PDT 24 |
Jun 22 04:48:23 PM PDT 24 |
731865607 ps |
| T991 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2293784917 |
|
|
Jun 22 04:48:32 PM PDT 24 |
Jun 22 04:49:01 PM PDT 24 |
13221476343 ps |
| T125 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.579907091 |
|
|
Jun 22 04:48:12 PM PDT 24 |
Jun 22 04:48:14 PM PDT 24 |
265441937 ps |
| T94 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2058237000 |
|
|
Jun 22 04:48:14 PM PDT 24 |
Jun 22 04:48:17 PM PDT 24 |
837953042 ps |
| T992 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.240943167 |
|
|
Jun 22 04:48:13 PM PDT 24 |
Jun 22 04:48:14 PM PDT 24 |
14311720 ps |
| T95 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3282512793 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:49:17 PM PDT 24 |
7417332076 ps |
| T993 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.471455634 |
|
|
Jun 22 04:48:25 PM PDT 24 |
Jun 22 04:48:28 PM PDT 24 |
133871520 ps |
| T994 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.339154664 |
|
|
Jun 22 04:48:30 PM PDT 24 |
Jun 22 04:48:31 PM PDT 24 |
23543047 ps |
| T995 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3042895485 |
|
|
Jun 22 04:48:39 PM PDT 24 |
Jun 22 04:48:43 PM PDT 24 |
246308989 ps |
| T996 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3158585008 |
|
|
Jun 22 04:48:15 PM PDT 24 |
Jun 22 04:48:16 PM PDT 24 |
20878106 ps |
| T997 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4092704740 |
|
|
Jun 22 04:48:18 PM PDT 24 |
Jun 22 04:48:24 PM PDT 24 |
1797273710 ps |
| T96 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.164820004 |
|
|
Jun 22 04:48:19 PM PDT 24 |
Jun 22 04:49:18 PM PDT 24 |
29317307181 ps |
| T998 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4145615130 |
|
|
Jun 22 04:48:09 PM PDT 24 |
Jun 22 04:48:10 PM PDT 24 |
31906655 ps |
| T999 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2198718045 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:48:29 PM PDT 24 |
1276359136 ps |
| T1000 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2387992857 |
|
|
Jun 22 04:48:17 PM PDT 24 |
Jun 22 04:48:18 PM PDT 24 |
16286848 ps |
| T1001 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1272227219 |
|
|
Jun 22 04:48:09 PM PDT 24 |
Jun 22 04:48:10 PM PDT 24 |
14728759 ps |
| T1002 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.204392068 |
|
|
Jun 22 04:48:16 PM PDT 24 |
Jun 22 04:48:21 PM PDT 24 |
167090557 ps |
| T1003 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2955494137 |
|
|
Jun 22 04:48:32 PM PDT 24 |
Jun 22 04:48:36 PM PDT 24 |
128525127 ps |
| T1004 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2960936477 |
|
|
Jun 22 04:48:16 PM PDT 24 |
Jun 22 04:48:17 PM PDT 24 |
24056418 ps |
| T1005 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.4196725747 |
|
|
Jun 22 04:48:40 PM PDT 24 |
Jun 22 04:48:45 PM PDT 24 |
346879752 ps |
| T1006 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3105433273 |
|
|
Jun 22 04:48:24 PM PDT 24 |
Jun 22 04:48:29 PM PDT 24 |
365079007 ps |
| T1007 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4077628786 |
|
|
Jun 22 04:48:19 PM PDT 24 |
Jun 22 04:48:21 PM PDT 24 |
19975109 ps |