Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::lc_escalation_idle_cg
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Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::lc_escalation_idle_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sram_ctrl_env_0.1/sram_ctrl_env_cov.sv



Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::lc_escalation_idle_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::lc_escalation_idle_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
lc_escalation_idle_cp 2 0 2 100.00 100 1 1 2


Summary for Variable lc_escalation_idle_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for lc_escalation_idle_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1973 1 T9 9 T10 86 T11 14
auto[1] 290 1 T9 2 T10 1 T11 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%