Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::access_during_key_req_cg
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Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::access_during_key_req_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::access_during_key_req_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
access_during_key_req_cp 2 0 2 100.00 100 1 1 0


Summary for Variable access_during_key_req_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for access_during_key_req_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
read 19196 1 T42 30 T25 34 T43 910
write 23859 1 T42 24 T24 15 T25 92

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%