| T794 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3027641188 |
|
|
Jul 13 07:02:49 PM PDT 24 |
Jul 13 07:07:12 PM PDT 24 |
3973491997 ps |
| T795 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.3068299930 |
|
|
Jul 13 07:05:35 PM PDT 24 |
Jul 13 07:05:40 PM PDT 24 |
509385349 ps |
| T796 |
/workspace/coverage/default/7.sram_ctrl_alert_test.1485620398 |
|
|
Jul 13 07:02:27 PM PDT 24 |
Jul 13 07:02:29 PM PDT 24 |
14741533 ps |
| T797 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.234974995 |
|
|
Jul 13 07:05:47 PM PDT 24 |
Jul 13 07:06:19 PM PDT 24 |
2847125898 ps |
| T798 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2269210621 |
|
|
Jul 13 07:02:40 PM PDT 24 |
Jul 13 07:05:17 PM PDT 24 |
18248037882 ps |
| T799 |
/workspace/coverage/default/10.sram_ctrl_alert_test.3340973230 |
|
|
Jul 13 07:02:37 PM PDT 24 |
Jul 13 07:02:40 PM PDT 24 |
10816158 ps |
| T800 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.796712122 |
|
|
Jul 13 07:04:36 PM PDT 24 |
Jul 13 07:08:38 PM PDT 24 |
22929906950 ps |
| T801 |
/workspace/coverage/default/40.sram_ctrl_smoke.1003599934 |
|
|
Jul 13 07:05:27 PM PDT 24 |
Jul 13 07:05:35 PM PDT 24 |
2352624912 ps |
| T802 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2120783292 |
|
|
Jul 13 07:06:14 PM PDT 24 |
Jul 13 07:07:17 PM PDT 24 |
136184883400 ps |
| T803 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1915536093 |
|
|
Jul 13 07:06:13 PM PDT 24 |
Jul 13 07:06:17 PM PDT 24 |
367367867 ps |
| T804 |
/workspace/coverage/default/35.sram_ctrl_executable.308164551 |
|
|
Jul 13 07:04:53 PM PDT 24 |
Jul 13 07:21:37 PM PDT 24 |
64524132497 ps |
| T805 |
/workspace/coverage/default/15.sram_ctrl_smoke.2810742492 |
|
|
Jul 13 07:02:46 PM PDT 24 |
Jul 13 07:03:09 PM PDT 24 |
1439407110 ps |
| T806 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.3258871843 |
|
|
Jul 13 07:05:03 PM PDT 24 |
Jul 13 07:05:57 PM PDT 24 |
764215029 ps |
| T807 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3203078620 |
|
|
Jul 13 07:03:50 PM PDT 24 |
Jul 13 07:04:05 PM PDT 24 |
1423101266 ps |
| T808 |
/workspace/coverage/default/33.sram_ctrl_partial_access.1414245256 |
|
|
Jul 13 07:04:39 PM PDT 24 |
Jul 13 07:04:59 PM PDT 24 |
630896355 ps |
| T809 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2157193156 |
|
|
Jul 13 07:04:44 PM PDT 24 |
Jul 13 07:24:39 PM PDT 24 |
13248632644 ps |
| T810 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.4098534998 |
|
|
Jul 13 07:02:53 PM PDT 24 |
Jul 13 07:06:48 PM PDT 24 |
4276015947 ps |
| T811 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2429722289 |
|
|
Jul 13 07:02:29 PM PDT 24 |
Jul 13 07:07:28 PM PDT 24 |
13665072659 ps |
| T812 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.1943279763 |
|
|
Jul 13 07:05:20 PM PDT 24 |
Jul 13 07:08:13 PM PDT 24 |
10455454771 ps |
| T813 |
/workspace/coverage/default/24.sram_ctrl_regwen.2745392893 |
|
|
Jul 13 07:03:41 PM PDT 24 |
Jul 13 07:07:31 PM PDT 24 |
2264267850 ps |
| T814 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.1761355042 |
|
|
Jul 13 07:03:58 PM PDT 24 |
Jul 13 07:06:21 PM PDT 24 |
2618051375 ps |
| T815 |
/workspace/coverage/default/3.sram_ctrl_smoke.430159889 |
|
|
Jul 13 07:02:18 PM PDT 24 |
Jul 13 07:02:48 PM PDT 24 |
1033443809 ps |
| T816 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2364376267 |
|
|
Jul 13 07:05:56 PM PDT 24 |
Jul 13 07:12:35 PM PDT 24 |
10807510254 ps |
| T817 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.27026797 |
|
|
Jul 13 07:03:29 PM PDT 24 |
Jul 13 07:03:47 PM PDT 24 |
2812487725 ps |
| T818 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.223218801 |
|
|
Jul 13 07:03:29 PM PDT 24 |
Jul 13 07:06:37 PM PDT 24 |
43080159245 ps |
| T819 |
/workspace/coverage/default/13.sram_ctrl_smoke.4254660822 |
|
|
Jul 13 07:02:44 PM PDT 24 |
Jul 13 07:03:52 PM PDT 24 |
5642382164 ps |
| T820 |
/workspace/coverage/default/28.sram_ctrl_alert_test.187829020 |
|
|
Jul 13 07:03:59 PM PDT 24 |
Jul 13 07:04:00 PM PDT 24 |
14619429 ps |
| T821 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.3889187679 |
|
|
Jul 13 07:04:52 PM PDT 24 |
Jul 13 07:08:46 PM PDT 24 |
4944230656 ps |
| T822 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3477068574 |
|
|
Jul 13 07:02:28 PM PDT 24 |
Jul 13 07:05:01 PM PDT 24 |
2498336151 ps |
| T823 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.722482561 |
|
|
Jul 13 07:03:19 PM PDT 24 |
Jul 13 07:04:58 PM PDT 24 |
15127307096 ps |
| T824 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1425744652 |
|
|
Jul 13 07:04:06 PM PDT 24 |
Jul 13 07:05:12 PM PDT 24 |
1475226202 ps |
| T825 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.213365720 |
|
|
Jul 13 07:01:57 PM PDT 24 |
Jul 13 07:03:04 PM PDT 24 |
36294119355 ps |
| T826 |
/workspace/coverage/default/5.sram_ctrl_bijection.3526134581 |
|
|
Jul 13 07:02:15 PM PDT 24 |
Jul 13 07:16:52 PM PDT 24 |
67416029182 ps |
| T827 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.4100003743 |
|
|
Jul 13 07:05:36 PM PDT 24 |
Jul 13 07:08:15 PM PDT 24 |
767878107 ps |
| T828 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.3175934661 |
|
|
Jul 13 07:02:28 PM PDT 24 |
Jul 13 07:08:17 PM PDT 24 |
42223733160 ps |
| T829 |
/workspace/coverage/default/11.sram_ctrl_smoke.1950568894 |
|
|
Jul 13 07:02:38 PM PDT 24 |
Jul 13 07:02:59 PM PDT 24 |
891552071 ps |
| T830 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.2148603966 |
|
|
Jul 13 07:03:53 PM PDT 24 |
Jul 13 07:05:59 PM PDT 24 |
34158172421 ps |
| T831 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.1302344579 |
|
|
Jul 13 07:02:54 PM PDT 24 |
Jul 13 07:05:00 PM PDT 24 |
2001010135 ps |
| T832 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1746141283 |
|
|
Jul 13 07:06:21 PM PDT 24 |
Jul 13 07:06:22 PM PDT 24 |
37658544 ps |
| T833 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1813143178 |
|
|
Jul 13 07:02:29 PM PDT 24 |
Jul 13 07:03:45 PM PDT 24 |
1390734973 ps |
| T834 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2394889364 |
|
|
Jul 13 07:01:59 PM PDT 24 |
Jul 13 07:16:56 PM PDT 24 |
31931970080 ps |
| T835 |
/workspace/coverage/default/42.sram_ctrl_alert_test.2140042884 |
|
|
Jul 13 07:05:55 PM PDT 24 |
Jul 13 07:05:57 PM PDT 24 |
14163750 ps |
| T836 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.39468341 |
|
|
Jul 13 07:05:25 PM PDT 24 |
Jul 13 07:14:04 PM PDT 24 |
7293525074 ps |
| T837 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.1476859477 |
|
|
Jul 13 07:04:26 PM PDT 24 |
Jul 13 07:26:58 PM PDT 24 |
20267496883 ps |
| T838 |
/workspace/coverage/default/49.sram_ctrl_regwen.3032332822 |
|
|
Jul 13 07:07:04 PM PDT 24 |
Jul 13 07:20:16 PM PDT 24 |
8777793394 ps |
| T839 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.3785989702 |
|
|
Jul 13 07:02:08 PM PDT 24 |
Jul 13 07:18:46 PM PDT 24 |
42448166000 ps |
| T840 |
/workspace/coverage/default/35.sram_ctrl_smoke.162161777 |
|
|
Jul 13 07:04:53 PM PDT 24 |
Jul 13 07:05:14 PM PDT 24 |
583018070 ps |
| T841 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.290722005 |
|
|
Jul 13 07:06:37 PM PDT 24 |
Jul 13 07:09:20 PM PDT 24 |
3136731306 ps |
| T842 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.2035936093 |
|
|
Jul 13 07:02:30 PM PDT 24 |
Jul 13 07:04:18 PM PDT 24 |
780166248 ps |
| T843 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2916394230 |
|
|
Jul 13 07:06:46 PM PDT 24 |
Jul 13 07:21:44 PM PDT 24 |
25247997094 ps |
| T844 |
/workspace/coverage/default/17.sram_ctrl_stress_all.858601319 |
|
|
Jul 13 07:03:04 PM PDT 24 |
Jul 13 08:00:53 PM PDT 24 |
33554878569 ps |
| T845 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1041691984 |
|
|
Jul 13 07:02:50 PM PDT 24 |
Jul 13 07:07:36 PM PDT 24 |
4997018632 ps |
| T846 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.109390497 |
|
|
Jul 13 07:03:42 PM PDT 24 |
Jul 13 07:06:41 PM PDT 24 |
9102900882 ps |
| T847 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.996599387 |
|
|
Jul 13 07:04:01 PM PDT 24 |
Jul 13 07:11:06 PM PDT 24 |
59796553288 ps |
| T848 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3980262136 |
|
|
Jul 13 07:05:19 PM PDT 24 |
Jul 13 07:05:33 PM PDT 24 |
1041936643 ps |
| T849 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3028269844 |
|
|
Jul 13 07:04:37 PM PDT 24 |
Jul 13 07:06:30 PM PDT 24 |
1538832547 ps |
| T850 |
/workspace/coverage/default/47.sram_ctrl_smoke.3832742894 |
|
|
Jul 13 07:06:31 PM PDT 24 |
Jul 13 07:06:54 PM PDT 24 |
1860065118 ps |
| T851 |
/workspace/coverage/default/4.sram_ctrl_bijection.2143161533 |
|
|
Jul 13 07:02:17 PM PDT 24 |
Jul 13 07:29:08 PM PDT 24 |
72301847677 ps |
| T852 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.1678996313 |
|
|
Jul 13 07:02:45 PM PDT 24 |
Jul 13 07:02:50 PM PDT 24 |
345339407 ps |
| T853 |
/workspace/coverage/default/37.sram_ctrl_alert_test.2663401379 |
|
|
Jul 13 07:05:10 PM PDT 24 |
Jul 13 07:05:11 PM PDT 24 |
66651552 ps |
| T854 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2248420588 |
|
|
Jul 13 07:02:29 PM PDT 24 |
Jul 13 07:02:58 PM PDT 24 |
3846908647 ps |
| T855 |
/workspace/coverage/default/10.sram_ctrl_partial_access.4080707457 |
|
|
Jul 13 07:02:39 PM PDT 24 |
Jul 13 07:04:44 PM PDT 24 |
974260678 ps |
| T856 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.540020139 |
|
|
Jul 13 07:07:06 PM PDT 24 |
Jul 13 07:08:29 PM PDT 24 |
775264748 ps |
| T857 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.2653408653 |
|
|
Jul 13 07:05:34 PM PDT 24 |
Jul 13 07:08:00 PM PDT 24 |
2661707040 ps |
| T858 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3095959987 |
|
|
Jul 13 07:05:36 PM PDT 24 |
Jul 13 07:13:37 PM PDT 24 |
78161232856 ps |
| T859 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.4093770761 |
|
|
Jul 13 07:02:10 PM PDT 24 |
Jul 13 07:03:31 PM PDT 24 |
788184891 ps |
| T860 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.650278140 |
|
|
Jul 13 07:07:03 PM PDT 24 |
Jul 13 07:16:02 PM PDT 24 |
17552542569 ps |
| T861 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.1198996810 |
|
|
Jul 13 07:03:28 PM PDT 24 |
Jul 13 07:07:59 PM PDT 24 |
43041634540 ps |
| T862 |
/workspace/coverage/default/20.sram_ctrl_regwen.1268460254 |
|
|
Jul 13 07:03:10 PM PDT 24 |
Jul 13 07:19:47 PM PDT 24 |
62540848927 ps |
| T863 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.959744959 |
|
|
Jul 13 07:04:27 PM PDT 24 |
Jul 13 07:31:05 PM PDT 24 |
25197864805 ps |
| T864 |
/workspace/coverage/default/23.sram_ctrl_executable.2523420450 |
|
|
Jul 13 07:03:30 PM PDT 24 |
Jul 13 07:12:48 PM PDT 24 |
55235958938 ps |
| T865 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.945517446 |
|
|
Jul 13 07:03:57 PM PDT 24 |
Jul 13 07:09:03 PM PDT 24 |
8755084707 ps |
| T866 |
/workspace/coverage/default/3.sram_ctrl_executable.457868939 |
|
|
Jul 13 07:02:14 PM PDT 24 |
Jul 13 07:03:37 PM PDT 24 |
14228864985 ps |
| T867 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3382957977 |
|
|
Jul 13 07:02:45 PM PDT 24 |
Jul 13 07:07:15 PM PDT 24 |
4108376559 ps |
| T868 |
/workspace/coverage/default/6.sram_ctrl_smoke.1230404141 |
|
|
Jul 13 07:02:27 PM PDT 24 |
Jul 13 07:02:39 PM PDT 24 |
4323574147 ps |
| T869 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1710227633 |
|
|
Jul 13 07:07:04 PM PDT 24 |
Jul 13 08:03:57 PM PDT 24 |
50686560505 ps |
| T870 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.2665042901 |
|
|
Jul 13 07:03:53 PM PDT 24 |
Jul 13 07:09:57 PM PDT 24 |
71783754216 ps |
| T871 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.845146531 |
|
|
Jul 13 07:02:35 PM PDT 24 |
Jul 13 07:15:53 PM PDT 24 |
26619388821 ps |
| T872 |
/workspace/coverage/default/1.sram_ctrl_alert_test.483283963 |
|
|
Jul 13 07:02:06 PM PDT 24 |
Jul 13 07:02:08 PM PDT 24 |
14389731 ps |
| T873 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2178721277 |
|
|
Jul 13 07:07:04 PM PDT 24 |
Jul 13 07:07:28 PM PDT 24 |
1411262116 ps |
| T874 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.981692800 |
|
|
Jul 13 07:02:26 PM PDT 24 |
Jul 13 07:03:15 PM PDT 24 |
15764618596 ps |
| T29 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.978873277 |
|
|
Jul 13 07:02:15 PM PDT 24 |
Jul 13 07:02:19 PM PDT 24 |
351139646 ps |
| T875 |
/workspace/coverage/default/13.sram_ctrl_bijection.2778878582 |
|
|
Jul 13 07:02:36 PM PDT 24 |
Jul 13 07:16:52 PM PDT 24 |
48538669530 ps |
| T876 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.4072202142 |
|
|
Jul 13 07:04:52 PM PDT 24 |
Jul 13 07:07:18 PM PDT 24 |
1644889716 ps |
| T877 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.3658367935 |
|
|
Jul 13 07:03:00 PM PDT 24 |
Jul 13 07:03:04 PM PDT 24 |
1351045281 ps |
| T878 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.3218330535 |
|
|
Jul 13 07:04:08 PM PDT 24 |
Jul 13 07:04:13 PM PDT 24 |
3612683921 ps |
| T879 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3804031797 |
|
|
Jul 13 07:04:02 PM PDT 24 |
Jul 13 07:04:13 PM PDT 24 |
960772871 ps |
| T880 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.2882246013 |
|
|
Jul 13 07:02:14 PM PDT 24 |
Jul 13 07:02:44 PM PDT 24 |
4121201379 ps |
| T881 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1072798293 |
|
|
Jul 13 07:06:38 PM PDT 24 |
Jul 13 07:07:00 PM PDT 24 |
20568121518 ps |
| T882 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1454307525 |
|
|
Jul 13 07:02:37 PM PDT 24 |
Jul 13 07:03:54 PM PDT 24 |
11538084775 ps |
| T883 |
/workspace/coverage/default/16.sram_ctrl_smoke.4151209845 |
|
|
Jul 13 07:02:50 PM PDT 24 |
Jul 13 07:03:10 PM PDT 24 |
1209515900 ps |
| T884 |
/workspace/coverage/default/14.sram_ctrl_alert_test.2012980926 |
|
|
Jul 13 07:02:51 PM PDT 24 |
Jul 13 07:02:54 PM PDT 24 |
16114175 ps |
| T885 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3394313113 |
|
|
Jul 13 07:06:21 PM PDT 24 |
Jul 13 07:07:37 PM PDT 24 |
3436448936 ps |
| T886 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.665103037 |
|
|
Jul 13 07:03:10 PM PDT 24 |
Jul 13 07:03:14 PM PDT 24 |
366546778 ps |
| T887 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3604418965 |
|
|
Jul 13 07:04:35 PM PDT 24 |
Jul 13 07:15:02 PM PDT 24 |
42901779034 ps |
| T888 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.799133109 |
|
|
Jul 13 07:03:10 PM PDT 24 |
Jul 13 07:04:27 PM PDT 24 |
1385373497 ps |
| T889 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1952460571 |
|
|
Jul 13 07:02:19 PM PDT 24 |
Jul 13 08:37:17 PM PDT 24 |
1105393699390 ps |
| T890 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1305390744 |
|
|
Jul 13 07:03:59 PM PDT 24 |
Jul 13 07:04:15 PM PDT 24 |
399569278 ps |
| T891 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.413028344 |
|
|
Jul 13 07:02:50 PM PDT 24 |
Jul 13 07:03:09 PM PDT 24 |
579346963 ps |
| T892 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.3396052895 |
|
|
Jul 13 07:04:42 PM PDT 24 |
Jul 13 07:05:39 PM PDT 24 |
18738233528 ps |
| T893 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1992839018 |
|
|
Jul 13 07:03:41 PM PDT 24 |
Jul 13 07:16:13 PM PDT 24 |
15628386731 ps |
| T894 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.385503792 |
|
|
Jul 13 07:02:51 PM PDT 24 |
Jul 13 07:04:04 PM PDT 24 |
23854187198 ps |
| T895 |
/workspace/coverage/default/17.sram_ctrl_smoke.2158955000 |
|
|
Jul 13 07:02:53 PM PDT 24 |
Jul 13 07:03:18 PM PDT 24 |
1507662233 ps |
| T896 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.775590433 |
|
|
Jul 13 07:02:07 PM PDT 24 |
Jul 13 07:03:33 PM PDT 24 |
6403763656 ps |
| T897 |
/workspace/coverage/default/7.sram_ctrl_bijection.1270538078 |
|
|
Jul 13 07:02:25 PM PDT 24 |
Jul 13 07:12:05 PM PDT 24 |
17456541165 ps |
| T898 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2660003498 |
|
|
Jul 13 07:03:40 PM PDT 24 |
Jul 13 07:03:43 PM PDT 24 |
375356911 ps |
| T899 |
/workspace/coverage/default/12.sram_ctrl_partial_access.728219194 |
|
|
Jul 13 07:02:41 PM PDT 24 |
Jul 13 07:02:57 PM PDT 24 |
4052790803 ps |
| T900 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.1149948965 |
|
|
Jul 13 07:03:10 PM PDT 24 |
Jul 13 07:05:48 PM PDT 24 |
2806656502 ps |
| T901 |
/workspace/coverage/default/19.sram_ctrl_regwen.1808802655 |
|
|
Jul 13 07:03:10 PM PDT 24 |
Jul 13 07:19:04 PM PDT 24 |
9392642799 ps |
| T902 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.2771848327 |
|
|
Jul 13 07:04:26 PM PDT 24 |
Jul 13 07:04:29 PM PDT 24 |
677158841 ps |
| T903 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3496129598 |
|
|
Jul 13 07:05:35 PM PDT 24 |
Jul 13 07:19:49 PM PDT 24 |
13431399590 ps |
| T904 |
/workspace/coverage/default/34.sram_ctrl_executable.457636153 |
|
|
Jul 13 07:04:43 PM PDT 24 |
Jul 13 07:11:18 PM PDT 24 |
7574693996 ps |
| T905 |
/workspace/coverage/default/2.sram_ctrl_executable.3172642394 |
|
|
Jul 13 07:02:07 PM PDT 24 |
Jul 13 07:17:42 PM PDT 24 |
77873272453 ps |
| T906 |
/workspace/coverage/default/33.sram_ctrl_executable.2705042666 |
|
|
Jul 13 07:04:36 PM PDT 24 |
Jul 13 07:21:19 PM PDT 24 |
13832549528 ps |
| T907 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.12708803 |
|
|
Jul 13 07:04:53 PM PDT 24 |
Jul 13 07:06:36 PM PDT 24 |
763216839 ps |
| T908 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1234305050 |
|
|
Jul 13 07:02:43 PM PDT 24 |
Jul 13 07:03:49 PM PDT 24 |
1420314546 ps |
| T909 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.1763475102 |
|
|
Jul 13 07:03:27 PM PDT 24 |
Jul 13 07:03:39 PM PDT 24 |
2847882484 ps |
| T910 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2230892833 |
|
|
Jul 13 07:02:34 PM PDT 24 |
Jul 13 07:04:56 PM PDT 24 |
3011128230 ps |
| T911 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.951029460 |
|
|
Jul 13 07:03:11 PM PDT 24 |
Jul 13 07:05:41 PM PDT 24 |
4802790622 ps |
| T912 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3371144838 |
|
|
Jul 13 07:02:12 PM PDT 24 |
Jul 13 07:02:53 PM PDT 24 |
4743288450 ps |
| T913 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3448987134 |
|
|
Jul 13 07:02:06 PM PDT 24 |
Jul 13 07:08:50 PM PDT 24 |
63056048403 ps |
| T914 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1022290131 |
|
|
Jul 13 07:03:10 PM PDT 24 |
Jul 13 07:03:27 PM PDT 24 |
753222413 ps |
| T915 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.2554442652 |
|
|
Jul 13 07:05:19 PM PDT 24 |
Jul 13 07:07:25 PM PDT 24 |
8169060284 ps |
| T916 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.986470027 |
|
|
Jul 13 07:02:52 PM PDT 24 |
Jul 13 07:05:38 PM PDT 24 |
9971909278 ps |
| T917 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3225762253 |
|
|
Jul 13 07:02:19 PM PDT 24 |
Jul 13 07:21:45 PM PDT 24 |
55702627812 ps |
| T918 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.2699095287 |
|
|
Jul 13 07:02:17 PM PDT 24 |
Jul 13 07:15:27 PM PDT 24 |
11052227031 ps |
| T919 |
/workspace/coverage/default/44.sram_ctrl_regwen.3319389835 |
|
|
Jul 13 07:06:12 PM PDT 24 |
Jul 13 07:22:33 PM PDT 24 |
101647091497 ps |
| T920 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.898820649 |
|
|
Jul 13 07:02:05 PM PDT 24 |
Jul 13 07:02:09 PM PDT 24 |
350780997 ps |
| T921 |
/workspace/coverage/default/29.sram_ctrl_partial_access.1878735667 |
|
|
Jul 13 07:04:06 PM PDT 24 |
Jul 13 07:04:41 PM PDT 24 |
714340789 ps |
| T922 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1019926982 |
|
|
Jul 13 07:03:50 PM PDT 24 |
Jul 13 07:05:00 PM PDT 24 |
974237861 ps |
| T923 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.184982297 |
|
|
Jul 13 07:02:18 PM PDT 24 |
Jul 13 07:03:43 PM PDT 24 |
2972198846 ps |
| T924 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2723759651 |
|
|
Jul 13 07:03:42 PM PDT 24 |
Jul 13 07:03:46 PM PDT 24 |
93569695 ps |
| T925 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3384616067 |
|
|
Jul 13 07:06:40 PM PDT 24 |
Jul 13 07:06:41 PM PDT 24 |
13667235 ps |
| T926 |
/workspace/coverage/default/33.sram_ctrl_alert_test.993065673 |
|
|
Jul 13 07:04:44 PM PDT 24 |
Jul 13 07:04:46 PM PDT 24 |
20826998 ps |
| T927 |
/workspace/coverage/default/39.sram_ctrl_stress_all.1936917483 |
|
|
Jul 13 07:05:29 PM PDT 24 |
Jul 13 09:03:38 PM PDT 24 |
1050324302267 ps |
| T928 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.4219546308 |
|
|
Jul 13 07:02:39 PM PDT 24 |
Jul 13 07:03:03 PM PDT 24 |
744930550 ps |
| T929 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1522370117 |
|
|
Jul 13 07:02:06 PM PDT 24 |
Jul 13 07:03:08 PM PDT 24 |
38907101067 ps |
| T930 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2717673913 |
|
|
Jul 13 07:06:39 PM PDT 24 |
Jul 13 07:07:56 PM PDT 24 |
1433746335 ps |
| T931 |
/workspace/coverage/default/40.sram_ctrl_stress_all.3393716009 |
|
|
Jul 13 07:05:37 PM PDT 24 |
Jul 13 09:06:59 PM PDT 24 |
548162673189 ps |
| T932 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.937672002 |
|
|
Jul 13 07:04:37 PM PDT 24 |
Jul 13 07:04:41 PM PDT 24 |
5629313646 ps |
| T933 |
/workspace/coverage/default/22.sram_ctrl_executable.1495326982 |
|
|
Jul 13 07:03:30 PM PDT 24 |
Jul 13 07:18:42 PM PDT 24 |
29405274713 ps |
| T934 |
/workspace/coverage/default/26.sram_ctrl_bijection.1565226305 |
|
|
Jul 13 07:03:58 PM PDT 24 |
Jul 13 07:29:10 PM PDT 24 |
166650394188 ps |
| T935 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2444302414 |
|
|
Jul 13 07:02:50 PM PDT 24 |
Jul 13 07:02:59 PM PDT 24 |
686098450 ps |
| T936 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.1909680947 |
|
|
Jul 13 07:04:29 PM PDT 24 |
Jul 13 07:09:58 PM PDT 24 |
43228534577 ps |
| T937 |
/workspace/coverage/default/23.sram_ctrl_regwen.1065287441 |
|
|
Jul 13 07:03:29 PM PDT 24 |
Jul 13 07:15:14 PM PDT 24 |
3857978388 ps |
| T938 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2511474701 |
|
|
Jul 13 07:06:24 PM PDT 24 |
Jul 13 07:06:35 PM PDT 24 |
1314262955 ps |
| T939 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2462536506 |
|
|
Jul 13 07:05:08 PM PDT 24 |
Jul 13 07:06:37 PM PDT 24 |
5884375482 ps |
| T940 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.3291275716 |
|
|
Jul 13 07:04:38 PM PDT 24 |
Jul 13 07:07:25 PM PDT 24 |
5794420433 ps |
| T941 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1199956209 |
|
|
Jul 13 07:02:27 PM PDT 24 |
Jul 13 07:03:33 PM PDT 24 |
11581089096 ps |
| T942 |
/workspace/coverage/default/29.sram_ctrl_executable.2529600586 |
|
|
Jul 13 07:04:06 PM PDT 24 |
Jul 13 07:34:13 PM PDT 24 |
27145410025 ps |
| T943 |
/workspace/coverage/default/7.sram_ctrl_regwen.2612222930 |
|
|
Jul 13 07:02:28 PM PDT 24 |
Jul 13 07:21:43 PM PDT 24 |
3815453626 ps |
| T944 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3478775837 |
|
|
Jul 13 07:05:12 PM PDT 24 |
Jul 13 07:10:36 PM PDT 24 |
5747511757 ps |
| T945 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2731569827 |
|
|
Jul 13 07:02:28 PM PDT 24 |
Jul 13 07:05:00 PM PDT 24 |
2688879624 ps |
| T946 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.4230912321 |
|
|
Jul 13 07:05:34 PM PDT 24 |
Jul 13 07:09:33 PM PDT 24 |
18673154082 ps |
| T947 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3529966148 |
|
|
Jul 13 07:01:52 PM PDT 24 |
Jul 13 07:01:55 PM PDT 24 |
265677533 ps |
| T948 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1754444004 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:01:55 PM PDT 24 |
351897448 ps |
| T949 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3443889245 |
|
|
Jul 13 07:01:54 PM PDT 24 |
Jul 13 07:01:58 PM PDT 24 |
361327891 ps |
| T63 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3957645176 |
|
|
Jul 13 07:01:40 PM PDT 24 |
Jul 13 07:01:41 PM PDT 24 |
25092597 ps |
| T950 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2701897134 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:04 PM PDT 24 |
2804944393 ps |
| T951 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3701190079 |
|
|
Jul 13 07:01:56 PM PDT 24 |
Jul 13 07:02:02 PM PDT 24 |
373618579 ps |
| T58 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.648553652 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:04 PM PDT 24 |
309674283 ps |
| T952 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.861847178 |
|
|
Jul 13 07:01:49 PM PDT 24 |
Jul 13 07:01:54 PM PDT 24 |
38304376 ps |
| T59 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1292778855 |
|
|
Jul 13 07:01:47 PM PDT 24 |
Jul 13 07:01:49 PM PDT 24 |
89884072 ps |
| T953 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2804651128 |
|
|
Jul 13 07:01:56 PM PDT 24 |
Jul 13 07:02:00 PM PDT 24 |
446956285 ps |
| T60 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3536311985 |
|
|
Jul 13 07:01:59 PM PDT 24 |
Jul 13 07:02:04 PM PDT 24 |
589043908 ps |
| T954 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3769264957 |
|
|
Jul 13 07:01:49 PM PDT 24 |
Jul 13 07:01:54 PM PDT 24 |
351693747 ps |
| T127 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1354490693 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:01:53 PM PDT 24 |
171081403 ps |
| T73 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.230315362 |
|
|
Jul 13 07:01:59 PM PDT 24 |
Jul 13 07:02:03 PM PDT 24 |
77792815 ps |
| T99 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.838507850 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:02 PM PDT 24 |
64607430 ps |
| T122 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.238319028 |
|
|
Jul 13 07:01:49 PM PDT 24 |
Jul 13 07:01:51 PM PDT 24 |
328173405 ps |
| T74 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.731223483 |
|
|
Jul 13 07:01:48 PM PDT 24 |
Jul 13 07:02:29 PM PDT 24 |
46021373727 ps |
| T75 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3918370854 |
|
|
Jul 13 07:01:47 PM PDT 24 |
Jul 13 07:02:49 PM PDT 24 |
29368754389 ps |
| T107 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.94826611 |
|
|
Jul 13 07:01:42 PM PDT 24 |
Jul 13 07:01:46 PM PDT 24 |
21580576 ps |
| T132 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1721969216 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:01 PM PDT 24 |
362001015 ps |
| T100 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3869112480 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:01:52 PM PDT 24 |
39816170 ps |
| T101 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1628107860 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:01 PM PDT 24 |
43983485 ps |
| T76 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.241419760 |
|
|
Jul 13 07:01:49 PM PDT 24 |
Jul 13 07:02:22 PM PDT 24 |
14215886521 ps |
| T77 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1778573127 |
|
|
Jul 13 07:01:40 PM PDT 24 |
Jul 13 07:02:16 PM PDT 24 |
20485422839 ps |
| T102 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2538665835 |
|
|
Jul 13 07:01:46 PM PDT 24 |
Jul 13 07:01:48 PM PDT 24 |
15240233 ps |
| T78 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1250027470 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:01 PM PDT 24 |
17435776 ps |
| T103 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.529511568 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:01 PM PDT 24 |
53197233 ps |
| T955 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4031292343 |
|
|
Jul 13 07:01:59 PM PDT 24 |
Jul 13 07:02:02 PM PDT 24 |
147734433 ps |
| T956 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.231953048 |
|
|
Jul 13 07:02:01 PM PDT 24 |
Jul 13 07:02:07 PM PDT 24 |
1549637791 ps |
| T79 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.146851571 |
|
|
Jul 13 07:01:57 PM PDT 24 |
Jul 13 07:02:27 PM PDT 24 |
13765657179 ps |
| T80 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.894249936 |
|
|
Jul 13 07:01:54 PM PDT 24 |
Jul 13 07:01:56 PM PDT 24 |
32096916 ps |
| T124 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2409883050 |
|
|
Jul 13 07:01:47 PM PDT 24 |
Jul 13 07:01:49 PM PDT 24 |
559899349 ps |
| T957 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.945615855 |
|
|
Jul 13 07:02:01 PM PDT 24 |
Jul 13 07:02:07 PM PDT 24 |
373332704 ps |
| T123 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.203520734 |
|
|
Jul 13 07:01:47 PM PDT 24 |
Jul 13 07:01:49 PM PDT 24 |
271808778 ps |
| T81 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1418183001 |
|
|
Jul 13 07:01:55 PM PDT 24 |
Jul 13 07:01:56 PM PDT 24 |
56738413 ps |
| T958 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.878080418 |
|
|
Jul 13 07:01:53 PM PDT 24 |
Jul 13 07:01:54 PM PDT 24 |
15408127 ps |
| T82 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2366799205 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:55 PM PDT 24 |
26170745745 ps |
| T87 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3660077207 |
|
|
Jul 13 07:01:39 PM PDT 24 |
Jul 13 07:02:07 PM PDT 24 |
24591908755 ps |
| T131 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2608635589 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:02 PM PDT 24 |
156996726 ps |
| T959 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4287256453 |
|
|
Jul 13 07:01:41 PM PDT 24 |
Jul 13 07:01:45 PM PDT 24 |
40390952 ps |
| T88 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4053744371 |
|
|
Jul 13 07:01:47 PM PDT 24 |
Jul 13 07:02:41 PM PDT 24 |
14989069558 ps |
| T89 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3006177199 |
|
|
Jul 13 07:01:41 PM PDT 24 |
Jul 13 07:02:12 PM PDT 24 |
7607371656 ps |
| T90 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.328754151 |
|
|
Jul 13 07:02:01 PM PDT 24 |
Jul 13 07:02:04 PM PDT 24 |
165364170 ps |
| T960 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1435154254 |
|
|
Jul 13 07:01:40 PM PDT 24 |
Jul 13 07:01:42 PM PDT 24 |
156788918 ps |
| T961 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.862757748 |
|
|
Jul 13 07:02:01 PM PDT 24 |
Jul 13 07:02:57 PM PDT 24 |
7189965440 ps |
| T962 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1239094889 |
|
|
Jul 13 07:01:56 PM PDT 24 |
Jul 13 07:01:57 PM PDT 24 |
49297572 ps |
| T95 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1674244631 |
|
|
Jul 13 07:02:00 PM PDT 24 |
Jul 13 07:02:03 PM PDT 24 |
42418440 ps |
| T963 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3690765963 |
|
|
Jul 13 07:01:42 PM PDT 24 |
Jul 13 07:01:48 PM PDT 24 |
235961178 ps |
| T128 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2648765231 |
|
|
Jul 13 07:01:54 PM PDT 24 |
Jul 13 07:01:58 PM PDT 24 |
647315049 ps |
| T964 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3466753021 |
|
|
Jul 13 07:02:00 PM PDT 24 |
Jul 13 07:02:03 PM PDT 24 |
43028586 ps |
| T965 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.822525133 |
|
|
Jul 13 07:01:59 PM PDT 24 |
Jul 13 07:02:04 PM PDT 24 |
871474687 ps |
| T966 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.465375353 |
|
|
Jul 13 07:01:42 PM PDT 24 |
Jul 13 07:01:49 PM PDT 24 |
35623807 ps |
| T967 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1374535456 |
|
|
Jul 13 07:02:02 PM PDT 24 |
Jul 13 07:02:04 PM PDT 24 |
52763986 ps |
| T968 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.697985478 |
|
|
Jul 13 07:01:46 PM PDT 24 |
Jul 13 07:01:48 PM PDT 24 |
14394922 ps |
| T969 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1225191281 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:01:52 PM PDT 24 |
100550514 ps |
| T133 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.849867628 |
|
|
Jul 13 07:01:57 PM PDT 24 |
Jul 13 07:02:00 PM PDT 24 |
159156229 ps |
| T970 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3057193364 |
|
|
Jul 13 07:01:45 PM PDT 24 |
Jul 13 07:01:49 PM PDT 24 |
241545238 ps |
| T971 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2927025323 |
|
|
Jul 13 07:01:41 PM PDT 24 |
Jul 13 07:01:46 PM PDT 24 |
21118422 ps |
| T96 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2963456378 |
|
|
Jul 13 07:01:41 PM PDT 24 |
Jul 13 07:01:44 PM PDT 24 |
53281267 ps |
| T972 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1283304013 |
|
|
Jul 13 07:01:41 PM PDT 24 |
Jul 13 07:01:46 PM PDT 24 |
76380447 ps |
| T973 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2575836445 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:02:17 PM PDT 24 |
3785629811 ps |
| T974 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.904394269 |
|
|
Jul 13 07:01:51 PM PDT 24 |
Jul 13 07:01:54 PM PDT 24 |
197697892 ps |
| T129 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.892938770 |
|
|
Jul 13 07:01:42 PM PDT 24 |
Jul 13 07:01:47 PM PDT 24 |
246665437 ps |
| T93 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1580528317 |
|
|
Jul 13 07:01:57 PM PDT 24 |
Jul 13 07:03:00 PM PDT 24 |
28302630641 ps |
| T975 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.966307181 |
|
|
Jul 13 07:01:49 PM PDT 24 |
Jul 13 07:01:54 PM PDT 24 |
216935276 ps |
| T976 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4149466787 |
|
|
Jul 13 07:01:39 PM PDT 24 |
Jul 13 07:01:43 PM PDT 24 |
1939115530 ps |
| T977 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3926111175 |
|
|
Jul 13 07:01:56 PM PDT 24 |
Jul 13 07:03:11 PM PDT 24 |
140689227200 ps |
| T978 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3536918997 |
|
|
Jul 13 07:01:52 PM PDT 24 |
Jul 13 07:01:53 PM PDT 24 |
26584700 ps |
| T979 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3198097774 |
|
|
Jul 13 07:01:42 PM PDT 24 |
Jul 13 07:01:46 PM PDT 24 |
18040601 ps |
| T130 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2135852471 |
|
|
Jul 13 07:01:56 PM PDT 24 |
Jul 13 07:01:59 PM PDT 24 |
815344686 ps |
| T980 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3265296535 |
|
|
Jul 13 07:01:55 PM PDT 24 |
Jul 13 07:02:00 PM PDT 24 |
3817094982 ps |
| T981 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3955783038 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:02 PM PDT 24 |
37371571 ps |
| T982 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3508754631 |
|
|
Jul 13 07:01:56 PM PDT 24 |
Jul 13 07:02:02 PM PDT 24 |
374882492 ps |
| T983 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1295150693 |
|
|
Jul 13 07:01:56 PM PDT 24 |
Jul 13 07:02:00 PM PDT 24 |
27231506 ps |
| T984 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.259113974 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:02 PM PDT 24 |
139414284 ps |
| T985 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3148640622 |
|
|
Jul 13 07:01:54 PM PDT 24 |
Jul 13 07:01:55 PM PDT 24 |
17616317 ps |
| T94 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1274259684 |
|
|
Jul 13 07:01:53 PM PDT 24 |
Jul 13 07:02:19 PM PDT 24 |
7541409983 ps |
| T97 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.883654206 |
|
|
Jul 13 07:01:38 PM PDT 24 |
Jul 13 07:01:39 PM PDT 24 |
79872826 ps |
| T986 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1976263256 |
|
|
Jul 13 07:01:59 PM PDT 24 |
Jul 13 07:02:29 PM PDT 24 |
15485905840 ps |
| T987 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3593961308 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:03 PM PDT 24 |
293106088 ps |
| T988 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2749632107 |
|
|
Jul 13 07:01:57 PM PDT 24 |
Jul 13 07:02:00 PM PDT 24 |
33896356 ps |
| T125 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.513998453 |
|
|
Jul 13 07:01:41 PM PDT 24 |
Jul 13 07:01:46 PM PDT 24 |
99990864 ps |
| T989 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2301634683 |
|
|
Jul 13 07:01:57 PM PDT 24 |
Jul 13 07:01:59 PM PDT 24 |
39961965 ps |
| T990 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.4042417232 |
|
|
Jul 13 07:01:52 PM PDT 24 |
Jul 13 07:01:56 PM PDT 24 |
799006249 ps |
| T991 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2641866260 |
|
|
Jul 13 07:01:48 PM PDT 24 |
Jul 13 07:01:51 PM PDT 24 |
681388535 ps |
| T992 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4004760252 |
|
|
Jul 13 07:01:57 PM PDT 24 |
Jul 13 07:01:59 PM PDT 24 |
36034226 ps |
| T993 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.472987142 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:04 PM PDT 24 |
368083654 ps |
| T994 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.310524657 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:05 PM PDT 24 |
134363552 ps |
| T995 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1641497288 |
|
|
Jul 13 07:01:41 PM PDT 24 |
Jul 13 07:01:45 PM PDT 24 |
17349279 ps |
| T996 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2312406834 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:01:52 PM PDT 24 |
16567506 ps |
| T997 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.4293998413 |
|
|
Jul 13 07:01:56 PM PDT 24 |
Jul 13 07:01:58 PM PDT 24 |
26306578 ps |
| T998 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1061216284 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:01:55 PM PDT 24 |
592687056 ps |
| T999 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3697115934 |
|
|
Jul 13 07:01:58 PM PDT 24 |
Jul 13 07:02:02 PM PDT 24 |
17372264 ps |
| T1000 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.4249746591 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:01:52 PM PDT 24 |
24842637 ps |
| T1001 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2028328037 |
|
|
Jul 13 07:01:50 PM PDT 24 |
Jul 13 07:01:56 PM PDT 24 |
1870365501 ps |
| T1002 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.4240543378 |
|
|
Jul 13 07:01:57 PM PDT 24 |
Jul 13 07:03:03 PM PDT 24 |
50338429903 ps |