| T796 |
/workspace/coverage/default/35.sram_ctrl_executable.4265221536 |
|
|
Aug 01 07:22:11 PM PDT 24 |
Aug 01 07:29:05 PM PDT 24 |
8004842216 ps |
| T797 |
/workspace/coverage/default/18.sram_ctrl_executable.4077272192 |
|
|
Aug 01 07:15:41 PM PDT 24 |
Aug 01 07:30:40 PM PDT 24 |
11844360082 ps |
| T798 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1108399765 |
|
|
Aug 01 07:21:24 PM PDT 24 |
Aug 01 07:21:42 PM PDT 24 |
3679150902 ps |
| T799 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3703540728 |
|
|
Aug 01 07:12:30 PM PDT 24 |
Aug 01 07:15:09 PM PDT 24 |
5745736226 ps |
| T800 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4060601003 |
|
|
Aug 01 07:13:12 PM PDT 24 |
Aug 01 07:26:06 PM PDT 24 |
12717188790 ps |
| T801 |
/workspace/coverage/default/35.sram_ctrl_alert_test.4121804247 |
|
|
Aug 01 07:22:12 PM PDT 24 |
Aug 01 07:22:13 PM PDT 24 |
42278204 ps |
| T802 |
/workspace/coverage/default/24.sram_ctrl_executable.2352514714 |
|
|
Aug 01 07:17:47 PM PDT 24 |
Aug 01 07:39:39 PM PDT 24 |
31922925513 ps |
| T803 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4099610850 |
|
|
Aug 01 07:13:23 PM PDT 24 |
Aug 01 07:14:19 PM PDT 24 |
19082777639 ps |
| T804 |
/workspace/coverage/default/8.sram_ctrl_bijection.3430572282 |
|
|
Aug 01 07:12:31 PM PDT 24 |
Aug 01 07:47:30 PM PDT 24 |
135295496471 ps |
| T805 |
/workspace/coverage/default/41.sram_ctrl_regwen.1309189516 |
|
|
Aug 01 07:24:23 PM PDT 24 |
Aug 01 07:40:03 PM PDT 24 |
14371668173 ps |
| T806 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1038541181 |
|
|
Aug 01 07:15:19 PM PDT 24 |
Aug 01 07:18:02 PM PDT 24 |
3383549126 ps |
| T807 |
/workspace/coverage/default/12.sram_ctrl_partial_access.4202539435 |
|
|
Aug 01 07:13:45 PM PDT 24 |
Aug 01 07:13:49 PM PDT 24 |
408924901 ps |
| T808 |
/workspace/coverage/default/8.sram_ctrl_executable.2967228464 |
|
|
Aug 01 07:12:40 PM PDT 24 |
Aug 01 07:44:15 PM PDT 24 |
31694462182 ps |
| T809 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2915324589 |
|
|
Aug 01 07:26:40 PM PDT 24 |
Aug 01 07:26:43 PM PDT 24 |
1487181434 ps |
| T810 |
/workspace/coverage/default/30.sram_ctrl_partial_access.1980695061 |
|
|
Aug 01 07:19:51 PM PDT 24 |
Aug 01 07:20:46 PM PDT 24 |
6137027817 ps |
| T811 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.223101394 |
|
|
Aug 01 07:12:17 PM PDT 24 |
Aug 01 07:12:25 PM PDT 24 |
3232650514 ps |
| T812 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.224281562 |
|
|
Aug 01 07:25:15 PM PDT 24 |
Aug 01 07:25:47 PM PDT 24 |
4537401152 ps |
| T813 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1687575519 |
|
|
Aug 01 07:11:58 PM PDT 24 |
Aug 01 07:21:34 PM PDT 24 |
6998740705 ps |
| T814 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.4111115489 |
|
|
Aug 01 07:19:01 PM PDT 24 |
Aug 01 07:20:12 PM PDT 24 |
3071607058 ps |
| T815 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.1981142748 |
|
|
Aug 01 07:20:52 PM PDT 24 |
Aug 01 07:21:03 PM PDT 24 |
695949385 ps |
| T816 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.569679686 |
|
|
Aug 01 07:14:41 PM PDT 24 |
Aug 01 07:14:52 PM PDT 24 |
2398065110 ps |
| T817 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.814555485 |
|
|
Aug 01 07:20:09 PM PDT 24 |
Aug 01 07:34:41 PM PDT 24 |
68910213684 ps |
| T818 |
/workspace/coverage/default/38.sram_ctrl_regwen.3258068700 |
|
|
Aug 01 07:23:26 PM PDT 24 |
Aug 01 07:31:36 PM PDT 24 |
27457948887 ps |
| T819 |
/workspace/coverage/default/36.sram_ctrl_partial_access.61619906 |
|
|
Aug 01 07:22:11 PM PDT 24 |
Aug 01 07:23:47 PM PDT 24 |
1279196961 ps |
| T820 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2712181702 |
|
|
Aug 01 07:20:09 PM PDT 24 |
Aug 01 07:21:24 PM PDT 24 |
9851951173 ps |
| T821 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3103193732 |
|
|
Aug 01 07:25:43 PM PDT 24 |
Aug 01 07:27:18 PM PDT 24 |
7087422810 ps |
| T822 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.286350531 |
|
|
Aug 01 07:21:23 PM PDT 24 |
Aug 01 07:21:51 PM PDT 24 |
737292173 ps |
| T823 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1195805683 |
|
|
Aug 01 07:16:06 PM PDT 24 |
Aug 01 07:17:37 PM PDT 24 |
1941896226 ps |
| T28 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.3397175589 |
|
|
Aug 01 07:11:59 PM PDT 24 |
Aug 01 07:12:02 PM PDT 24 |
171154993 ps |
| T824 |
/workspace/coverage/default/28.sram_ctrl_partial_access.2591507176 |
|
|
Aug 01 07:19:01 PM PDT 24 |
Aug 01 07:19:18 PM PDT 24 |
4992767743 ps |
| T825 |
/workspace/coverage/default/40.sram_ctrl_smoke.1279912941 |
|
|
Aug 01 07:23:37 PM PDT 24 |
Aug 01 07:25:25 PM PDT 24 |
1244716963 ps |
| T826 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.3355774071 |
|
|
Aug 01 07:25:16 PM PDT 24 |
Aug 01 07:30:56 PM PDT 24 |
21337620780 ps |
| T827 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.465856963 |
|
|
Aug 01 07:24:24 PM PDT 24 |
Aug 01 07:25:15 PM PDT 24 |
737040698 ps |
| T828 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.5288857 |
|
|
Aug 01 07:14:05 PM PDT 24 |
Aug 01 07:14:08 PM PDT 24 |
679829660 ps |
| T829 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.1733929361 |
|
|
Aug 01 07:16:36 PM PDT 24 |
Aug 01 07:17:16 PM PDT 24 |
732711398 ps |
| T830 |
/workspace/coverage/default/48.sram_ctrl_executable.2408708998 |
|
|
Aug 01 07:26:55 PM PDT 24 |
Aug 01 07:35:00 PM PDT 24 |
38709054829 ps |
| T831 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.91369453 |
|
|
Aug 01 07:21:23 PM PDT 24 |
Aug 01 07:23:18 PM PDT 24 |
1599714336 ps |
| T832 |
/workspace/coverage/default/38.sram_ctrl_bijection.3769956793 |
|
|
Aug 01 07:23:05 PM PDT 24 |
Aug 01 08:00:53 PM PDT 24 |
566761658933 ps |
| T833 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.2304796915 |
|
|
Aug 01 07:18:49 PM PDT 24 |
Aug 01 07:34:28 PM PDT 24 |
50486296774 ps |
| T834 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.2433529290 |
|
|
Aug 01 07:22:13 PM PDT 24 |
Aug 01 07:24:29 PM PDT 24 |
8224133278 ps |
| T835 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.1974374163 |
|
|
Aug 01 07:12:18 PM PDT 24 |
Aug 01 07:12:24 PM PDT 24 |
693451847 ps |
| T836 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.2117960940 |
|
|
Aug 01 07:11:38 PM PDT 24 |
Aug 01 07:19:17 PM PDT 24 |
7865198090 ps |
| T837 |
/workspace/coverage/default/20.sram_ctrl_stress_all.360845297 |
|
|
Aug 01 07:16:28 PM PDT 24 |
Aug 01 09:16:20 PM PDT 24 |
350617308960 ps |
| T838 |
/workspace/coverage/default/20.sram_ctrl_smoke.2888526438 |
|
|
Aug 01 07:16:06 PM PDT 24 |
Aug 01 07:16:19 PM PDT 24 |
1205634869 ps |
| T839 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1953835152 |
|
|
Aug 01 07:18:49 PM PDT 24 |
Aug 01 07:19:00 PM PDT 24 |
569490287 ps |
| T840 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.55222438 |
|
|
Aug 01 07:17:02 PM PDT 24 |
Aug 01 07:18:50 PM PDT 24 |
3367498533 ps |
| T841 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1898660502 |
|
|
Aug 01 07:25:32 PM PDT 24 |
Aug 01 07:25:40 PM PDT 24 |
772534192 ps |
| T842 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3253035438 |
|
|
Aug 01 07:26:02 PM PDT 24 |
Aug 01 07:28:15 PM PDT 24 |
2060053555 ps |
| T843 |
/workspace/coverage/default/15.sram_ctrl_executable.2013781881 |
|
|
Aug 01 07:14:39 PM PDT 24 |
Aug 01 07:33:23 PM PDT 24 |
10935794232 ps |
| T844 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.646276462 |
|
|
Aug 01 07:12:39 PM PDT 24 |
Aug 01 07:14:02 PM PDT 24 |
42197960006 ps |
| T845 |
/workspace/coverage/default/18.sram_ctrl_alert_test.3036179392 |
|
|
Aug 01 07:15:43 PM PDT 24 |
Aug 01 07:15:43 PM PDT 24 |
19682845 ps |
| T846 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1053121910 |
|
|
Aug 01 07:12:09 PM PDT 24 |
Aug 01 07:12:12 PM PDT 24 |
711769314 ps |
| T847 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.2554036919 |
|
|
Aug 01 07:14:28 PM PDT 24 |
Aug 01 07:14:31 PM PDT 24 |
678165512 ps |
| T848 |
/workspace/coverage/default/13.sram_ctrl_stress_all.4200266331 |
|
|
Aug 01 07:14:05 PM PDT 24 |
Aug 01 09:27:11 PM PDT 24 |
298385325144 ps |
| T849 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.318447178 |
|
|
Aug 01 07:24:15 PM PDT 24 |
Aug 01 07:34:17 PM PDT 24 |
47388798744 ps |
| T850 |
/workspace/coverage/default/41.sram_ctrl_bijection.1962287480 |
|
|
Aug 01 07:24:13 PM PDT 24 |
Aug 01 07:53:38 PM PDT 24 |
49854286578 ps |
| T851 |
/workspace/coverage/default/4.sram_ctrl_regwen.2689873218 |
|
|
Aug 01 07:11:59 PM PDT 24 |
Aug 01 07:23:29 PM PDT 24 |
2998239475 ps |
| T852 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.3697671915 |
|
|
Aug 01 07:17:24 PM PDT 24 |
Aug 01 07:23:10 PM PDT 24 |
21324632292 ps |
| T853 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2254400154 |
|
|
Aug 01 07:24:59 PM PDT 24 |
Aug 01 07:29:03 PM PDT 24 |
20752534416 ps |
| T854 |
/workspace/coverage/default/47.sram_ctrl_stress_all.705458023 |
|
|
Aug 01 07:26:38 PM PDT 24 |
Aug 01 08:13:00 PM PDT 24 |
235010853623 ps |
| T855 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.190618517 |
|
|
Aug 01 07:26:38 PM PDT 24 |
Aug 01 07:29:37 PM PDT 24 |
22342602515 ps |
| T856 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.3449326751 |
|
|
Aug 01 07:11:57 PM PDT 24 |
Aug 01 07:12:27 PM PDT 24 |
25569314741 ps |
| T857 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.4239111325 |
|
|
Aug 01 07:11:28 PM PDT 24 |
Aug 01 07:12:20 PM PDT 24 |
9367847415 ps |
| T858 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.3502114921 |
|
|
Aug 01 07:16:05 PM PDT 24 |
Aug 01 07:18:47 PM PDT 24 |
20624667716 ps |
| T859 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.818270107 |
|
|
Aug 01 07:26:52 PM PDT 24 |
Aug 01 07:39:53 PM PDT 24 |
62268665957 ps |
| T860 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.3229200089 |
|
|
Aug 01 07:18:47 PM PDT 24 |
Aug 01 07:18:51 PM PDT 24 |
691342517 ps |
| T861 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2432972128 |
|
|
Aug 01 07:12:23 PM PDT 24 |
Aug 01 07:16:44 PM PDT 24 |
3983415401 ps |
| T862 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.623317194 |
|
|
Aug 01 07:13:23 PM PDT 24 |
Aug 01 07:15:27 PM PDT 24 |
6311697290 ps |
| T863 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.917912903 |
|
|
Aug 01 07:11:29 PM PDT 24 |
Aug 01 07:30:28 PM PDT 24 |
16295886360 ps |
| T864 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.3364066941 |
|
|
Aug 01 07:15:53 PM PDT 24 |
Aug 01 07:16:45 PM PDT 24 |
1407585469 ps |
| T865 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1649469848 |
|
|
Aug 01 07:13:44 PM PDT 24 |
Aug 01 07:13:52 PM PDT 24 |
4016226226 ps |
| T866 |
/workspace/coverage/default/30.sram_ctrl_alert_test.3622462851 |
|
|
Aug 01 07:20:08 PM PDT 24 |
Aug 01 07:20:08 PM PDT 24 |
44813129 ps |
| T867 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1161363216 |
|
|
Aug 01 07:13:23 PM PDT 24 |
Aug 01 07:30:59 PM PDT 24 |
10374672497 ps |
| T868 |
/workspace/coverage/default/10.sram_ctrl_bijection.3890197593 |
|
|
Aug 01 07:13:00 PM PDT 24 |
Aug 01 07:29:15 PM PDT 24 |
149380779272 ps |
| T869 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.23126129 |
|
|
Aug 01 07:25:15 PM PDT 24 |
Aug 01 07:31:45 PM PDT 24 |
39608485909 ps |
| T870 |
/workspace/coverage/default/4.sram_ctrl_alert_test.3821770948 |
|
|
Aug 01 07:11:58 PM PDT 24 |
Aug 01 07:11:59 PM PDT 24 |
41407887 ps |
| T871 |
/workspace/coverage/default/22.sram_ctrl_smoke.1455995538 |
|
|
Aug 01 07:16:49 PM PDT 24 |
Aug 01 07:18:43 PM PDT 24 |
1915570085 ps |
| T872 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.347031498 |
|
|
Aug 01 07:19:52 PM PDT 24 |
Aug 01 07:21:09 PM PDT 24 |
5781115339 ps |
| T873 |
/workspace/coverage/default/3.sram_ctrl_executable.2713635537 |
|
|
Aug 01 07:11:49 PM PDT 24 |
Aug 01 07:22:26 PM PDT 24 |
52828011961 ps |
| T874 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2635747419 |
|
|
Aug 01 07:12:13 PM PDT 24 |
Aug 01 07:16:27 PM PDT 24 |
4106496581 ps |
| T875 |
/workspace/coverage/default/32.sram_ctrl_stress_all.3503995339 |
|
|
Aug 01 07:20:37 PM PDT 24 |
Aug 01 08:13:03 PM PDT 24 |
132580772500 ps |
| T876 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2384434819 |
|
|
Aug 01 07:11:58 PM PDT 24 |
Aug 01 07:12:19 PM PDT 24 |
9974276950 ps |
| T877 |
/workspace/coverage/default/32.sram_ctrl_regwen.3612993644 |
|
|
Aug 01 07:20:25 PM PDT 24 |
Aug 01 07:28:53 PM PDT 24 |
7778215801 ps |
| T878 |
/workspace/coverage/default/45.sram_ctrl_regwen.3887044377 |
|
|
Aug 01 07:25:43 PM PDT 24 |
Aug 01 07:41:09 PM PDT 24 |
5934951556 ps |
| T879 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2579601656 |
|
|
Aug 01 07:23:07 PM PDT 24 |
Aug 01 07:23:23 PM PDT 24 |
740595958 ps |
| T880 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2333422992 |
|
|
Aug 01 07:20:25 PM PDT 24 |
Aug 01 07:22:50 PM PDT 24 |
5227806917 ps |
| T881 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.377378522 |
|
|
Aug 01 07:22:11 PM PDT 24 |
Aug 01 07:23:23 PM PDT 24 |
5770132322 ps |
| T882 |
/workspace/coverage/default/22.sram_ctrl_regwen.923135211 |
|
|
Aug 01 07:17:01 PM PDT 24 |
Aug 01 07:22:51 PM PDT 24 |
2636520522 ps |
| T883 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.2263254807 |
|
|
Aug 01 07:20:38 PM PDT 24 |
Aug 01 07:23:17 PM PDT 24 |
27667316693 ps |
| T884 |
/workspace/coverage/default/9.sram_ctrl_smoke.1330970728 |
|
|
Aug 01 07:12:49 PM PDT 24 |
Aug 01 07:14:12 PM PDT 24 |
3630408798 ps |
| T885 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2375436814 |
|
|
Aug 01 07:27:26 PM PDT 24 |
Aug 01 07:30:00 PM PDT 24 |
2632364742 ps |
| T886 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1885199284 |
|
|
Aug 01 07:25:45 PM PDT 24 |
Aug 01 07:25:48 PM PDT 24 |
351872041 ps |
| T887 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.63753311 |
|
|
Aug 01 07:19:53 PM PDT 24 |
Aug 01 07:34:31 PM PDT 24 |
21564621268 ps |
| T888 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.3854696010 |
|
|
Aug 01 07:20:26 PM PDT 24 |
Aug 01 07:20:30 PM PDT 24 |
1395617338 ps |
| T889 |
/workspace/coverage/default/41.sram_ctrl_stress_all.322696357 |
|
|
Aug 01 07:24:29 PM PDT 24 |
Aug 01 08:08:19 PM PDT 24 |
30966015173 ps |
| T890 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1762646425 |
|
|
Aug 01 07:12:18 PM PDT 24 |
Aug 01 07:18:09 PM PDT 24 |
31606225109 ps |
| T891 |
/workspace/coverage/default/35.sram_ctrl_smoke.831797900 |
|
|
Aug 01 07:21:35 PM PDT 24 |
Aug 01 07:21:44 PM PDT 24 |
4457777098 ps |
| T892 |
/workspace/coverage/default/49.sram_ctrl_smoke.1828596198 |
|
|
Aug 01 07:27:07 PM PDT 24 |
Aug 01 07:27:58 PM PDT 24 |
430957910 ps |
| T893 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.2534355251 |
|
|
Aug 01 07:19:17 PM PDT 24 |
Aug 01 07:19:21 PM PDT 24 |
349743654 ps |
| T894 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2339557196 |
|
|
Aug 01 07:13:11 PM PDT 24 |
Aug 01 07:15:00 PM PDT 24 |
3057599700 ps |
| T895 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.2718648761 |
|
|
Aug 01 07:11:40 PM PDT 24 |
Aug 01 07:14:45 PM PDT 24 |
6656363834 ps |
| T896 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1226890940 |
|
|
Aug 01 07:12:19 PM PDT 24 |
Aug 01 07:19:30 PM PDT 24 |
30722719754 ps |
| T897 |
/workspace/coverage/default/36.sram_ctrl_regwen.692104512 |
|
|
Aug 01 07:22:39 PM PDT 24 |
Aug 01 07:23:42 PM PDT 24 |
1331048822 ps |
| T898 |
/workspace/coverage/default/7.sram_ctrl_stress_all.2464028896 |
|
|
Aug 01 07:12:28 PM PDT 24 |
Aug 01 08:14:36 PM PDT 24 |
669179678516 ps |
| T899 |
/workspace/coverage/default/3.sram_ctrl_alert_test.1890429167 |
|
|
Aug 01 07:11:48 PM PDT 24 |
Aug 01 07:11:48 PM PDT 24 |
35207194 ps |
| T29 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.2586940477 |
|
|
Aug 01 07:11:37 PM PDT 24 |
Aug 01 07:11:39 PM PDT 24 |
286422737 ps |
| T900 |
/workspace/coverage/default/23.sram_ctrl_alert_test.2005820465 |
|
|
Aug 01 07:17:24 PM PDT 24 |
Aug 01 07:17:24 PM PDT 24 |
27385745 ps |
| T901 |
/workspace/coverage/default/0.sram_ctrl_smoke.3491097374 |
|
|
Aug 01 07:11:19 PM PDT 24 |
Aug 01 07:11:32 PM PDT 24 |
4323917354 ps |
| T902 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2600665816 |
|
|
Aug 01 07:13:44 PM PDT 24 |
Aug 01 07:13:48 PM PDT 24 |
687825785 ps |
| T903 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.824759965 |
|
|
Aug 01 07:13:45 PM PDT 24 |
Aug 01 07:15:20 PM PDT 24 |
15417395778 ps |
| T904 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1238508008 |
|
|
Aug 01 07:12:18 PM PDT 24 |
Aug 01 07:12:21 PM PDT 24 |
365699458 ps |
| T905 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1723655707 |
|
|
Aug 01 07:13:13 PM PDT 24 |
Aug 01 07:24:24 PM PDT 24 |
40231406282 ps |
| T906 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1272816649 |
|
|
Aug 01 07:18:38 PM PDT 24 |
Aug 01 07:27:07 PM PDT 24 |
80188705474 ps |
| T907 |
/workspace/coverage/default/37.sram_ctrl_smoke.2884783998 |
|
|
Aug 01 07:22:39 PM PDT 24 |
Aug 01 07:23:37 PM PDT 24 |
14541835025 ps |
| T908 |
/workspace/coverage/default/30.sram_ctrl_executable.149212305 |
|
|
Aug 01 07:19:51 PM PDT 24 |
Aug 01 07:27:13 PM PDT 24 |
8987712075 ps |
| T909 |
/workspace/coverage/default/15.sram_ctrl_regwen.4243493062 |
|
|
Aug 01 07:14:40 PM PDT 24 |
Aug 01 07:21:37 PM PDT 24 |
7721909480 ps |
| T910 |
/workspace/coverage/default/28.sram_ctrl_regwen.51615534 |
|
|
Aug 01 07:19:17 PM PDT 24 |
Aug 01 07:29:00 PM PDT 24 |
6627780348 ps |
| T911 |
/workspace/coverage/default/43.sram_ctrl_regwen.340186349 |
|
|
Aug 01 07:25:17 PM PDT 24 |
Aug 01 07:32:07 PM PDT 24 |
2119264813 ps |
| T912 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.900286348 |
|
|
Aug 01 07:12:09 PM PDT 24 |
Aug 01 07:34:22 PM PDT 24 |
14888588116 ps |
| T913 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2819457018 |
|
|
Aug 01 07:26:23 PM PDT 24 |
Aug 01 07:26:26 PM PDT 24 |
923836196 ps |
| T914 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.532730796 |
|
|
Aug 01 07:18:22 PM PDT 24 |
Aug 01 07:28:22 PM PDT 24 |
6776956573 ps |
| T915 |
/workspace/coverage/default/42.sram_ctrl_alert_test.1500041764 |
|
|
Aug 01 07:25:15 PM PDT 24 |
Aug 01 07:25:16 PM PDT 24 |
19896870 ps |
| T916 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.101672761 |
|
|
Aug 01 07:18:38 PM PDT 24 |
Aug 01 07:24:10 PM PDT 24 |
53126504113 ps |
| T917 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3185024754 |
|
|
Aug 01 07:25:15 PM PDT 24 |
Aug 01 07:30:45 PM PDT 24 |
23460878062 ps |
| T918 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3261939129 |
|
|
Aug 01 07:17:54 PM PDT 24 |
Aug 01 07:19:14 PM PDT 24 |
2772168183 ps |
| T919 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.4107062913 |
|
|
Aug 01 07:15:05 PM PDT 24 |
Aug 01 07:16:07 PM PDT 24 |
4451851384 ps |
| T920 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3012234304 |
|
|
Aug 01 07:12:08 PM PDT 24 |
Aug 01 07:37:51 PM PDT 24 |
58634209215 ps |
| T921 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.639881112 |
|
|
Aug 01 07:12:01 PM PDT 24 |
Aug 01 07:12:13 PM PDT 24 |
619905442 ps |
| T922 |
/workspace/coverage/default/8.sram_ctrl_smoke.3311377380 |
|
|
Aug 01 07:12:28 PM PDT 24 |
Aug 01 07:14:55 PM PDT 24 |
3103937964 ps |
| T923 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.2816023809 |
|
|
Aug 01 07:15:06 PM PDT 24 |
Aug 01 07:17:48 PM PDT 24 |
49965039463 ps |
| T924 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1705886355 |
|
|
Aug 01 07:17:52 PM PDT 24 |
Aug 01 07:24:12 PM PDT 24 |
60289997391 ps |
| T925 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3924613820 |
|
|
Aug 01 07:27:25 PM PDT 24 |
Aug 01 07:27:54 PM PDT 24 |
17822587400 ps |
| T926 |
/workspace/coverage/default/23.sram_ctrl_smoke.1936015495 |
|
|
Aug 01 07:17:13 PM PDT 24 |
Aug 01 07:17:30 PM PDT 24 |
2764112406 ps |
| T927 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.1711308240 |
|
|
Aug 01 07:21:22 PM PDT 24 |
Aug 01 07:21:26 PM PDT 24 |
2402326226 ps |
| T928 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3268340856 |
|
|
Aug 01 07:26:54 PM PDT 24 |
Aug 01 07:27:37 PM PDT 24 |
28131725344 ps |
| T929 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.474870536 |
|
|
Aug 01 07:20:27 PM PDT 24 |
Aug 01 07:26:05 PM PDT 24 |
65909370154 ps |
| T930 |
/workspace/coverage/default/43.sram_ctrl_bijection.2088608920 |
|
|
Aug 01 07:25:17 PM PDT 24 |
Aug 01 07:41:27 PM PDT 24 |
426064158659 ps |
| T931 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1236636454 |
|
|
Aug 01 07:21:08 PM PDT 24 |
Aug 01 07:22:08 PM PDT 24 |
2352145186 ps |
| T932 |
/workspace/coverage/default/40.sram_ctrl_bijection.3992654977 |
|
|
Aug 01 07:23:38 PM PDT 24 |
Aug 01 07:43:41 PM PDT 24 |
17919927030 ps |
| T933 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.1967997007 |
|
|
Aug 01 07:16:05 PM PDT 24 |
Aug 01 07:18:38 PM PDT 24 |
20753111356 ps |
| T934 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.3753477537 |
|
|
Aug 01 07:18:38 PM PDT 24 |
Aug 01 07:20:07 PM PDT 24 |
1560778459 ps |
| T935 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1617787473 |
|
|
Aug 01 07:27:26 PM PDT 24 |
Aug 01 07:34:03 PM PDT 24 |
32914900435 ps |
| T936 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.914355225 |
|
|
Aug 01 07:25:44 PM PDT 24 |
Aug 01 07:26:48 PM PDT 24 |
54070513619 ps |
| T937 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.1496694803 |
|
|
Aug 01 07:24:59 PM PDT 24 |
Aug 01 07:25:26 PM PDT 24 |
14161173561 ps |
| T938 |
/workspace/coverage/default/30.sram_ctrl_smoke.990624360 |
|
|
Aug 01 07:19:54 PM PDT 24 |
Aug 01 07:20:31 PM PDT 24 |
3593867611 ps |
| T939 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.3426436158 |
|
|
Aug 01 07:24:27 PM PDT 24 |
Aug 01 07:24:31 PM PDT 24 |
1403820502 ps |
| T940 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.3747577278 |
|
|
Aug 01 07:24:25 PM PDT 24 |
Aug 01 07:25:48 PM PDT 24 |
6022686402 ps |
| T941 |
/workspace/coverage/default/16.sram_ctrl_smoke.746295608 |
|
|
Aug 01 07:14:54 PM PDT 24 |
Aug 01 07:15:12 PM PDT 24 |
1445693869 ps |
| T65 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1810527295 |
|
|
Aug 01 06:25:29 PM PDT 24 |
Aug 01 06:25:30 PM PDT 24 |
44117803 ps |
| T942 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1150493865 |
|
|
Aug 01 06:25:40 PM PDT 24 |
Aug 01 06:25:45 PM PDT 24 |
634139809 ps |
| T943 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3895032528 |
|
|
Aug 01 06:25:39 PM PDT 24 |
Aug 01 06:25:43 PM PDT 24 |
795925667 ps |
| T66 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3668392409 |
|
|
Aug 01 06:25:32 PM PDT 24 |
Aug 01 06:25:33 PM PDT 24 |
21095930 ps |
| T944 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2853125829 |
|
|
Aug 01 06:25:22 PM PDT 24 |
Aug 01 06:25:25 PM PDT 24 |
39749657 ps |
| T945 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2548343487 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:40 PM PDT 24 |
126012751 ps |
| T67 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1408608569 |
|
|
Aug 01 06:25:34 PM PDT 24 |
Aug 01 06:25:35 PM PDT 24 |
49181302 ps |
| T133 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.962748788 |
|
|
Aug 01 06:25:22 PM PDT 24 |
Aug 01 06:25:23 PM PDT 24 |
252348919 ps |
| T74 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2676457954 |
|
|
Aug 01 06:25:39 PM PDT 24 |
Aug 01 06:25:46 PM PDT 24 |
161001714 ps |
| T75 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2214610237 |
|
|
Aug 01 06:25:21 PM PDT 24 |
Aug 01 06:25:22 PM PDT 24 |
23874708 ps |
| T61 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2999037239 |
|
|
Aug 01 06:25:44 PM PDT 24 |
Aug 01 06:25:46 PM PDT 24 |
227628529 ps |
| T946 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4267757227 |
|
|
Aug 01 06:25:40 PM PDT 24 |
Aug 01 06:25:44 PM PDT 24 |
122816397 ps |
| T76 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.103797963 |
|
|
Aug 01 06:25:42 PM PDT 24 |
Aug 01 06:25:43 PM PDT 24 |
37541097 ps |
| T62 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3725248688 |
|
|
Aug 01 06:25:32 PM PDT 24 |
Aug 01 06:25:34 PM PDT 24 |
130397595 ps |
| T77 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2331661725 |
|
|
Aug 01 06:25:40 PM PDT 24 |
Aug 01 06:25:41 PM PDT 24 |
13500777 ps |
| T78 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4151137225 |
|
|
Aug 01 06:25:48 PM PDT 24 |
Aug 01 06:25:48 PM PDT 24 |
37249510 ps |
| T79 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1276167284 |
|
|
Aug 01 06:25:40 PM PDT 24 |
Aug 01 06:26:35 PM PDT 24 |
14657942987 ps |
| T80 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1125702482 |
|
|
Aug 01 06:25:27 PM PDT 24 |
Aug 01 06:25:28 PM PDT 24 |
13591100 ps |
| T947 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2615479328 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:38 PM PDT 24 |
150340601 ps |
| T948 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3003311614 |
|
|
Aug 01 06:25:30 PM PDT 24 |
Aug 01 06:25:34 PM PDT 24 |
1301654717 ps |
| T949 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1422037211 |
|
|
Aug 01 06:26:03 PM PDT 24 |
Aug 01 06:26:03 PM PDT 24 |
18480130 ps |
| T950 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2626825504 |
|
|
Aug 01 06:25:31 PM PDT 24 |
Aug 01 06:25:35 PM PDT 24 |
36063559 ps |
| T81 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3810242665 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:37 PM PDT 24 |
16935577 ps |
| T63 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3995972970 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:38 PM PDT 24 |
244461460 ps |
| T98 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4282152723 |
|
|
Aug 01 06:25:18 PM PDT 24 |
Aug 01 06:25:19 PM PDT 24 |
85264146 ps |
| T951 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.569957149 |
|
|
Aug 01 06:25:39 PM PDT 24 |
Aug 01 06:25:43 PM PDT 24 |
721111372 ps |
| T82 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2686751094 |
|
|
Aug 01 06:25:42 PM PDT 24 |
Aug 01 06:26:31 PM PDT 24 |
7459322661 ps |
| T83 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1118065081 |
|
|
Aug 01 06:25:26 PM PDT 24 |
Aug 01 06:25:55 PM PDT 24 |
3849072723 ps |
| T952 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1253417785 |
|
|
Aug 01 06:25:39 PM PDT 24 |
Aug 01 06:25:40 PM PDT 24 |
32279226 ps |
| T953 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2543245091 |
|
|
Aug 01 06:25:29 PM PDT 24 |
Aug 01 06:25:30 PM PDT 24 |
13728888 ps |
| T99 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.410088813 |
|
|
Aug 01 06:25:26 PM PDT 24 |
Aug 01 06:25:27 PM PDT 24 |
51726911 ps |
| T131 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.4124845310 |
|
|
Aug 01 06:25:40 PM PDT 24 |
Aug 01 06:25:42 PM PDT 24 |
511928415 ps |
| T954 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2528544828 |
|
|
Aug 01 06:25:43 PM PDT 24 |
Aug 01 06:25:47 PM PDT 24 |
126308237 ps |
| T955 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.96328828 |
|
|
Aug 01 06:25:30 PM PDT 24 |
Aug 01 06:25:31 PM PDT 24 |
14244928 ps |
| T956 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2411177331 |
|
|
Aug 01 06:25:24 PM PDT 24 |
Aug 01 06:25:25 PM PDT 24 |
24529849 ps |
| T100 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2130218450 |
|
|
Aug 01 06:25:26 PM PDT 24 |
Aug 01 06:25:27 PM PDT 24 |
20576796 ps |
| T957 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2270819272 |
|
|
Aug 01 06:25:41 PM PDT 24 |
Aug 01 06:25:46 PM PDT 24 |
572858490 ps |
| T84 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1127681367 |
|
|
Aug 01 06:25:37 PM PDT 24 |
Aug 01 06:26:32 PM PDT 24 |
14489069276 ps |
| T958 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2117156505 |
|
|
Aug 01 06:25:33 PM PDT 24 |
Aug 01 06:25:37 PM PDT 24 |
1079982560 ps |
| T959 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2920295907 |
|
|
Aug 01 06:25:50 PM PDT 24 |
Aug 01 06:25:54 PM PDT 24 |
358548958 ps |
| T960 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.486765008 |
|
|
Aug 01 06:25:36 PM PDT 24 |
Aug 01 06:25:37 PM PDT 24 |
100680929 ps |
| T961 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2144671477 |
|
|
Aug 01 06:25:30 PM PDT 24 |
Aug 01 06:25:35 PM PDT 24 |
387994288 ps |
| T120 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2262970453 |
|
|
Aug 01 06:25:44 PM PDT 24 |
Aug 01 06:25:47 PM PDT 24 |
669902934 ps |
| T962 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2679810407 |
|
|
Aug 01 06:25:19 PM PDT 24 |
Aug 01 06:25:20 PM PDT 24 |
29234699 ps |
| T963 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3255520415 |
|
|
Aug 01 06:25:34 PM PDT 24 |
Aug 01 06:25:35 PM PDT 24 |
19696054 ps |
| T964 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1837529199 |
|
|
Aug 01 06:25:33 PM PDT 24 |
Aug 01 06:25:34 PM PDT 24 |
64037118 ps |
| T965 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.4032847239 |
|
|
Aug 01 06:25:37 PM PDT 24 |
Aug 01 06:25:37 PM PDT 24 |
27877490 ps |
| T966 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.4107891959 |
|
|
Aug 01 06:25:33 PM PDT 24 |
Aug 01 06:26:00 PM PDT 24 |
3824209784 ps |
| T967 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3548648227 |
|
|
Aug 01 06:25:36 PM PDT 24 |
Aug 01 06:25:37 PM PDT 24 |
37983092 ps |
| T121 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2169701320 |
|
|
Aug 01 06:25:33 PM PDT 24 |
Aug 01 06:25:35 PM PDT 24 |
198816498 ps |
| T968 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.359313707 |
|
|
Aug 01 06:25:57 PM PDT 24 |
Aug 01 06:26:00 PM PDT 24 |
352370152 ps |
| T969 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2691622808 |
|
|
Aug 01 06:25:18 PM PDT 24 |
Aug 01 06:25:22 PM PDT 24 |
361782361 ps |
| T970 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1438758394 |
|
|
Aug 01 06:25:36 PM PDT 24 |
Aug 01 06:25:37 PM PDT 24 |
201329663 ps |
| T971 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2099681724 |
|
|
Aug 01 06:25:41 PM PDT 24 |
Aug 01 06:25:50 PM PDT 24 |
131628567 ps |
| T85 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1359375275 |
|
|
Aug 01 06:25:40 PM PDT 24 |
Aug 01 06:26:32 PM PDT 24 |
14358406541 ps |
| T972 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1844469048 |
|
|
Aug 01 06:25:24 PM PDT 24 |
Aug 01 06:25:28 PM PDT 24 |
368590301 ps |
| T122 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2223070757 |
|
|
Aug 01 06:25:25 PM PDT 24 |
Aug 01 06:25:27 PM PDT 24 |
243002790 ps |
| T973 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2758245489 |
|
|
Aug 01 06:25:38 PM PDT 24 |
Aug 01 06:25:42 PM PDT 24 |
459641842 ps |
| T974 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4213170264 |
|
|
Aug 01 06:25:46 PM PDT 24 |
Aug 01 06:25:50 PM PDT 24 |
358007500 ps |
| T975 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1017188961 |
|
|
Aug 01 06:25:38 PM PDT 24 |
Aug 01 06:25:38 PM PDT 24 |
36514251 ps |
| T94 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1689143185 |
|
|
Aug 01 06:25:28 PM PDT 24 |
Aug 01 06:25:28 PM PDT 24 |
41008935 ps |
| T976 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3199494568 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:40 PM PDT 24 |
2403838298 ps |
| T123 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3533340678 |
|
|
Aug 01 06:25:32 PM PDT 24 |
Aug 01 06:25:37 PM PDT 24 |
178489670 ps |
| T977 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3110232938 |
|
|
Aug 01 06:25:18 PM PDT 24 |
Aug 01 06:25:19 PM PDT 24 |
53491762 ps |
| T978 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3540294183 |
|
|
Aug 01 06:25:17 PM PDT 24 |
Aug 01 06:25:19 PM PDT 24 |
97519779 ps |
| T979 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.414445856 |
|
|
Aug 01 06:25:25 PM PDT 24 |
Aug 01 06:25:26 PM PDT 24 |
19718200 ps |
| T980 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.4223657565 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:36 PM PDT 24 |
32412548 ps |
| T124 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1954124953 |
|
|
Aug 01 06:25:39 PM PDT 24 |
Aug 01 06:25:41 PM PDT 24 |
249435351 ps |
| T981 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4107499021 |
|
|
Aug 01 06:25:19 PM PDT 24 |
Aug 01 06:25:24 PM PDT 24 |
3814079796 ps |
| T86 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.4081024137 |
|
|
Aug 01 06:25:37 PM PDT 24 |
Aug 01 06:26:26 PM PDT 24 |
7106176082 ps |
| T126 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1529664507 |
|
|
Aug 01 06:25:26 PM PDT 24 |
Aug 01 06:25:27 PM PDT 24 |
96836890 ps |
| T127 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1584408149 |
|
|
Aug 01 06:25:36 PM PDT 24 |
Aug 01 06:25:38 PM PDT 24 |
112467881 ps |
| T87 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1337346045 |
|
|
Aug 01 06:25:42 PM PDT 24 |
Aug 01 06:26:07 PM PDT 24 |
7709862373 ps |
| T982 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2105023720 |
|
|
Aug 01 06:25:23 PM PDT 24 |
Aug 01 06:25:24 PM PDT 24 |
72893615 ps |
| T88 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1398856309 |
|
|
Aug 01 06:25:22 PM PDT 24 |
Aug 01 06:25:53 PM PDT 24 |
15367530245 ps |
| T983 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.908936127 |
|
|
Aug 01 06:25:29 PM PDT 24 |
Aug 01 06:25:33 PM PDT 24 |
133519648 ps |
| T984 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1970993659 |
|
|
Aug 01 06:25:19 PM PDT 24 |
Aug 01 06:25:23 PM PDT 24 |
120178121 ps |
| T985 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2788807744 |
|
|
Aug 01 06:25:31 PM PDT 24 |
Aug 01 06:25:32 PM PDT 24 |
16237647 ps |
| T986 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.4230293813 |
|
|
Aug 01 06:25:30 PM PDT 24 |
Aug 01 06:25:30 PM PDT 24 |
42733133 ps |
| T125 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.662113615 |
|
|
Aug 01 06:25:17 PM PDT 24 |
Aug 01 06:25:20 PM PDT 24 |
1496608347 ps |
| T987 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2279308033 |
|
|
Aug 01 06:25:41 PM PDT 24 |
Aug 01 06:26:13 PM PDT 24 |
52862859037 ps |
| T988 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.564364497 |
|
|
Aug 01 06:25:43 PM PDT 24 |
Aug 01 06:25:46 PM PDT 24 |
648744144 ps |
| T989 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1923698517 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:36 PM PDT 24 |
105272847 ps |
| T990 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2736194259 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:40 PM PDT 24 |
69962604 ps |
| T991 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.832645339 |
|
|
Aug 01 06:26:03 PM PDT 24 |
Aug 01 06:26:07 PM PDT 24 |
135224622 ps |
| T992 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2691366066 |
|
|
Aug 01 06:25:35 PM PDT 24 |
Aug 01 06:25:36 PM PDT 24 |
19506124 ps |
| T993 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3910355040 |
|
|
Aug 01 06:25:24 PM PDT 24 |
Aug 01 06:25:26 PM PDT 24 |
26674453 ps |
| T89 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1150675660 |
|
|
Aug 01 06:25:32 PM PDT 24 |
Aug 01 06:26:34 PM PDT 24 |
87887737919 ps |
| T994 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2984759249 |
|
|
Aug 01 06:25:41 PM PDT 24 |
Aug 01 06:25:44 PM PDT 24 |
158562378 ps |
| T995 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2035113031 |
|
|
Aug 01 06:25:34 PM PDT 24 |
Aug 01 06:25:37 PM PDT 24 |
309174516 ps |
| T128 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2926503011 |
|
|
Aug 01 06:25:32 PM PDT 24 |
Aug 01 06:25:35 PM PDT 24 |
282723467 ps |
| T95 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2724142146 |
|
|
Aug 01 06:25:25 PM PDT 24 |
Aug 01 06:25:26 PM PDT 24 |
19589395 ps |
| T996 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.79505759 |
|
|
Aug 01 06:25:31 PM PDT 24 |
Aug 01 06:25:32 PM PDT 24 |
23868708 ps |
| T997 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.411474106 |
|
|
Aug 01 06:25:39 PM PDT 24 |
Aug 01 06:25:43 PM PDT 24 |
1147495524 ps |
| T998 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1176922347 |
|
|
Aug 01 06:25:46 PM PDT 24 |
Aug 01 06:25:54 PM PDT 24 |
361106803 ps |
| T999 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3661310351 |
|
|
Aug 01 06:25:21 PM PDT 24 |
Aug 01 06:25:22 PM PDT 24 |
20985173 ps |
| T1000 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3795074529 |
|
|
Aug 01 06:25:32 PM PDT 24 |
Aug 01 06:25:34 PM PDT 24 |
1083958949 ps |
| T132 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.901683037 |
|
|
Aug 01 06:25:37 PM PDT 24 |
Aug 01 06:25:39 PM PDT 24 |
698117625 ps |
| T1001 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.367594649 |
|
|
Aug 01 06:25:34 PM PDT 24 |
Aug 01 06:25:35 PM PDT 24 |
55368983 ps |
| T96 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2160314866 |
|
|
Aug 01 06:25:34 PM PDT 24 |
Aug 01 06:26:30 PM PDT 24 |
7283777590 ps |
| T1002 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3036087508 |
|
|
Aug 01 06:25:17 PM PDT 24 |
Aug 01 06:26:20 PM PDT 24 |
39407887380 ps |
| T1003 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3997801644 |
|
|
Aug 01 06:25:16 PM PDT 24 |
Aug 01 06:25:17 PM PDT 24 |
17539286 ps |