| T532 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3342422660 |
|
|
Jan 07 12:48:28 PM PST 24 |
Jan 07 12:51:50 PM PST 24 |
2180063253 ps |
| T533 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3551127085 |
|
|
Jan 07 12:49:04 PM PST 24 |
Jan 07 01:06:05 PM PST 24 |
4290223961 ps |
| T534 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.3344258657 |
|
|
Jan 07 12:49:17 PM PST 24 |
Jan 07 12:50:39 PM PST 24 |
451669051 ps |
| T535 |
/workspace/coverage/default/37.sram_ctrl_regwen.809976361 |
|
|
Jan 07 12:49:15 PM PST 24 |
Jan 07 12:52:57 PM PST 24 |
13460088378 ps |
| T536 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.4277915245 |
|
|
Jan 07 12:47:43 PM PST 24 |
Jan 07 12:49:26 PM PST 24 |
529483073 ps |
| T537 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.142717828 |
|
|
Jan 07 12:48:28 PM PST 24 |
Jan 07 12:49:38 PM PST 24 |
79003968 ps |
| T538 |
/workspace/coverage/default/13.sram_ctrl_alert_test.236214254 |
|
|
Jan 07 12:47:51 PM PST 24 |
Jan 07 12:49:10 PM PST 24 |
27261823 ps |
| T539 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2626426209 |
|
|
Jan 07 12:47:08 PM PST 24 |
Jan 07 12:48:55 PM PST 24 |
41318633 ps |
| T540 |
/workspace/coverage/default/33.sram_ctrl_executable.421251823 |
|
|
Jan 07 12:48:17 PM PST 24 |
Jan 07 12:57:17 PM PST 24 |
2608791612 ps |
| T541 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.57930989 |
|
|
Jan 07 12:48:31 PM PST 24 |
Jan 07 12:55:25 PM PST 24 |
4802568357 ps |
| T542 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2510180146 |
|
|
Jan 07 12:48:58 PM PST 24 |
Jan 07 12:55:54 PM PST 24 |
4775189766 ps |
| T543 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1418645929 |
|
|
Jan 07 12:46:58 PM PST 24 |
Jan 07 01:27:53 PM PST 24 |
323948765982 ps |
| T544 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.1490467927 |
|
|
Jan 07 12:48:54 PM PST 24 |
Jan 07 12:56:32 PM PST 24 |
20667115783 ps |
| T545 |
/workspace/coverage/default/25.sram_ctrl_alert_test.2585820336 |
|
|
Jan 07 12:48:02 PM PST 24 |
Jan 07 12:49:22 PM PST 24 |
12168357 ps |
| T546 |
/workspace/coverage/default/30.sram_ctrl_stress_all.3055941458 |
|
|
Jan 07 12:48:45 PM PST 24 |
Jan 07 01:30:19 PM PST 24 |
35330521196 ps |
| T547 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.3301840797 |
|
|
Jan 07 12:47:43 PM PST 24 |
Jan 07 12:50:03 PM PST 24 |
144204212 ps |
| T548 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3643504443 |
|
|
Jan 07 12:46:46 PM PST 24 |
Jan 07 01:05:47 PM PST 24 |
183713273 ps |
| T549 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2616391222 |
|
|
Jan 07 12:49:15 PM PST 24 |
Jan 07 12:53:57 PM PST 24 |
9074308427 ps |
| T550 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.3707514369 |
|
|
Jan 07 12:46:33 PM PST 24 |
Jan 07 12:48:12 PM PST 24 |
149325656 ps |
| T551 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.3716029765 |
|
|
Jan 07 12:47:11 PM PST 24 |
Jan 07 12:49:24 PM PST 24 |
472487124 ps |
| T552 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.125632617 |
|
|
Jan 07 12:48:02 PM PST 24 |
Jan 07 12:52:46 PM PST 24 |
44073302948 ps |
| T553 |
/workspace/coverage/default/7.sram_ctrl_partial_access.975455444 |
|
|
Jan 07 12:47:08 PM PST 24 |
Jan 07 12:48:42 PM PST 24 |
540969498 ps |
| T554 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.2164896319 |
|
|
Jan 07 12:47:13 PM PST 24 |
Jan 07 12:50:12 PM PST 24 |
260518763 ps |
| T555 |
/workspace/coverage/default/28.sram_ctrl_stress_all.1625305841 |
|
|
Jan 07 12:48:08 PM PST 24 |
Jan 07 01:15:48 PM PST 24 |
101818619429 ps |
| T556 |
/workspace/coverage/default/24.sram_ctrl_alert_test.2741553859 |
|
|
Jan 07 12:48:01 PM PST 24 |
Jan 07 12:49:15 PM PST 24 |
66847672 ps |
| T557 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.2041915801 |
|
|
Jan 07 12:46:35 PM PST 24 |
Jan 07 12:50:40 PM PST 24 |
1159838440 ps |
| T558 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2849026612 |
|
|
Jan 07 12:47:33 PM PST 24 |
Jan 07 12:48:59 PM PST 24 |
165698417 ps |
| T559 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1443894636 |
|
|
Jan 07 12:48:03 PM PST 24 |
Jan 07 12:57:36 PM PST 24 |
2297866638 ps |
| T560 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.1561507840 |
|
|
Jan 07 12:47:58 PM PST 24 |
Jan 07 12:49:10 PM PST 24 |
138070464 ps |
| T561 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3208574629 |
|
|
Jan 07 12:48:29 PM PST 24 |
Jan 07 01:05:50 PM PST 24 |
3274301933 ps |
| T562 |
/workspace/coverage/default/39.sram_ctrl_executable.1130244831 |
|
|
Jan 07 12:48:47 PM PST 24 |
Jan 07 12:54:30 PM PST 24 |
30013766122 ps |
| T563 |
/workspace/coverage/default/32.sram_ctrl_alert_test.1568004439 |
|
|
Jan 07 12:48:40 PM PST 24 |
Jan 07 12:49:56 PM PST 24 |
14390652 ps |
| T564 |
/workspace/coverage/default/37.sram_ctrl_executable.2431777452 |
|
|
Jan 07 12:49:06 PM PST 24 |
Jan 07 01:03:45 PM PST 24 |
13630672298 ps |
| T565 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2810408585 |
|
|
Jan 07 12:48:40 PM PST 24 |
Jan 07 12:49:51 PM PST 24 |
569454403 ps |
| T566 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1806659220 |
|
|
Jan 07 12:49:54 PM PST 24 |
Jan 07 12:51:06 PM PST 24 |
31207903 ps |
| T567 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3127203629 |
|
|
Jan 07 12:49:18 PM PST 24 |
Jan 07 12:50:37 PM PST 24 |
575022001 ps |
| T568 |
/workspace/coverage/default/23.sram_ctrl_bijection.293147256 |
|
|
Jan 07 12:47:47 PM PST 24 |
Jan 07 12:50:05 PM PST 24 |
31943329717 ps |
| T569 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3414572446 |
|
|
Jan 07 12:49:00 PM PST 24 |
Jan 07 12:57:35 PM PST 24 |
13053471908 ps |
| T570 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2125245580 |
|
|
Jan 07 12:48:36 PM PST 24 |
Jan 07 12:49:48 PM PST 24 |
770542750 ps |
| T571 |
/workspace/coverage/default/37.sram_ctrl_bijection.2610533017 |
|
|
Jan 07 12:49:18 PM PST 24 |
Jan 07 12:51:01 PM PST 24 |
2080016303 ps |
| T572 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.426538957 |
|
|
Jan 07 12:48:52 PM PST 24 |
Jan 07 12:53:38 PM PST 24 |
1764404475 ps |
| T573 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2356481895 |
|
|
Jan 07 12:48:17 PM PST 24 |
Jan 07 12:55:49 PM PST 24 |
35310506086 ps |
| T574 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2928747436 |
|
|
Jan 07 12:48:42 PM PST 24 |
Jan 07 12:53:32 PM PST 24 |
8840438513 ps |
| T575 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4132717614 |
|
|
Jan 07 12:46:25 PM PST 24 |
Jan 07 12:47:54 PM PST 24 |
80995441 ps |
| T576 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1084399011 |
|
|
Jan 07 12:47:18 PM PST 24 |
Jan 07 12:48:37 PM PST 24 |
8707824353 ps |
| T577 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.167693707 |
|
|
Jan 07 12:46:36 PM PST 24 |
Jan 07 12:58:43 PM PST 24 |
11868975924 ps |
| T578 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.3784643169 |
|
|
Jan 07 12:47:30 PM PST 24 |
Jan 07 12:48:40 PM PST 24 |
269892352 ps |
| T579 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.397554818 |
|
|
Jan 07 12:47:07 PM PST 24 |
Jan 07 12:48:16 PM PST 24 |
238580219 ps |
| T580 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1334635316 |
|
|
Jan 07 12:48:14 PM PST 24 |
Jan 07 12:49:57 PM PST 24 |
722497282 ps |
| T581 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1288589802 |
|
|
Jan 07 12:47:24 PM PST 24 |
Jan 07 12:53:58 PM PST 24 |
13510111513 ps |
| T582 |
/workspace/coverage/default/36.sram_ctrl_stress_all.3162614738 |
|
|
Jan 07 12:49:02 PM PST 24 |
Jan 07 01:55:15 PM PST 24 |
45100121163 ps |
| T583 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.1700184138 |
|
|
Jan 07 12:48:04 PM PST 24 |
Jan 07 12:50:08 PM PST 24 |
2722922597 ps |
| T584 |
/workspace/coverage/default/17.sram_ctrl_regwen.3948714802 |
|
|
Jan 07 12:48:03 PM PST 24 |
Jan 07 12:53:25 PM PST 24 |
65455952366 ps |
| T585 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2280691394 |
|
|
Jan 07 12:46:50 PM PST 24 |
Jan 07 12:53:46 PM PST 24 |
14308885388 ps |
| T586 |
/workspace/coverage/default/40.sram_ctrl_bijection.2653934743 |
|
|
Jan 07 12:49:51 PM PST 24 |
Jan 07 12:52:04 PM PST 24 |
2057280117 ps |
| T587 |
/workspace/coverage/default/33.sram_ctrl_alert_test.412430770 |
|
|
Jan 07 12:48:42 PM PST 24 |
Jan 07 12:50:02 PM PST 24 |
47863317 ps |
| T588 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.3976811049 |
|
|
Jan 07 12:48:02 PM PST 24 |
Jan 07 12:53:40 PM PST 24 |
7381849830 ps |
| T589 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.361463653 |
|
|
Jan 07 12:47:05 PM PST 24 |
Jan 07 12:59:38 PM PST 24 |
2641017593 ps |
| T590 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.2121382029 |
|
|
Jan 07 12:48:18 PM PST 24 |
Jan 07 12:52:31 PM PST 24 |
1799576608 ps |
| T591 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3196205072 |
|
|
Jan 07 12:49:02 PM PST 24 |
Jan 07 12:50:33 PM PST 24 |
28836380 ps |
| T592 |
/workspace/coverage/default/14.sram_ctrl_executable.4137379800 |
|
|
Jan 07 12:48:25 PM PST 24 |
Jan 07 12:56:55 PM PST 24 |
33720697459 ps |
| T593 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.1074655711 |
|
|
Jan 07 12:48:12 PM PST 24 |
Jan 07 12:49:20 PM PST 24 |
163689648 ps |
| T594 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.3369744305 |
|
|
Jan 07 12:48:31 PM PST 24 |
Jan 07 01:06:51 PM PST 24 |
2638984631 ps |
| T595 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.761127393 |
|
|
Jan 07 12:48:30 PM PST 24 |
Jan 07 12:49:42 PM PST 24 |
813619493 ps |
| T596 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2378160634 |
|
|
Jan 07 12:48:22 PM PST 24 |
Jan 07 12:55:00 PM PST 24 |
9750305474 ps |
| T597 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3171467308 |
|
|
Jan 07 12:49:11 PM PST 24 |
Jan 07 12:50:31 PM PST 24 |
330409850 ps |
| T598 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2943844010 |
|
|
Jan 07 12:47:06 PM PST 24 |
Jan 07 12:48:41 PM PST 24 |
177580090 ps |
| T599 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.3860056280 |
|
|
Jan 07 12:48:25 PM PST 24 |
Jan 07 12:49:54 PM PST 24 |
550806159 ps |
| T600 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.806588227 |
|
|
Jan 07 12:49:06 PM PST 24 |
Jan 07 12:53:35 PM PST 24 |
2977157248 ps |
| T601 |
/workspace/coverage/default/21.sram_ctrl_smoke.3959246327 |
|
|
Jan 07 12:47:53 PM PST 24 |
Jan 07 12:49:32 PM PST 24 |
999993496 ps |
| T602 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.193848345 |
|
|
Jan 07 12:48:23 PM PST 24 |
Jan 07 12:49:47 PM PST 24 |
1537312525 ps |
| T603 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1179996061 |
|
|
Jan 07 12:46:37 PM PST 24 |
Jan 07 12:48:26 PM PST 24 |
1009299324 ps |
| T604 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.4030991391 |
|
|
Jan 07 12:47:48 PM PST 24 |
Jan 07 01:09:12 PM PST 24 |
241206430 ps |
| T605 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1096255595 |
|
|
Jan 07 12:46:56 PM PST 24 |
Jan 07 12:48:04 PM PST 24 |
51327207 ps |
| T606 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.4005124707 |
|
|
Jan 07 12:47:59 PM PST 24 |
Jan 07 12:54:41 PM PST 24 |
4808252503 ps |
| T607 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.4259352075 |
|
|
Jan 07 12:47:46 PM PST 24 |
Jan 07 12:51:41 PM PST 24 |
6949251432 ps |
| T608 |
/workspace/coverage/default/21.sram_ctrl_alert_test.674498325 |
|
|
Jan 07 12:47:57 PM PST 24 |
Jan 07 12:49:12 PM PST 24 |
18733886 ps |
| T609 |
/workspace/coverage/default/27.sram_ctrl_alert_test.3770437166 |
|
|
Jan 07 12:48:15 PM PST 24 |
Jan 07 12:49:43 PM PST 24 |
13232177 ps |
| T610 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3954199883 |
|
|
Jan 07 12:47:32 PM PST 24 |
Jan 07 12:50:40 PM PST 24 |
813778384 ps |
| T611 |
/workspace/coverage/default/16.sram_ctrl_partial_access.3907060565 |
|
|
Jan 07 12:47:18 PM PST 24 |
Jan 07 12:50:02 PM PST 24 |
621385327 ps |
| T612 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1365892191 |
|
|
Jan 07 12:49:12 PM PST 24 |
Jan 07 12:50:48 PM PST 24 |
1858891561 ps |
| T613 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.1642218975 |
|
|
Jan 07 12:48:35 PM PST 24 |
Jan 07 12:49:56 PM PST 24 |
195052438 ps |
| T614 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3521060259 |
|
|
Jan 07 12:47:03 PM PST 24 |
Jan 07 12:48:14 PM PST 24 |
212566746 ps |
| T615 |
/workspace/coverage/default/35.sram_ctrl_executable.2477973882 |
|
|
Jan 07 12:49:12 PM PST 24 |
Jan 07 12:52:40 PM PST 24 |
14169116587 ps |
| T616 |
/workspace/coverage/default/15.sram_ctrl_regwen.2351461489 |
|
|
Jan 07 12:48:00 PM PST 24 |
Jan 07 01:01:50 PM PST 24 |
59921954645 ps |
| T617 |
/workspace/coverage/default/33.sram_ctrl_regwen.3632735635 |
|
|
Jan 07 12:48:13 PM PST 24 |
Jan 07 12:59:57 PM PST 24 |
36098117505 ps |
| T618 |
/workspace/coverage/default/30.sram_ctrl_regwen.127151478 |
|
|
Jan 07 12:48:18 PM PST 24 |
Jan 07 01:00:35 PM PST 24 |
106917586645 ps |
| T619 |
/workspace/coverage/default/30.sram_ctrl_executable.3295655257 |
|
|
Jan 07 12:48:40 PM PST 24 |
Jan 07 12:59:57 PM PST 24 |
10297256314 ps |
| T620 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1106996947 |
|
|
Jan 07 12:48:04 PM PST 24 |
Jan 07 01:45:14 PM PST 24 |
5620093301 ps |
| T621 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.1417302466 |
|
|
Jan 07 12:47:54 PM PST 24 |
Jan 07 12:50:30 PM PST 24 |
2002574786 ps |
| T622 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.4203110106 |
|
|
Jan 07 12:47:16 PM PST 24 |
Jan 07 12:48:35 PM PST 24 |
113589442 ps |
| T623 |
/workspace/coverage/default/17.sram_ctrl_executable.238151670 |
|
|
Jan 07 12:47:59 PM PST 24 |
Jan 07 12:56:27 PM PST 24 |
27099682843 ps |
| T624 |
/workspace/coverage/default/15.sram_ctrl_executable.1092889019 |
|
|
Jan 07 12:47:43 PM PST 24 |
Jan 07 01:00:27 PM PST 24 |
57431802786 ps |
| T625 |
/workspace/coverage/default/29.sram_ctrl_partial_access.2298789815 |
|
|
Jan 07 12:48:34 PM PST 24 |
Jan 07 12:50:16 PM PST 24 |
273855847 ps |
| T626 |
/workspace/coverage/default/23.sram_ctrl_alert_test.1731415012 |
|
|
Jan 07 12:48:21 PM PST 24 |
Jan 07 12:49:39 PM PST 24 |
17247057 ps |
| T627 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.1468392168 |
|
|
Jan 07 12:48:26 PM PST 24 |
Jan 07 12:50:02 PM PST 24 |
79020278 ps |
| T628 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2950996525 |
|
|
Jan 07 12:48:02 PM PST 24 |
Jan 07 12:49:17 PM PST 24 |
176395855 ps |
| T629 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2187821379 |
|
|
Jan 07 12:46:28 PM PST 24 |
Jan 07 12:50:37 PM PST 24 |
1437007431 ps |
| T630 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2121785413 |
|
|
Jan 07 12:47:03 PM PST 24 |
Jan 07 12:48:16 PM PST 24 |
14970866 ps |
| T631 |
/workspace/coverage/default/41.sram_ctrl_partial_access.2289319498 |
|
|
Jan 07 12:48:41 PM PST 24 |
Jan 07 12:50:24 PM PST 24 |
333173429 ps |
| T632 |
/workspace/coverage/default/49.sram_ctrl_bijection.1709383131 |
|
|
Jan 07 12:49:48 PM PST 24 |
Jan 07 12:53:25 PM PST 24 |
9582938934 ps |
| T633 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1407586146 |
|
|
Jan 07 12:47:11 PM PST 24 |
Jan 07 12:48:36 PM PST 24 |
175865028 ps |
| T634 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3149416374 |
|
|
Jan 07 12:49:49 PM PST 24 |
Jan 07 12:50:59 PM PST 24 |
586102104 ps |
| T635 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1539107359 |
|
|
Jan 07 12:48:21 PM PST 24 |
Jan 07 12:50:07 PM PST 24 |
379372046 ps |
| T636 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.846300599 |
|
|
Jan 07 12:47:12 PM PST 24 |
Jan 07 12:48:49 PM PST 24 |
39168974 ps |
| T637 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2844437419 |
|
|
Jan 07 12:49:41 PM PST 24 |
Jan 07 01:05:45 PM PST 24 |
6167248123 ps |
| T638 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.198648232 |
|
|
Jan 07 12:46:21 PM PST 24 |
Jan 07 12:54:56 PM PST 24 |
11717349342 ps |
| T639 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.1695145933 |
|
|
Jan 07 12:48:37 PM PST 24 |
Jan 07 12:55:54 PM PST 24 |
7270453715 ps |
| T640 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.729134307 |
|
|
Jan 07 12:48:43 PM PST 24 |
Jan 07 12:49:52 PM PST 24 |
226790644 ps |
| T641 |
/workspace/coverage/default/18.sram_ctrl_partial_access.1963488949 |
|
|
Jan 07 12:48:23 PM PST 24 |
Jan 07 12:50:20 PM PST 24 |
336517809 ps |
| T642 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.14722664 |
|
|
Jan 07 12:48:11 PM PST 24 |
Jan 07 01:06:44 PM PST 24 |
110127522103 ps |
| T643 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.166766539 |
|
|
Jan 07 12:48:41 PM PST 24 |
Jan 07 12:53:49 PM PST 24 |
2543456514 ps |
| T644 |
/workspace/coverage/default/33.sram_ctrl_partial_access.1266096553 |
|
|
Jan 07 12:48:19 PM PST 24 |
Jan 07 12:49:54 PM PST 24 |
385579716 ps |
| T645 |
/workspace/coverage/default/38.sram_ctrl_partial_access.3555024199 |
|
|
Jan 07 12:49:05 PM PST 24 |
Jan 07 12:50:41 PM PST 24 |
2648042424 ps |
| T646 |
/workspace/coverage/default/13.sram_ctrl_regwen.2716814212 |
|
|
Jan 07 12:47:36 PM PST 24 |
Jan 07 12:57:41 PM PST 24 |
5086847271 ps |
| T647 |
/workspace/coverage/default/20.sram_ctrl_regwen.540902120 |
|
|
Jan 07 12:48:24 PM PST 24 |
Jan 07 12:52:39 PM PST 24 |
6584114602 ps |
| T648 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.3516448550 |
|
|
Jan 07 12:48:48 PM PST 24 |
Jan 07 12:55:30 PM PST 24 |
67435476333 ps |
| T649 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.1895574280 |
|
|
Jan 07 12:48:16 PM PST 24 |
Jan 07 12:50:02 PM PST 24 |
376532119 ps |
| T650 |
/workspace/coverage/default/0.sram_ctrl_regwen.2088569157 |
|
|
Jan 07 12:46:24 PM PST 24 |
Jan 07 12:58:23 PM PST 24 |
21245391674 ps |
| T651 |
/workspace/coverage/default/2.sram_ctrl_stress_all.3034161445 |
|
|
Jan 07 12:46:27 PM PST 24 |
Jan 07 01:46:26 PM PST 24 |
92331133258 ps |
| T652 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.3611761526 |
|
|
Jan 07 12:47:51 PM PST 24 |
Jan 07 01:01:39 PM PST 24 |
12582724505 ps |
| T653 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2847865204 |
|
|
Jan 07 12:48:24 PM PST 24 |
Jan 07 12:50:36 PM PST 24 |
143414717 ps |
| T654 |
/workspace/coverage/default/47.sram_ctrl_bijection.2467803617 |
|
|
Jan 07 12:48:56 PM PST 24 |
Jan 07 12:51:00 PM PST 24 |
634600223 ps |
| T655 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.412783288 |
|
|
Jan 07 12:48:10 PM PST 24 |
Jan 07 12:49:51 PM PST 24 |
96834602 ps |
| T656 |
/workspace/coverage/default/34.sram_ctrl_regwen.1460133410 |
|
|
Jan 07 12:48:47 PM PST 24 |
Jan 07 12:52:02 PM PST 24 |
12066651754 ps |
| T657 |
/workspace/coverage/default/16.sram_ctrl_regwen.1636251698 |
|
|
Jan 07 12:47:23 PM PST 24 |
Jan 07 12:51:04 PM PST 24 |
2202193315 ps |
| T658 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.3534208181 |
|
|
Jan 07 12:48:51 PM PST 24 |
Jan 07 12:50:16 PM PST 24 |
89744050 ps |
| T659 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.2183191704 |
|
|
Jan 07 12:47:20 PM PST 24 |
Jan 07 12:48:51 PM PST 24 |
4333527101 ps |
| T660 |
/workspace/coverage/default/6.sram_ctrl_bijection.94577302 |
|
|
Jan 07 12:47:00 PM PST 24 |
Jan 07 12:48:59 PM PST 24 |
2631279034 ps |
| T661 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.886708118 |
|
|
Jan 07 12:48:21 PM PST 24 |
Jan 07 12:52:39 PM PST 24 |
7695298544 ps |
| T662 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.3411574870 |
|
|
Jan 07 12:48:43 PM PST 24 |
Jan 07 12:53:13 PM PST 24 |
2159793315 ps |
| T663 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.3678703333 |
|
|
Jan 07 12:48:26 PM PST 24 |
Jan 07 12:50:31 PM PST 24 |
91224885 ps |
| T664 |
/workspace/coverage/default/0.sram_ctrl_partial_access.654267337 |
|
|
Jan 07 12:46:27 PM PST 24 |
Jan 07 12:48:09 PM PST 24 |
533693905 ps |
| T665 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.93253976 |
|
|
Jan 07 12:47:46 PM PST 24 |
Jan 07 12:48:57 PM PST 24 |
81881455 ps |
| T666 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.39705504 |
|
|
Jan 07 12:49:05 PM PST 24 |
Jan 07 12:54:46 PM PST 24 |
21268183981 ps |
| T667 |
/workspace/coverage/default/43.sram_ctrl_stress_all.2939316977 |
|
|
Jan 07 12:49:08 PM PST 24 |
Jan 07 01:17:20 PM PST 24 |
58024005534 ps |
| T668 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.2879874756 |
|
|
Jan 07 12:46:27 PM PST 24 |
Jan 07 12:48:34 PM PST 24 |
2083230046 ps |
| T669 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3668101574 |
|
|
Jan 07 12:49:32 PM PST 24 |
Jan 07 12:50:40 PM PST 24 |
292264759 ps |
| T670 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.2103151525 |
|
|
Jan 07 12:46:45 PM PST 24 |
Jan 07 12:56:48 PM PST 24 |
2475140387 ps |
| T671 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1374102536 |
|
|
Jan 07 12:47:45 PM PST 24 |
Jan 07 12:54:28 PM PST 24 |
13795365527 ps |
| T672 |
/workspace/coverage/default/9.sram_ctrl_smoke.733956329 |
|
|
Jan 07 12:47:13 PM PST 24 |
Jan 07 12:48:35 PM PST 24 |
154131922 ps |
| T673 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.268724703 |
|
|
Jan 07 12:47:00 PM PST 24 |
Jan 07 01:02:42 PM PST 24 |
9692256206 ps |
| T674 |
/workspace/coverage/default/49.sram_ctrl_executable.1868245063 |
|
|
Jan 07 12:49:05 PM PST 24 |
Jan 07 01:14:57 PM PST 24 |
16920738563 ps |
| T675 |
/workspace/coverage/default/26.sram_ctrl_bijection.1132940330 |
|
|
Jan 07 12:48:00 PM PST 24 |
Jan 07 12:49:55 PM PST 24 |
1515988911 ps |
| T676 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.976577094 |
|
|
Jan 07 12:49:52 PM PST 24 |
Jan 07 12:51:37 PM PST 24 |
102455810 ps |
| T677 |
/workspace/coverage/default/24.sram_ctrl_stress_all.417965934 |
|
|
Jan 07 12:48:05 PM PST 24 |
Jan 07 02:12:35 PM PST 24 |
32128165926 ps |
| T678 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3302786629 |
|
|
Jan 07 12:46:47 PM PST 24 |
Jan 07 12:52:23 PM PST 24 |
5007707229 ps |
| T679 |
/workspace/coverage/default/36.sram_ctrl_regwen.3728402323 |
|
|
Jan 07 12:49:05 PM PST 24 |
Jan 07 01:02:38 PM PST 24 |
15085984815 ps |
| T680 |
/workspace/coverage/default/20.sram_ctrl_executable.1472647868 |
|
|
Jan 07 12:47:58 PM PST 24 |
Jan 07 12:55:47 PM PST 24 |
6980077693 ps |
| T681 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.2828157206 |
|
|
Jan 07 12:49:02 PM PST 24 |
Jan 07 12:50:33 PM PST 24 |
645287830 ps |
| T682 |
/workspace/coverage/default/6.sram_ctrl_regwen.1407644543 |
|
|
Jan 07 12:46:45 PM PST 24 |
Jan 07 01:03:40 PM PST 24 |
14932473616 ps |
| T683 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.3877663734 |
|
|
Jan 07 12:49:17 PM PST 24 |
Jan 07 12:50:35 PM PST 24 |
130081133 ps |
| T684 |
/workspace/coverage/default/29.sram_ctrl_smoke.654223400 |
|
|
Jan 07 12:48:07 PM PST 24 |
Jan 07 12:49:47 PM PST 24 |
793528380 ps |
| T685 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4025288671 |
|
|
Jan 07 12:49:14 PM PST 24 |
Jan 07 12:55:05 PM PST 24 |
10875128342 ps |
| T686 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2524111399 |
|
|
Jan 07 12:46:42 PM PST 24 |
Jan 07 12:50:43 PM PST 24 |
6718297726 ps |
| T687 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.928026663 |
|
|
Jan 07 12:46:24 PM PST 24 |
Jan 07 12:53:01 PM PST 24 |
10105871138 ps |
| T688 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.4213493137 |
|
|
Jan 07 12:48:36 PM PST 24 |
Jan 07 12:49:44 PM PST 24 |
765729419 ps |
| T689 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1588563467 |
|
|
Jan 07 12:49:27 PM PST 24 |
Jan 07 12:50:57 PM PST 24 |
62082535 ps |
| T690 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3641111190 |
|
|
Jan 07 12:49:14 PM PST 24 |
Jan 07 12:55:08 PM PST 24 |
9748016415 ps |
| T691 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3164781539 |
|
|
Jan 07 12:46:54 PM PST 24 |
Jan 07 12:56:41 PM PST 24 |
4948170826 ps |
| T692 |
/workspace/coverage/default/41.sram_ctrl_regwen.4069300116 |
|
|
Jan 07 12:49:08 PM PST 24 |
Jan 07 01:00:23 PM PST 24 |
11018510603 ps |
| T693 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3556626590 |
|
|
Jan 07 12:48:07 PM PST 24 |
Jan 07 12:51:19 PM PST 24 |
1127930659 ps |
| T694 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3858880101 |
|
|
Jan 07 12:47:57 PM PST 24 |
Jan 07 12:55:35 PM PST 24 |
14834701201 ps |
| T695 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.229177187 |
|
|
Jan 07 12:48:54 PM PST 24 |
Jan 07 12:59:31 PM PST 24 |
3130723742 ps |
| T696 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4292418849 |
|
|
Jan 07 12:49:16 PM PST 24 |
Jan 07 12:53:25 PM PST 24 |
11666454073 ps |
| T697 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3933219804 |
|
|
Jan 07 12:48:20 PM PST 24 |
Jan 07 02:34:07 PM PST 24 |
11400024923 ps |
| T698 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2736642554 |
|
|
Jan 07 12:47:10 PM PST 24 |
Jan 07 12:53:01 PM PST 24 |
19379018913 ps |
| T699 |
/workspace/coverage/default/27.sram_ctrl_regwen.2400656071 |
|
|
Jan 07 12:48:41 PM PST 24 |
Jan 07 12:51:04 PM PST 24 |
2023111397 ps |
| T700 |
/workspace/coverage/default/44.sram_ctrl_partial_access.748816705 |
|
|
Jan 07 12:49:21 PM PST 24 |
Jan 07 12:51:51 PM PST 24 |
553917255 ps |
| T701 |
/workspace/coverage/default/25.sram_ctrl_bijection.685413805 |
|
|
Jan 07 12:48:33 PM PST 24 |
Jan 07 12:50:37 PM PST 24 |
477965229 ps |
| T702 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3351636531 |
|
|
Jan 07 12:48:53 PM PST 24 |
Jan 07 12:50:15 PM PST 24 |
280643369 ps |
| T703 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.1227650748 |
|
|
Jan 07 12:47:51 PM PST 24 |
Jan 07 12:49:13 PM PST 24 |
673590947 ps |
| T704 |
/workspace/coverage/default/26.sram_ctrl_alert_test.815496039 |
|
|
Jan 07 12:48:31 PM PST 24 |
Jan 07 12:49:35 PM PST 24 |
31851952 ps |
| T705 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.1052232149 |
|
|
Jan 07 12:47:06 PM PST 24 |
Jan 07 12:48:48 PM PST 24 |
347774917 ps |
| T706 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.3723818329 |
|
|
Jan 07 12:48:09 PM PST 24 |
Jan 07 12:49:28 PM PST 24 |
1141620939 ps |
| T707 |
/workspace/coverage/default/1.sram_ctrl_regwen.1653459701 |
|
|
Jan 07 12:46:24 PM PST 24 |
Jan 07 12:57:51 PM PST 24 |
3506740577 ps |
| T708 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1222309659 |
|
|
Jan 07 12:49:23 PM PST 24 |
Jan 07 01:00:40 PM PST 24 |
87732770073 ps |
| T709 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.1274313083 |
|
|
Jan 07 12:49:11 PM PST 24 |
Jan 07 12:50:31 PM PST 24 |
656127543 ps |
| T710 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.849741875 |
|
|
Jan 07 12:49:01 PM PST 24 |
Jan 07 12:54:17 PM PST 24 |
13650202079 ps |
| T711 |
/workspace/coverage/default/3.sram_ctrl_alert_test.2419648098 |
|
|
Jan 07 12:46:59 PM PST 24 |
Jan 07 12:48:06 PM PST 24 |
136230211 ps |
| T712 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1128860079 |
|
|
Jan 07 12:48:33 PM PST 24 |
Jan 07 12:50:31 PM PST 24 |
360284791 ps |
| T713 |
/workspace/coverage/default/7.sram_ctrl_smoke.2260423944 |
|
|
Jan 07 12:46:58 PM PST 24 |
Jan 07 12:48:36 PM PST 24 |
134355980 ps |
| T714 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.4273302326 |
|
|
Jan 07 12:49:18 PM PST 24 |
Jan 07 12:50:21 PM PST 24 |
283802114 ps |
| T715 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.1081351217 |
|
|
Jan 07 12:47:50 PM PST 24 |
Jan 07 12:50:34 PM PST 24 |
512955009 ps |
| T716 |
/workspace/coverage/default/31.sram_ctrl_bijection.953793521 |
|
|
Jan 07 12:48:27 PM PST 24 |
Jan 07 12:49:57 PM PST 24 |
4497174831 ps |
| T717 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.687019072 |
|
|
Jan 07 12:47:40 PM PST 24 |
Jan 07 12:56:14 PM PST 24 |
75320178471 ps |
| T718 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.4163862531 |
|
|
Jan 07 12:46:29 PM PST 24 |
Jan 07 12:47:57 PM PST 24 |
136484834 ps |
| T719 |
/workspace/coverage/default/42.sram_ctrl_bijection.267328303 |
|
|
Jan 07 12:49:27 PM PST 24 |
Jan 07 12:51:20 PM PST 24 |
1301430675 ps |
| T720 |
/workspace/coverage/default/11.sram_ctrl_regwen.3076773733 |
|
|
Jan 07 12:47:35 PM PST 24 |
Jan 07 12:53:28 PM PST 24 |
1469318107 ps |
| T721 |
/workspace/coverage/default/44.sram_ctrl_executable.754171113 |
|
|
Jan 07 12:49:37 PM PST 24 |
Jan 07 01:01:10 PM PST 24 |
4575805904 ps |
| T722 |
/workspace/coverage/default/35.sram_ctrl_stress_all.1941691919 |
|
|
Jan 07 12:48:56 PM PST 24 |
Jan 07 01:07:06 PM PST 24 |
11662788536 ps |
| T723 |
/workspace/coverage/default/1.sram_ctrl_executable.3971388722 |
|
|
Jan 07 12:47:03 PM PST 24 |
Jan 07 01:04:59 PM PST 24 |
26784010163 ps |
| T724 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2107978157 |
|
|
Jan 07 12:47:37 PM PST 24 |
Jan 07 12:51:45 PM PST 24 |
2634647940 ps |
| T725 |
/workspace/coverage/default/20.sram_ctrl_smoke.2962421597 |
|
|
Jan 07 12:47:50 PM PST 24 |
Jan 07 12:49:37 PM PST 24 |
400424389 ps |
| T726 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3467220691 |
|
|
Jan 07 12:46:48 PM PST 24 |
Jan 07 12:48:03 PM PST 24 |
80926766 ps |
| T727 |
/workspace/coverage/default/21.sram_ctrl_bijection.145589083 |
|
|
Jan 07 12:48:07 PM PST 24 |
Jan 07 12:51:02 PM PST 24 |
892989684 ps |
| T728 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.1452118922 |
|
|
Jan 07 12:48:19 PM PST 24 |
Jan 07 01:00:02 PM PST 24 |
79229014271 ps |
| T729 |
/workspace/coverage/default/25.sram_ctrl_executable.3908700312 |
|
|
Jan 07 12:48:12 PM PST 24 |
Jan 07 01:05:34 PM PST 24 |
2771762541 ps |
| T730 |
/workspace/coverage/default/32.sram_ctrl_regwen.1785568844 |
|
|
Jan 07 12:48:48 PM PST 24 |
Jan 07 01:12:49 PM PST 24 |
3435749140 ps |
| T731 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2254654973 |
|
|
Jan 07 12:46:53 PM PST 24 |
Jan 07 12:48:24 PM PST 24 |
165074847 ps |
| T732 |
/workspace/coverage/default/6.sram_ctrl_smoke.1559325199 |
|
|
Jan 07 12:46:25 PM PST 24 |
Jan 07 12:48:32 PM PST 24 |
384776153 ps |
| T733 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.518790120 |
|
|
Jan 07 12:49:08 PM PST 24 |
Jan 07 01:06:07 PM PST 24 |
31015691813 ps |
| T734 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.2092066789 |
|
|
Jan 07 12:46:27 PM PST 24 |
Jan 07 12:50:16 PM PST 24 |
3561260382 ps |
| T735 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.685726576 |
|
|
Jan 07 12:47:04 PM PST 24 |
Jan 07 12:49:45 PM PST 24 |
1328843257 ps |
| T736 |
/workspace/coverage/default/43.sram_ctrl_executable.3895966458 |
|
|
Jan 07 12:49:51 PM PST 24 |
Jan 07 12:54:38 PM PST 24 |
1606287971 ps |
| T737 |
/workspace/coverage/default/28.sram_ctrl_bijection.3978550869 |
|
|
Jan 07 12:48:37 PM PST 24 |
Jan 07 12:50:54 PM PST 24 |
8875183368 ps |
| T738 |
/workspace/coverage/default/2.sram_ctrl_smoke.4255633977 |
|
|
Jan 07 12:47:06 PM PST 24 |
Jan 07 12:48:56 PM PST 24 |
667577532 ps |
| T739 |
/workspace/coverage/default/25.sram_ctrl_smoke.1741679031 |
|
|
Jan 07 12:48:16 PM PST 24 |
Jan 07 12:49:47 PM PST 24 |
482196169 ps |
| T740 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.173690164 |
|
|
Jan 07 12:46:51 PM PST 24 |
Jan 07 12:59:49 PM PST 24 |
28254889893 ps |
| T741 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3493834474 |
|
|
Jan 07 12:47:22 PM PST 24 |
Jan 07 12:48:27 PM PST 24 |
22700175 ps |
| T742 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3928659199 |
|
|
Jan 07 12:48:13 PM PST 24 |
Jan 07 12:49:42 PM PST 24 |
322657631 ps |
| T743 |
/workspace/coverage/default/15.sram_ctrl_stress_all.2840718074 |
|
|
Jan 07 12:47:54 PM PST 24 |
Jan 07 01:40:12 PM PST 24 |
68923588015 ps |
| T744 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.2793336999 |
|
|
Jan 07 12:48:41 PM PST 24 |
Jan 07 01:02:52 PM PST 24 |
43992465949 ps |
| T745 |
/workspace/coverage/default/40.sram_ctrl_executable.1693130317 |
|
|
Jan 07 12:49:14 PM PST 24 |
Jan 07 01:03:18 PM PST 24 |
4946062055 ps |
| T746 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3323292344 |
|
|
Jan 07 12:47:13 PM PST 24 |
Jan 07 12:52:37 PM PST 24 |
2873348735 ps |
| T747 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.277350781 |
|
|
Jan 07 12:49:17 PM PST 24 |
Jan 07 01:47:49 PM PST 24 |
2506801533 ps |
| T748 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2007625114 |
|
|
Jan 07 12:48:28 PM PST 24 |
Jan 07 12:54:35 PM PST 24 |
3657298921 ps |
| T749 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.807164297 |
|
|
Jan 07 12:46:41 PM PST 24 |
Jan 07 12:55:51 PM PST 24 |
18384475837 ps |
| T750 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.220409237 |
|
|
Jan 07 12:26:04 PM PST 24 |
Jan 07 12:27:02 PM PST 24 |
11568417 ps |
| T90 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1749145432 |
|
|
Jan 07 12:39:03 PM PST 24 |
Jan 07 12:40:20 PM PST 24 |
208386688 ps |
| T64 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2225952217 |
|
|
Jan 07 12:31:17 PM PST 24 |
Jan 07 12:33:28 PM PST 24 |
766742670 ps |
| T751 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1159659202 |
|
|
Jan 07 12:31:16 PM PST 24 |
Jan 07 12:32:32 PM PST 24 |
57963261 ps |
| T93 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.742856777 |
|
|
Jan 07 12:30:27 PM PST 24 |
Jan 07 12:32:03 PM PST 24 |
93920954 ps |
| T94 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2999056388 |
|
|
Jan 07 12:24:05 PM PST 24 |
Jan 07 12:24:23 PM PST 24 |
139861745 ps |
| T65 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3331809211 |
|
|
Jan 07 12:25:31 PM PST 24 |
Jan 07 12:26:36 PM PST 24 |
42498146 ps |
| T95 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3011630308 |
|
|
Jan 07 12:36:59 PM PST 24 |
Jan 07 12:38:26 PM PST 24 |
382653383 ps |
| T66 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3418358454 |
|
|
Jan 07 12:26:47 PM PST 24 |
Jan 07 12:28:14 PM PST 24 |
521317443 ps |
| T752 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1590721966 |
|
|
Jan 07 12:26:19 PM PST 24 |
Jan 07 12:27:22 PM PST 24 |
29145281 ps |
| T67 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3669251351 |
|
|
Jan 07 12:25:59 PM PST 24 |
Jan 07 12:27:00 PM PST 24 |
49978061 ps |
| T753 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.369293878 |
|
|
Jan 07 12:31:12 PM PST 24 |
Jan 07 12:32:54 PM PST 24 |
45084593 ps |
| T754 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1345137532 |
|
|
Jan 07 12:30:44 PM PST 24 |
Jan 07 12:32:17 PM PST 24 |
34832562 ps |
| T91 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2644707759 |
|
|
Jan 07 12:32:26 PM PST 24 |
Jan 07 12:34:05 PM PST 24 |
211328676 ps |
| T104 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.585439629 |
|
|
Jan 07 12:24:06 PM PST 24 |
Jan 07 12:24:25 PM PST 24 |
182044609 ps |
| T755 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3257627523 |
|
|
Jan 07 12:31:41 PM PST 24 |
Jan 07 12:33:22 PM PST 24 |
118145912 ps |
| T92 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3835575820 |
|
|
Jan 07 12:28:29 PM PST 24 |
Jan 07 12:29:34 PM PST 24 |
1566806814 ps |
| T756 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2986362825 |
|
|
Jan 07 12:30:56 PM PST 24 |
Jan 07 12:32:37 PM PST 24 |
106250627 ps |
| T757 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2606997730 |
|
|
Jan 07 12:31:12 PM PST 24 |
Jan 07 12:33:26 PM PST 24 |
87611486 ps |
| T758 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2112446379 |
|
|
Jan 07 12:30:10 PM PST 24 |
Jan 07 12:32:30 PM PST 24 |
183390369 ps |
| T73 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.418109890 |
|
|
Jan 07 12:30:12 PM PST 24 |
Jan 07 12:31:46 PM PST 24 |
962295063 ps |
| T759 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3673833855 |
|
|
Jan 07 12:34:22 PM PST 24 |
Jan 07 12:35:37 PM PST 24 |
17185031 ps |
| T760 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.349200242 |
|
|
Jan 07 12:26:18 PM PST 24 |
Jan 07 12:27:22 PM PST 24 |
106697467 ps |
| T761 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2514971287 |
|
|
Jan 07 12:24:27 PM PST 24 |
Jan 07 12:25:09 PM PST 24 |
83329396 ps |
| T105 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2492299339 |
|
|
Jan 07 12:29:54 PM PST 24 |
Jan 07 12:31:38 PM PST 24 |
349648953 ps |
| T762 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.985784787 |
|
|
Jan 07 12:37:13 PM PST 24 |
Jan 07 12:38:32 PM PST 24 |
23056305 ps |
| T763 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.580711372 |
|
|
Jan 07 12:31:20 PM PST 24 |
Jan 07 12:32:57 PM PST 24 |
82628039 ps |
| T764 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2037494749 |
|
|
Jan 07 12:31:42 PM PST 24 |
Jan 07 12:33:28 PM PST 24 |
88560384 ps |
| T765 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1957567192 |
|
|
Jan 07 12:28:57 PM PST 24 |
Jan 07 12:30:12 PM PST 24 |
18249280 ps |
| T74 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3300917392 |
|
|
Jan 07 12:31:25 PM PST 24 |
Jan 07 12:33:06 PM PST 24 |
210991960 ps |
| T766 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1202539665 |
|
|
Jan 07 12:27:16 PM PST 24 |
Jan 07 12:28:28 PM PST 24 |
33209732 ps |
| T767 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2895557613 |
|
|
Jan 07 12:29:25 PM PST 24 |
Jan 07 12:30:46 PM PST 24 |
12424310 ps |