Unified Coverage Report :: Group :: sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sram_ctrl_env_0.1/sram_ctrl_env_cov.sv

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Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00
Crosses	10	0	10	100.00

Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
subword_granularity_cp	5	0	5	100.00	100	1	1	0
subword_we_cp	2	0	2	100.00	100	1	1	2

Crosses for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
subword_access	10	0	10	100.00	100	1	1	0

Summary for Variable subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	0	5	100.00

User Defined Bins for subword_granularity_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ill_access	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
word_access	45700983	1			T1	1099		T2	7114		T3	9326
triple_byte_access	2576628	1			T1	30		T2	143		T3	175
halfword_access	3863155	1			T1	30		T2	231		T3	294
byte_access	5161157	1			T1	55		T2	270		T3	404
zero_access	1299600	1			T1	18		T2	71		T3	91

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Summary for Variable subword_we_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for subword_we_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

29248154

1

T1

614

T2

3994

T3

5124

auto[1]

29353369

1

T1

618

T2

3835

T3

5166

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Summary for Cross subword_access

Samples crossed: subword_we_cp subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	0	10	100.00

Automatically Generated Cross Bins for subword_access

Bins

subword_we_cp	subword_granularity_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	word_access	22802766	1			T1	548		T2	3627		T3	4632
auto[0]	triple_byte_access	1284028	1			T1	17		T2	79		T3	96
auto[0]	halfword_access	1928161	1			T1	17		T2	116		T3	150
auto[0]	byte_access	2579363	1			T1	22		T2	141		T3	196
auto[0]	zero_access	653836	1			T1	10		T2	31		T3	50
auto[1]	word_access	22898217	1			T1	551		T2	3487		T3	4694
auto[1]	triple_byte_access	1292600	1			T1	13		T2	64		T3	79
auto[1]	halfword_access	1934994	1			T1	13		T2	115		T3	144
auto[1]	byte_access	2581794	1			T1	33		T2	129		T3	208
auto[1]	zero_access	645764	1			T1	8		T2	40		T3	41