Module Definition
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Module : sysrst_ctrl_autoblock
SCORELINECONDTOGGLEFSMBRANCHASSERT
66.67 100.00 50.00 50.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_autoblock.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_sysrst_ctrl_autoblock 66.67 100.00 50.00 50.00



Module Instance : tb.dut.u_sysrst_ctrl_autoblock

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
66.67 100.00 50.00 50.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
81.22 100.00 72.22 71.43


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
80.98 100.00 25.00 98.93 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_sysrst_ctrl_detect 86.87 100.00 83.33 77.27


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : sysrst_ctrl_autoblock
Line No.TotalCoveredPercent
TOTAL44100.00
CONT_ASSIGN4711100.00
CONT_ASSIGN4811100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_autoblock.sv' or '../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_autoblock.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
47 1 1
48 1 1
50 1 1
52 1 1


Cond Coverage for Module : sysrst_ctrl_autoblock
TotalCoveredPercent
Conditions6350.00
Logical6350.00
Non-Logical00
Event00

 LINE       48
 EXPRESSION (((aon_ab_cond_met & aon_auto_block_out_ctl_i.key0_out_sel.q)) ? aon_auto_block_out_ctl_i.key0_out_value.q : key0_int_i)
             ------------------------------1------------------------------
-1-StatusTests
0CoveredT4,T1,T5
1Not Covered

 LINE       50
 EXPRESSION (((aon_ab_cond_met & aon_auto_block_out_ctl_i.key1_out_sel.q)) ? aon_auto_block_out_ctl_i.key1_out_value.q : key1_int_i)
             ------------------------------1------------------------------
-1-StatusTests
0CoveredT4,T1,T5
1Not Covered

 LINE       52
 EXPRESSION (((aon_ab_cond_met & aon_auto_block_out_ctl_i.key2_out_sel.q)) ? aon_auto_block_out_ctl_i.key2_out_value.q : key2_int_i)
             ------------------------------1------------------------------
-1-StatusTests
0CoveredT4,T1,T5
1Not Covered

Branch Coverage for Module : sysrst_ctrl_autoblock
Line No.TotalCoveredPercent
Branches 6 3 50.00
TERNARY 48 2 1 50.00
TERNARY 50 2 1 50.00
TERNARY 52 2 1 50.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_autoblock.sv' or '../src/lowrisc_ip_sysrst_ctrl_1.0/rtl/sysrst_ctrl_autoblock.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 48 ((aon_ab_cond_met & aon_auto_block_out_ctl_i.key0_out_sel.q)) ?

Branches:
-1-StatusTests
1 Not Covered
0 Covered T4,T1,T5


LineNo. Expression -1-: 50 ((aon_ab_cond_met & aon_auto_block_out_ctl_i.key1_out_sel.q)) ?

Branches:
-1-StatusTests
1 Not Covered
0 Covered T4,T1,T5


LineNo. Expression -1-: 52 ((aon_ab_cond_met & aon_auto_block_out_ctl_i.key2_out_sel.q)) ?

Branches:
-1-StatusTests
1 Not Covered
0 Covered T4,T1,T5

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