| T601 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3048376607 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:43:29 PM PST 24 |
3797040104 ps |
| T602 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2558769187 |
|
|
Feb 18 01:44:33 PM PST 24 |
Feb 18 01:44:40 PM PST 24 |
2516996601 ps |
| T603 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2593225902 |
|
|
Feb 18 01:44:13 PM PST 24 |
Feb 18 01:44:19 PM PST 24 |
2518589532 ps |
| T604 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.4129670708 |
|
|
Feb 18 01:43:22 PM PST 24 |
Feb 18 01:44:17 PM PST 24 |
70295005773 ps |
| T379 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1214975840 |
|
|
Feb 18 01:42:58 PM PST 24 |
Feb 18 01:43:15 PM PST 24 |
50017045109 ps |
| T605 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3546472604 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:44:56 PM PST 24 |
95709490745 ps |
| T205 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.40937633 |
|
|
Feb 18 01:44:39 PM PST 24 |
Feb 18 01:46:27 PM PST 24 |
219606844903 ps |
| T75 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.448143178 |
|
|
Feb 18 01:42:25 PM PST 24 |
Feb 18 01:42:30 PM PST 24 |
9323742585 ps |
| T606 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1067833156 |
|
|
Feb 18 01:44:12 PM PST 24 |
Feb 18 01:44:20 PM PST 24 |
2112562089 ps |
| T607 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.4130872338 |
|
|
Feb 18 01:42:27 PM PST 24 |
Feb 18 01:42:34 PM PST 24 |
2011749574 ps |
| T608 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.2808245687 |
|
|
Feb 18 01:43:50 PM PST 24 |
Feb 18 01:50:42 PM PST 24 |
322791210795 ps |
| T609 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2146954643 |
|
|
Feb 18 01:42:49 PM PST 24 |
Feb 18 01:42:54 PM PST 24 |
3338677950 ps |
| T610 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2115301361 |
|
|
Feb 18 01:43:54 PM PST 24 |
Feb 18 01:44:02 PM PST 24 |
2623791964 ps |
| T611 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.1689958178 |
|
|
Feb 18 01:42:23 PM PST 24 |
Feb 18 01:42:31 PM PST 24 |
2109984036 ps |
| T612 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.807678873 |
|
|
Feb 18 01:44:45 PM PST 24 |
Feb 18 01:44:51 PM PST 24 |
2022552969 ps |
| T613 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1552646020 |
|
|
Feb 18 01:45:22 PM PST 24 |
Feb 18 01:45:49 PM PST 24 |
26852356959 ps |
| T614 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3601964622 |
|
|
Feb 18 01:44:01 PM PST 24 |
Feb 18 01:44:06 PM PST 24 |
2247209172 ps |
| T141 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.942286622 |
|
|
Feb 18 01:44:43 PM PST 24 |
Feb 18 01:44:55 PM PST 24 |
9512255323 ps |
| T615 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.3706625019 |
|
|
Feb 18 01:42:56 PM PST 24 |
Feb 18 01:43:10 PM PST 24 |
2011822643 ps |
| T616 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3499703069 |
|
|
Feb 18 01:44:08 PM PST 24 |
Feb 18 01:44:12 PM PST 24 |
3201046689 ps |
| T617 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.2552102236 |
|
|
Feb 18 01:44:28 PM PST 24 |
Feb 18 01:44:35 PM PST 24 |
2516929392 ps |
| T110 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.3406000562 |
|
|
Feb 18 01:43:27 PM PST 24 |
Feb 18 01:44:53 PM PST 24 |
96194713182 ps |
| T618 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.118780079 |
|
|
Feb 18 01:42:21 PM PST 24 |
Feb 18 01:42:25 PM PST 24 |
2985899538 ps |
| T619 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.155730752 |
|
|
Feb 18 01:43:14 PM PST 24 |
Feb 18 01:43:27 PM PST 24 |
2011992261 ps |
| T620 |
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2439818788 |
|
|
Feb 18 01:43:26 PM PST 24 |
Feb 18 01:43:34 PM PST 24 |
3407199293 ps |
| T621 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2706256658 |
|
|
Feb 18 01:42:54 PM PST 24 |
Feb 18 01:43:03 PM PST 24 |
2520173781 ps |
| T622 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.123296248 |
|
|
Feb 18 01:43:57 PM PST 24 |
Feb 18 01:44:05 PM PST 24 |
6495300977 ps |
| T623 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.2723994312 |
|
|
Feb 18 01:42:55 PM PST 24 |
Feb 18 01:43:12 PM PST 24 |
12658336048 ps |
| T624 |
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.1912913177 |
|
|
Feb 18 01:43:49 PM PST 24 |
Feb 18 01:43:57 PM PST 24 |
2123576331 ps |
| T625 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.4267249715 |
|
|
Feb 18 01:43:53 PM PST 24 |
Feb 18 01:43:58 PM PST 24 |
2116830706 ps |
| T626 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2188043744 |
|
|
Feb 18 01:44:04 PM PST 24 |
Feb 18 01:44:07 PM PST 24 |
4624725831 ps |
| T229 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.4178529712 |
|
|
Feb 18 01:45:00 PM PST 24 |
Feb 18 01:47:19 PM PST 24 |
210580333981 ps |
| T627 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.4261909132 |
|
|
Feb 18 01:42:56 PM PST 24 |
Feb 18 01:43:07 PM PST 24 |
3399614408 ps |
| T628 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.4131020642 |
|
|
Feb 18 01:44:42 PM PST 24 |
Feb 18 01:44:50 PM PST 24 |
16734607259 ps |
| T629 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.1553453924 |
|
|
Feb 18 01:43:52 PM PST 24 |
Feb 18 01:44:00 PM PST 24 |
3533806167 ps |
| T630 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.1342419388 |
|
|
Feb 18 01:42:26 PM PST 24 |
Feb 18 01:42:30 PM PST 24 |
2129005810 ps |
| T631 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2926701180 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:43:29 PM PST 24 |
3343781389 ps |
| T363 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3908799898 |
|
|
Feb 18 01:42:53 PM PST 24 |
Feb 18 01:43:23 PM PST 24 |
117589039427 ps |
| T632 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2832916647 |
|
|
Feb 18 01:44:34 PM PST 24 |
Feb 18 01:45:30 PM PST 24 |
81804557515 ps |
| T633 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.1699783825 |
|
|
Feb 18 01:43:10 PM PST 24 |
Feb 18 01:43:23 PM PST 24 |
2112810056 ps |
| T634 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3226675369 |
|
|
Feb 18 01:43:02 PM PST 24 |
Feb 18 01:43:11 PM PST 24 |
2599695439 ps |
| T635 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1950994721 |
|
|
Feb 18 01:44:10 PM PST 24 |
Feb 18 01:44:18 PM PST 24 |
2057408664 ps |
| T386 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.282193850 |
|
|
Feb 18 01:44:58 PM PST 24 |
Feb 18 01:46:15 PM PST 24 |
119855177681 ps |
| T260 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.122457777 |
|
|
Feb 18 01:45:02 PM PST 24 |
Feb 18 01:48:10 PM PST 24 |
71831058771 ps |
| T375 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1601947815 |
|
|
Feb 18 01:45:08 PM PST 24 |
Feb 18 01:46:39 PM PST 24 |
34215587498 ps |
| T636 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2684599479 |
|
|
Feb 18 01:44:12 PM PST 24 |
Feb 18 01:44:16 PM PST 24 |
3447456231 ps |
| T359 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1742266017 |
|
|
Feb 18 01:44:17 PM PST 24 |
Feb 18 01:45:43 PM PST 24 |
263208017954 ps |
| T637 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.1685552790 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:43:31 PM PST 24 |
2011174896 ps |
| T638 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.4030251396 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:43:26 PM PST 24 |
3085869904 ps |
| T639 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3461153720 |
|
|
Feb 18 01:43:37 PM PST 24 |
Feb 18 01:43:49 PM PST 24 |
2448514425 ps |
| T640 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2950746698 |
|
|
Feb 18 01:44:47 PM PST 24 |
Feb 18 01:44:59 PM PST 24 |
3259910220 ps |
| T641 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2672171875 |
|
|
Feb 18 01:43:34 PM PST 24 |
Feb 18 01:43:49 PM PST 24 |
3592960620 ps |
| T642 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.1572484210 |
|
|
Feb 18 01:43:29 PM PST 24 |
Feb 18 01:43:46 PM PST 24 |
15309448994 ps |
| T643 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2222599893 |
|
|
Feb 18 01:44:41 PM PST 24 |
Feb 18 01:44:46 PM PST 24 |
2500406987 ps |
| T162 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.330593387 |
|
|
Feb 18 01:44:27 PM PST 24 |
Feb 18 01:44:34 PM PST 24 |
3139264040 ps |
| T644 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.1839804682 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:43:30 PM PST 24 |
2011849645 ps |
| T645 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.4127748917 |
|
|
Feb 18 01:44:22 PM PST 24 |
Feb 18 01:44:27 PM PST 24 |
2522577399 ps |
| T646 |
/workspace/coverage/default/15.sysrst_ctrl_alert_test.708495267 |
|
|
Feb 18 01:43:08 PM PST 24 |
Feb 18 01:43:18 PM PST 24 |
2031841023 ps |
| T647 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1959787877 |
|
|
Feb 18 01:43:32 PM PST 24 |
Feb 18 01:44:26 PM PST 24 |
40516327816 ps |
| T648 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3191913568 |
|
|
Feb 18 01:43:26 PM PST 24 |
Feb 18 01:43:38 PM PST 24 |
2471945557 ps |
| T649 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2118050475 |
|
|
Feb 18 01:44:52 PM PST 24 |
Feb 18 01:45:03 PM PST 24 |
3023862455 ps |
| T650 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3283455198 |
|
|
Feb 18 01:44:37 PM PST 24 |
Feb 18 01:44:43 PM PST 24 |
2472054142 ps |
| T651 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.778742085 |
|
|
Feb 18 01:44:34 PM PST 24 |
Feb 18 01:46:57 PM PST 24 |
190459968676 ps |
| T286 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.3016446586 |
|
|
Feb 18 01:42:29 PM PST 24 |
Feb 18 01:44:25 PM PST 24 |
42008911496 ps |
| T652 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.3811347975 |
|
|
Feb 18 01:44:14 PM PST 24 |
Feb 18 01:44:19 PM PST 24 |
2632697649 ps |
| T653 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.3330016684 |
|
|
Feb 18 01:42:57 PM PST 24 |
Feb 18 01:43:13 PM PST 24 |
2012207136 ps |
| T230 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.546351232 |
|
|
Feb 18 01:42:27 PM PST 24 |
Feb 18 01:42:37 PM PST 24 |
3510074689 ps |
| T654 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.3791970153 |
|
|
Feb 18 01:43:29 PM PST 24 |
Feb 18 01:43:45 PM PST 24 |
13386383628 ps |
| T655 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.3322780452 |
|
|
Feb 18 01:43:18 PM PST 24 |
Feb 18 01:45:21 PM PST 24 |
87402644277 ps |
| T656 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.254252480 |
|
|
Feb 18 01:43:28 PM PST 24 |
Feb 18 01:43:38 PM PST 24 |
4827046895 ps |
| T217 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.4012957705 |
|
|
Feb 18 01:44:39 PM PST 24 |
Feb 18 01:45:02 PM PST 24 |
43664716045 ps |
| T657 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1849986400 |
|
|
Feb 18 01:42:24 PM PST 24 |
Feb 18 01:42:33 PM PST 24 |
2228215852 ps |
| T658 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.2666827193 |
|
|
Feb 18 01:42:57 PM PST 24 |
Feb 18 01:43:14 PM PST 24 |
4029416657 ps |
| T357 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.3206730776 |
|
|
Feb 18 01:43:50 PM PST 24 |
Feb 18 01:45:39 PM PST 24 |
85830231559 ps |
| T659 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2558654136 |
|
|
Feb 18 01:42:38 PM PST 24 |
Feb 18 01:43:56 PM PST 24 |
117793443380 ps |
| T660 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.4174573559 |
|
|
Feb 18 01:43:16 PM PST 24 |
Feb 18 01:43:27 PM PST 24 |
2618071197 ps |
| T661 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.3231749737 |
|
|
Feb 18 01:43:59 PM PST 24 |
Feb 18 01:44:15 PM PST 24 |
8149316953 ps |
| T662 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1789333839 |
|
|
Feb 18 01:44:19 PM PST 24 |
Feb 18 01:44:24 PM PST 24 |
2532427518 ps |
| T663 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2301386855 |
|
|
Feb 18 01:44:51 PM PST 24 |
Feb 18 01:44:55 PM PST 24 |
2476608949 ps |
| T664 |
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.194721191 |
|
|
Feb 18 01:42:55 PM PST 24 |
Feb 18 01:43:05 PM PST 24 |
3916226424 ps |
| T665 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2668120473 |
|
|
Feb 18 01:43:18 PM PST 24 |
Feb 18 01:43:28 PM PST 24 |
2638399782 ps |
| T353 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.4155240640 |
|
|
Feb 18 01:43:49 PM PST 24 |
Feb 18 01:44:58 PM PST 24 |
46290970227 ps |
| T666 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2743807419 |
|
|
Feb 18 01:43:07 PM PST 24 |
Feb 18 01:43:21 PM PST 24 |
2063224630 ps |
| T163 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.1046819661 |
|
|
Feb 18 01:43:52 PM PST 24 |
Feb 18 01:44:03 PM PST 24 |
3320609174 ps |
| T667 |
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.3398710836 |
|
|
Feb 18 01:42:30 PM PST 24 |
Feb 18 01:42:36 PM PST 24 |
2479324182 ps |
| T298 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2691250037 |
|
|
Feb 18 01:42:22 PM PST 24 |
Feb 18 01:43:16 PM PST 24 |
42168949868 ps |
| T668 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.446638009 |
|
|
Feb 18 01:42:52 PM PST 24 |
Feb 18 01:44:27 PM PST 24 |
136214299660 ps |
| T669 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.2027766493 |
|
|
Feb 18 01:43:30 PM PST 24 |
Feb 18 01:43:38 PM PST 24 |
2040022158 ps |
| T284 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3630025497 |
|
|
Feb 18 01:42:54 PM PST 24 |
Feb 18 01:43:29 PM PST 24 |
41237415384 ps |
| T670 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1481300576 |
|
|
Feb 18 01:42:25 PM PST 24 |
Feb 18 01:42:31 PM PST 24 |
3549816096 ps |
| T671 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.100358344 |
|
|
Feb 18 01:43:58 PM PST 24 |
Feb 18 01:44:10 PM PST 24 |
2611761204 ps |
| T672 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3577773142 |
|
|
Feb 18 01:43:54 PM PST 24 |
Feb 18 01:44:03 PM PST 24 |
2514448982 ps |
| T673 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.188944053 |
|
|
Feb 18 01:44:00 PM PST 24 |
Feb 18 01:44:13 PM PST 24 |
3473672622 ps |
| T674 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.670796148 |
|
|
Feb 18 01:43:32 PM PST 24 |
Feb 18 01:45:19 PM PST 24 |
129086093457 ps |
| T675 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2715491693 |
|
|
Feb 18 01:42:56 PM PST 24 |
Feb 18 01:43:10 PM PST 24 |
2459981817 ps |
| T676 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.3246200324 |
|
|
Feb 18 01:42:25 PM PST 24 |
Feb 18 01:42:34 PM PST 24 |
2123441838 ps |
| T677 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.572146435 |
|
|
Feb 18 01:42:35 PM PST 24 |
Feb 18 01:42:39 PM PST 24 |
4596971644 ps |
| T678 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2395647819 |
|
|
Feb 18 01:42:54 PM PST 24 |
Feb 18 01:43:04 PM PST 24 |
3905956311 ps |
| T156 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3969911301 |
|
|
Feb 18 01:44:37 PM PST 24 |
Feb 18 01:44:49 PM PST 24 |
7074897096 ps |
| T111 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1374034049 |
|
|
Feb 18 01:44:49 PM PST 24 |
Feb 18 01:46:03 PM PST 24 |
639713671780 ps |
| T122 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.4152107821 |
|
|
Feb 18 01:42:51 PM PST 24 |
Feb 18 01:42:54 PM PST 24 |
2608506349 ps |
| T123 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.990583586 |
|
|
Feb 18 01:42:53 PM PST 24 |
Feb 18 01:42:59 PM PST 24 |
5920583431 ps |
| T124 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.3366914055 |
|
|
Feb 18 01:44:19 PM PST 24 |
Feb 18 01:45:57 PM PST 24 |
142325421606 ps |
| T125 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1489555614 |
|
|
Feb 18 01:43:12 PM PST 24 |
Feb 18 01:43:22 PM PST 24 |
2632513930 ps |
| T126 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.237281488 |
|
|
Feb 18 01:45:04 PM PST 24 |
Feb 18 01:46:18 PM PST 24 |
88915567283 ps |
| T127 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2137627288 |
|
|
Feb 18 01:45:06 PM PST 24 |
Feb 18 01:47:10 PM PST 24 |
89134494232 ps |
| T128 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.4007998759 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:47:45 PM PST 24 |
96456412805 ps |
| T129 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2366075751 |
|
|
Feb 18 01:43:06 PM PST 24 |
Feb 18 01:43:17 PM PST 24 |
2461841032 ps |
| T130 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.451021464 |
|
|
Feb 18 01:42:35 PM PST 24 |
Feb 18 01:42:44 PM PST 24 |
3281830360 ps |
| T679 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.3986581055 |
|
|
Feb 18 01:43:20 PM PST 24 |
Feb 18 01:43:29 PM PST 24 |
2846944445 ps |
| T218 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.2494351017 |
|
|
Feb 18 01:43:26 PM PST 24 |
Feb 18 01:45:00 PM PST 24 |
299197873711 ps |
| T680 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.4199584940 |
|
|
Feb 18 01:43:04 PM PST 24 |
Feb 18 01:43:15 PM PST 24 |
3079159558 ps |
| T681 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2020867743 |
|
|
Feb 18 01:45:01 PM PST 24 |
Feb 18 01:45:09 PM PST 24 |
4812659608 ps |
| T682 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.204221402 |
|
|
Feb 18 01:42:56 PM PST 24 |
Feb 18 01:43:07 PM PST 24 |
6969958077 ps |
| T315 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.4137714991 |
|
|
Feb 18 01:43:09 PM PST 24 |
Feb 18 01:46:53 PM PST 24 |
89293616444 ps |
| T683 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.623386106 |
|
|
Feb 18 01:43:35 PM PST 24 |
Feb 18 01:43:43 PM PST 24 |
3258161801 ps |
| T684 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2593812638 |
|
|
Feb 18 01:44:46 PM PST 24 |
Feb 18 01:53:25 PM PST 24 |
386883655684 ps |
| T685 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2213990728 |
|
|
Feb 18 01:45:06 PM PST 24 |
Feb 18 01:54:25 PM PST 24 |
259340554998 ps |
| T686 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1260443196 |
|
|
Feb 18 01:42:59 PM PST 24 |
Feb 18 01:43:10 PM PST 24 |
2057806986 ps |
| T687 |
/workspace/coverage/default/47.sysrst_ctrl_smoke.542658935 |
|
|
Feb 18 01:44:50 PM PST 24 |
Feb 18 01:44:56 PM PST 24 |
2120658770 ps |
| T688 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.643996943 |
|
|
Feb 18 01:44:37 PM PST 24 |
Feb 18 01:44:49 PM PST 24 |
8345026846 ps |
| T689 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2606132642 |
|
|
Feb 18 01:44:07 PM PST 24 |
Feb 18 01:44:25 PM PST 24 |
34536337912 ps |
| T690 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.3930129872 |
|
|
Feb 18 01:43:37 PM PST 24 |
Feb 18 01:43:44 PM PST 24 |
2626261995 ps |
| T691 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2099408418 |
|
|
Feb 18 01:42:31 PM PST 24 |
Feb 18 01:42:42 PM PST 24 |
2607611431 ps |
| T692 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1944855456 |
|
|
Feb 18 01:44:19 PM PST 24 |
Feb 18 01:44:23 PM PST 24 |
2792295517 ps |
| T384 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.3145501188 |
|
|
Feb 18 01:43:02 PM PST 24 |
Feb 18 01:44:28 PM PST 24 |
59486269678 ps |
| T693 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2727629890 |
|
|
Feb 18 01:44:04 PM PST 24 |
Feb 18 01:44:12 PM PST 24 |
2510273012 ps |
| T694 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2263097482 |
|
|
Feb 18 01:43:14 PM PST 24 |
Feb 18 01:43:24 PM PST 24 |
2540609538 ps |
| T695 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.1398105626 |
|
|
Feb 18 01:44:24 PM PST 24 |
Feb 18 01:44:34 PM PST 24 |
3857470721 ps |
| T696 |
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.3007773785 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:43:32 PM PST 24 |
11665705305 ps |
| T697 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.800099481 |
|
|
Feb 18 01:44:49 PM PST 24 |
Feb 18 01:45:00 PM PST 24 |
5634203283 ps |
| T388 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.183495338 |
|
|
Feb 18 01:42:33 PM PST 24 |
Feb 18 01:42:46 PM PST 24 |
31108333391 ps |
| T698 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.946303147 |
|
|
Feb 18 01:44:13 PM PST 24 |
Feb 18 01:44:18 PM PST 24 |
2205473069 ps |
| T699 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2158550088 |
|
|
Feb 18 01:42:31 PM PST 24 |
Feb 18 01:42:38 PM PST 24 |
2681225193 ps |
| T700 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.1882059617 |
|
|
Feb 18 01:44:49 PM PST 24 |
Feb 18 01:44:58 PM PST 24 |
2114119854 ps |
| T701 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.1700636079 |
|
|
Feb 18 01:43:54 PM PST 24 |
Feb 18 01:44:02 PM PST 24 |
2477500233 ps |
| T702 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2268827745 |
|
|
Feb 18 01:42:57 PM PST 24 |
Feb 18 01:43:11 PM PST 24 |
2151909106 ps |
| T703 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.488802951 |
|
|
Feb 18 01:42:22 PM PST 24 |
Feb 18 01:42:30 PM PST 24 |
2214289287 ps |
| T704 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3016578654 |
|
|
Feb 18 01:43:44 PM PST 24 |
Feb 18 01:43:49 PM PST 24 |
3730163348 ps |
| T705 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2461540163 |
|
|
Feb 18 01:44:38 PM PST 24 |
Feb 18 01:44:46 PM PST 24 |
2514767125 ps |
| T706 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1211782865 |
|
|
Feb 18 01:43:37 PM PST 24 |
Feb 18 01:43:44 PM PST 24 |
3133648042 ps |
| T707 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1572109085 |
|
|
Feb 18 01:42:27 PM PST 24 |
Feb 18 01:42:31 PM PST 24 |
2345194348 ps |
| T708 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3090387226 |
|
|
Feb 18 01:45:03 PM PST 24 |
Feb 18 01:46:22 PM PST 24 |
26830397296 ps |
| T709 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3911138609 |
|
|
Feb 18 01:43:54 PM PST 24 |
Feb 18 01:44:07 PM PST 24 |
2609850496 ps |
| T710 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2446327753 |
|
|
Feb 18 01:42:57 PM PST 24 |
Feb 18 01:43:20 PM PST 24 |
10185197165 ps |
| T711 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.1294603604 |
|
|
Feb 18 01:44:11 PM PST 24 |
Feb 18 01:44:16 PM PST 24 |
3375666092 ps |
| T712 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.848885358 |
|
|
Feb 18 01:43:07 PM PST 24 |
Feb 18 01:43:17 PM PST 24 |
2020683349 ps |
| T713 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2887702513 |
|
|
Feb 18 01:44:09 PM PST 24 |
Feb 18 01:44:12 PM PST 24 |
2540987295 ps |
| T714 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.2839630534 |
|
|
Feb 18 01:44:26 PM PST 24 |
Feb 18 01:44:45 PM PST 24 |
17128354781 ps |
| T715 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.4274198218 |
|
|
Feb 18 01:44:18 PM PST 24 |
Feb 18 01:44:33 PM PST 24 |
5462330768 ps |
| T112 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1440015132 |
|
|
Feb 18 01:44:10 PM PST 24 |
Feb 18 01:44:36 PM PST 24 |
30188818710 ps |
| T716 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.305691814 |
|
|
Feb 18 01:43:11 PM PST 24 |
Feb 18 01:43:21 PM PST 24 |
2937816681 ps |
| T717 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.39619912 |
|
|
Feb 18 01:42:47 PM PST 24 |
Feb 18 01:43:10 PM PST 24 |
7022330760 ps |
| T718 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.132516043 |
|
|
Feb 18 01:42:30 PM PST 24 |
Feb 18 01:42:35 PM PST 24 |
2132898830 ps |
| T719 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1415915106 |
|
|
Feb 18 01:44:08 PM PST 24 |
Feb 18 01:44:17 PM PST 24 |
3519061194 ps |
| T720 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2988573604 |
|
|
Feb 18 01:42:40 PM PST 24 |
Feb 18 01:47:23 PM PST 24 |
609630605848 ps |
| T721 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1331812865 |
|
|
Feb 18 01:44:37 PM PST 24 |
Feb 18 01:44:42 PM PST 24 |
2652088379 ps |
| T166 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.546955129 |
|
|
Feb 18 01:44:11 PM PST 24 |
Feb 18 01:44:17 PM PST 24 |
4707714008 ps |
| T251 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1350983603 |
|
|
Feb 18 01:44:51 PM PST 24 |
Feb 18 01:44:56 PM PST 24 |
2545104898 ps |
| T252 |
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.4206155869 |
|
|
Feb 18 01:43:54 PM PST 24 |
Feb 18 01:44:07 PM PST 24 |
2724289578 ps |
| T186 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1316747614 |
|
|
Feb 18 01:44:51 PM PST 24 |
Feb 18 01:47:20 PM PST 24 |
63320757595 ps |
| T253 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2386971285 |
|
|
Feb 18 01:44:53 PM PST 24 |
Feb 18 01:45:03 PM PST 24 |
2608001006 ps |
| T254 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4205112673 |
|
|
Feb 18 01:44:51 PM PST 24 |
Feb 18 01:44:58 PM PST 24 |
2180809222 ps |
| T255 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3390751793 |
|
|
Feb 18 01:43:25 PM PST 24 |
Feb 18 01:43:50 PM PST 24 |
27849389056 ps |
| T238 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.873434022 |
|
|
Feb 18 01:43:01 PM PST 24 |
Feb 18 01:44:56 PM PST 24 |
167068023879 ps |
| T113 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.521007447 |
|
|
Feb 18 01:44:29 PM PST 24 |
Feb 18 01:47:10 PM PST 24 |
118871908583 ps |
| T256 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3614803092 |
|
|
Feb 18 01:43:35 PM PST 24 |
Feb 18 01:43:43 PM PST 24 |
2629184359 ps |
| T722 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.340859610 |
|
|
Feb 18 01:44:19 PM PST 24 |
Feb 18 01:44:24 PM PST 24 |
8109939974 ps |
| T390 |
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.4069671916 |
|
|
Feb 18 01:43:32 PM PST 24 |
Feb 18 01:43:45 PM PST 24 |
70122249546 ps |
| T723 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.3842733464 |
|
|
Feb 18 01:43:16 PM PST 24 |
Feb 18 01:47:36 PM PST 24 |
99609453082 ps |
| T312 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2032539973 |
|
|
Feb 18 01:43:26 PM PST 24 |
Feb 18 01:44:06 PM PST 24 |
56101420758 ps |
| T724 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.373292393 |
|
|
Feb 18 01:45:07 PM PST 24 |
Feb 18 01:48:51 PM PST 24 |
79797527271 ps |
| T725 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.218987089 |
|
|
Feb 18 01:43:01 PM PST 24 |
Feb 18 01:43:19 PM PST 24 |
4248725604 ps |
| T726 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3414827559 |
|
|
Feb 18 01:42:29 PM PST 24 |
Feb 18 01:42:35 PM PST 24 |
2513315225 ps |
| T727 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2037564780 |
|
|
Feb 18 01:43:46 PM PST 24 |
Feb 18 01:43:51 PM PST 24 |
3330519502 ps |
| T383 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2143192841 |
|
|
Feb 18 01:43:30 PM PST 24 |
Feb 18 01:44:57 PM PST 24 |
30335404031 ps |
| T728 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1583907020 |
|
|
Feb 18 01:44:55 PM PST 24 |
Feb 18 01:44:59 PM PST 24 |
2525832903 ps |
| T729 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.2941461153 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:43:40 PM PST 24 |
23851753398 ps |
| T376 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1772535487 |
|
|
Feb 18 01:45:03 PM PST 24 |
Feb 18 01:47:16 PM PST 24 |
46106863662 ps |
| T730 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.4122288277 |
|
|
Feb 18 01:44:09 PM PST 24 |
Feb 18 01:44:14 PM PST 24 |
2501039206 ps |
| T377 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2815946380 |
|
|
Feb 18 01:42:58 PM PST 24 |
Feb 18 01:43:48 PM PST 24 |
65442544489 ps |
| T313 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.772695520 |
|
|
Feb 18 01:43:17 PM PST 24 |
Feb 18 01:45:59 PM PST 24 |
66671827906 ps |
| T731 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.983172518 |
|
|
Feb 18 01:43:48 PM PST 24 |
Feb 18 01:43:57 PM PST 24 |
2459261843 ps |
| T732 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.257955142 |
|
|
Feb 18 01:42:53 PM PST 24 |
Feb 18 01:43:01 PM PST 24 |
2700725117 ps |
| T733 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2271263186 |
|
|
Feb 18 01:44:13 PM PST 24 |
Feb 18 01:44:40 PM PST 24 |
35275462158 ps |
| T734 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.3477382859 |
|
|
Feb 18 01:43:45 PM PST 24 |
Feb 18 01:43:49 PM PST 24 |
2036209073 ps |
| T83 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.538181028 |
|
|
Feb 18 01:42:22 PM PST 24 |
Feb 18 01:43:04 PM PST 24 |
29129959702 ps |
| T735 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.3011960440 |
|
|
Feb 18 01:43:27 PM PST 24 |
Feb 18 01:44:30 PM PST 24 |
98390542419 ps |
| T736 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1217643603 |
|
|
Feb 18 01:43:08 PM PST 24 |
Feb 18 01:43:22 PM PST 24 |
7091011199 ps |
| T737 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.3788929876 |
|
|
Feb 18 01:43:29 PM PST 24 |
Feb 18 01:43:39 PM PST 24 |
2117856030 ps |
| T738 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.408652111 |
|
|
Feb 18 01:44:50 PM PST 24 |
Feb 18 01:44:56 PM PST 24 |
2021901526 ps |
| T739 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.2845555626 |
|
|
Feb 18 01:42:29 PM PST 24 |
Feb 18 01:43:00 PM PST 24 |
39045297333 ps |
| T740 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2064535803 |
|
|
Feb 18 01:44:28 PM PST 24 |
Feb 18 01:44:37 PM PST 24 |
2199895758 ps |
| T741 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2787533605 |
|
|
Feb 18 01:45:00 PM PST 24 |
Feb 18 01:45:41 PM PST 24 |
52495762416 ps |
| T742 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1373697722 |
|
|
Feb 18 01:42:30 PM PST 24 |
Feb 18 01:42:38 PM PST 24 |
2467622915 ps |
| T743 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.326139106 |
|
|
Feb 18 01:42:54 PM PST 24 |
Feb 18 01:43:08 PM PST 24 |
2463229127 ps |
| T744 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3492885703 |
|
|
Feb 18 01:42:32 PM PST 24 |
Feb 18 01:42:39 PM PST 24 |
2232338854 ps |
| T84 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3784923925 |
|
|
Feb 18 01:45:17 PM PST 24 |
Feb 18 01:46:22 PM PST 24 |
30988464255 ps |
| T745 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2888749090 |
|
|
Feb 18 01:42:46 PM PST 24 |
Feb 18 01:42:57 PM PST 24 |
3179238231 ps |
| T114 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.4085700567 |
|
|
Feb 18 01:45:03 PM PST 24 |
Feb 18 01:45:13 PM PST 24 |
14137068977 ps |
| T314 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3174237125 |
|
|
Feb 18 01:44:41 PM PST 24 |
Feb 18 01:45:50 PM PST 24 |
296598267795 ps |
| T746 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.780861053 |
|
|
Feb 18 01:42:44 PM PST 24 |
Feb 18 01:42:47 PM PST 24 |
2893443441 ps |
| T747 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1772984758 |
|
|
Feb 18 01:45:03 PM PST 24 |
Feb 18 01:45:16 PM PST 24 |
2458141112 ps |
| T748 |
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3358790728 |
|
|
Feb 18 01:44:42 PM PST 24 |
Feb 18 01:44:56 PM PST 24 |
3625453791 ps |
| T749 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2515272696 |
|
|
Feb 18 01:43:59 PM PST 24 |
Feb 18 01:45:06 PM PST 24 |
94655000040 ps |
| T750 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.246621026 |
|
|
Feb 18 01:42:28 PM PST 24 |
Feb 18 01:42:32 PM PST 24 |
3831171030 ps |
| T751 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.947870330 |
|
|
Feb 18 01:44:13 PM PST 24 |
Feb 18 01:44:17 PM PST 24 |
2034578996 ps |
| T387 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3150204610 |
|
|
Feb 18 01:45:03 PM PST 24 |
Feb 18 01:46:23 PM PST 24 |
28581765002 ps |
| T752 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.647494502 |
|
|
Feb 18 01:44:18 PM PST 24 |
Feb 18 01:44:25 PM PST 24 |
2113892810 ps |
| T753 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.3783842624 |
|
|
Feb 18 01:44:00 PM PST 24 |
Feb 18 01:44:07 PM PST 24 |
2474857545 ps |
| T231 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1533386741 |
|
|
Feb 18 01:44:42 PM PST 24 |
Feb 18 01:44:52 PM PST 24 |
4850147163 ps |
| T754 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.2508893706 |
|
|
Feb 18 01:43:26 PM PST 24 |
Feb 18 01:43:40 PM PST 24 |
3342644860 ps |
| T755 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.465305425 |
|
|
Feb 18 01:42:41 PM PST 24 |
Feb 18 01:42:46 PM PST 24 |
2615364953 ps |
| T756 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.408485306 |
|
|
Feb 18 01:44:09 PM PST 24 |
Feb 18 01:44:17 PM PST 24 |
2775753183 ps |
| T757 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2961350786 |
|
|
Feb 18 01:44:13 PM PST 24 |
Feb 18 01:44:19 PM PST 24 |
2639602918 ps |
| T758 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3491270044 |
|
|
Feb 18 01:44:51 PM PST 24 |
Feb 18 01:47:45 PM PST 24 |
64962171987 ps |
| T759 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.1052739153 |
|
|
Feb 18 01:42:35 PM PST 24 |
Feb 18 01:42:40 PM PST 24 |
2151605071 ps |
| T760 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1705154354 |
|
|
Feb 18 01:42:21 PM PST 24 |
Feb 18 01:42:30 PM PST 24 |
2511108486 ps |
| T761 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.2145847658 |
|
|
Feb 18 01:44:34 PM PST 24 |
Feb 18 01:44:41 PM PST 24 |
4338769653 ps |
| T762 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1417007931 |
|
|
Feb 18 01:45:01 PM PST 24 |
Feb 18 01:45:47 PM PST 24 |
94127000848 ps |
| T763 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.175820389 |
|
|
Feb 18 01:42:32 PM PST 24 |
Feb 18 01:42:39 PM PST 24 |
2521630351 ps |
| T764 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2562130629 |
|
|
Feb 18 01:45:09 PM PST 24 |
Feb 18 01:45:59 PM PST 24 |
68019538390 ps |
| T765 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.1873401467 |
|
|
Feb 18 01:43:31 PM PST 24 |
Feb 18 01:43:40 PM PST 24 |
4724791561 ps |
| T766 |
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.556021075 |
|
|
Feb 18 01:42:32 PM PST 24 |
Feb 18 01:42:41 PM PST 24 |
2168277053 ps |
| T354 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3727186539 |
|
|
Feb 18 01:43:14 PM PST 24 |
Feb 18 01:45:22 PM PST 24 |
190671767922 ps |
| T767 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.415519846 |
|
|
Feb 18 01:44:54 PM PST 24 |
Feb 18 01:47:26 PM PST 24 |
59006167725 ps |
| T768 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.871592696 |
|
|
Feb 18 01:44:19 PM PST 24 |
Feb 18 01:44:22 PM PST 24 |
2660531293 ps |
| T769 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1715289374 |
|
|
Feb 18 01:44:38 PM PST 24 |
Feb 18 01:44:48 PM PST 24 |
2067930346 ps |
| T770 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.4138170124 |
|
|
Feb 18 01:43:26 PM PST 24 |
Feb 18 01:43:39 PM PST 24 |
2608624468 ps |
| T771 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.3329335595 |
|
|
Feb 18 01:43:38 PM PST 24 |
Feb 18 01:44:05 PM PST 24 |
158648164102 ps |
| T772 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1887307363 |
|
|
Feb 18 01:43:50 PM PST 24 |
Feb 18 01:43:54 PM PST 24 |
6839735102 ps |
| T773 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2379500146 |
|
|
Feb 18 01:42:21 PM PST 24 |
Feb 18 01:42:29 PM PST 24 |
2186659705 ps |
| T316 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.815223602 |
|
|
Feb 18 01:43:25 PM PST 24 |
Feb 18 01:43:53 PM PST 24 |
33218250915 ps |
| T774 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.140179581 |
|
|
Feb 18 01:43:57 PM PST 24 |
Feb 18 01:44:03 PM PST 24 |
2529589948 ps |
| T775 |
/workspace/coverage/default/21.sysrst_ctrl_alert_test.3213455140 |
|
|
Feb 18 01:43:29 PM PST 24 |
Feb 18 01:43:37 PM PST 24 |
2044891382 ps |
| T776 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4056403679 |
|
|
Feb 18 01:44:37 PM PST 24 |
Feb 18 01:44:42 PM PST 24 |
2229833094 ps |
| T299 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.2176869743 |
|
|
Feb 18 01:42:30 PM PST 24 |
Feb 18 01:42:45 PM PST 24 |
22172448672 ps |
| T777 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.1494737520 |
|
|
Feb 18 01:42:20 PM PST 24 |
Feb 18 01:42:27 PM PST 24 |
2114656340 ps |
| T778 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3411727567 |
|
|
Feb 18 01:44:14 PM PST 24 |
Feb 18 01:44:18 PM PST 24 |
2988707015 ps |
| T779 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3486935278 |
|
|
Feb 18 01:43:09 PM PST 24 |
Feb 18 01:43:23 PM PST 24 |
2514688431 ps |
| T780 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3812564093 |
|
|
Feb 18 01:45:11 PM PST 24 |
Feb 18 01:46:51 PM PST 24 |
39814313993 ps |
| T781 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1658020460 |
|
|
Feb 18 01:44:59 PM PST 24 |
Feb 18 01:48:49 PM PST 24 |
91110419233 ps |
| T782 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.1425171755 |
|
|
Feb 18 01:43:14 PM PST 24 |
Feb 18 01:43:24 PM PST 24 |
2132692971 ps |
| T783 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2293358461 |
|
|
Feb 18 01:43:51 PM PST 24 |
Feb 18 01:44:25 PM PST 24 |
43205610587 ps |
| T784 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.3415571197 |
|
|
Feb 18 01:42:34 PM PST 24 |
Feb 18 01:49:32 PM PST 24 |
168379773761 ps |
| T785 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.4049993318 |
|
|
Feb 18 01:44:58 PM PST 24 |
Feb 18 01:45:03 PM PST 24 |
2050848150 ps |
| T786 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.636027078 |
|
|
Feb 18 01:43:32 PM PST 24 |
Feb 18 01:43:44 PM PST 24 |
2110682946 ps |
| T787 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.7607096 |
|
|
Feb 18 01:43:01 PM PST 24 |
Feb 18 01:43:16 PM PST 24 |
2165694028 ps |
| T788 |
/workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.4162025277 |
|
|
Feb 18 01:56:23 PM PST 24 |
Feb 18 01:56:37 PM PST 24 |
2015973113 ps |
| T42 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2443546013 |
|
|
Feb 18 01:55:58 PM PST 24 |
Feb 18 01:56:54 PM PST 24 |
22226994303 ps |