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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.02 99.37 96.76 100.00 97.44 98.82 99.61 94.17


Total test records in report: 906
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T361 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3517577339 Jun 10 07:32:24 PM PDT 24 Jun 10 07:33:26 PM PDT 24 79482624352 ps
T612 /workspace/coverage/default/45.sysrst_ctrl_smoke.3541309477 Jun 10 07:33:12 PM PDT 24 Jun 10 07:33:18 PM PDT 24 2111336599 ps
T101 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1310222587 Jun 10 07:31:42 PM PDT 24 Jun 10 07:35:05 PM PDT 24 144618273128 ps
T613 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3064430322 Jun 10 07:33:22 PM PDT 24 Jun 10 07:33:28 PM PDT 24 4999218789 ps
T373 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.3211740808 Jun 10 07:32:52 PM PDT 24 Jun 10 07:33:46 PM PDT 24 82563409518 ps
T233 /workspace/coverage/default/47.sysrst_ctrl_stress_all.4016305550 Jun 10 07:33:16 PM PDT 24 Jun 10 07:36:23 PM PDT 24 66979677630 ps
T614 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3143851808 Jun 10 07:31:12 PM PDT 24 Jun 10 07:31:32 PM PDT 24 65822728093 ps
T615 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3811781156 Jun 10 07:31:13 PM PDT 24 Jun 10 07:31:18 PM PDT 24 2538435246 ps
T616 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.2410368944 Jun 10 07:31:28 PM PDT 24 Jun 10 07:33:47 PM PDT 24 103633165416 ps
T142 /workspace/coverage/default/20.sysrst_ctrl_stress_all.3464831778 Jun 10 07:31:51 PM PDT 24 Jun 10 07:32:09 PM PDT 24 12154208883 ps
T617 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3385735841 Jun 10 07:32:32 PM PDT 24 Jun 10 07:32:43 PM PDT 24 2509323758 ps
T618 /workspace/coverage/default/35.sysrst_ctrl_alert_test.998254614 Jun 10 07:32:43 PM PDT 24 Jun 10 07:32:51 PM PDT 24 2014349693 ps
T619 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3799360249 Jun 10 07:31:28 PM PDT 24 Jun 10 07:31:35 PM PDT 24 2486563696 ps
T620 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1121852105 Jun 10 07:33:13 PM PDT 24 Jun 10 07:33:19 PM PDT 24 3560369908 ps
T621 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1654100150 Jun 10 07:33:41 PM PDT 24 Jun 10 07:34:24 PM PDT 24 61430838689 ps
T622 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3364968936 Jun 10 07:31:59 PM PDT 24 Jun 10 07:32:09 PM PDT 24 2513587050 ps
T367 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2584983856 Jun 10 07:33:41 PM PDT 24 Jun 10 07:34:47 PM PDT 24 95372178848 ps
T234 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.19891240 Jun 10 07:31:59 PM PDT 24 Jun 10 07:34:54 PM PDT 24 131593783449 ps
T623 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.3093529303 Jun 10 07:31:10 PM PDT 24 Jun 10 07:31:15 PM PDT 24 5026827889 ps
T624 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.384942963 Jun 10 07:33:23 PM PDT 24 Jun 10 07:33:28 PM PDT 24 2552933145 ps
T345 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.898011871 Jun 10 07:31:43 PM PDT 24 Jun 10 07:32:41 PM PDT 24 73281258355 ps
T120 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3910548858 Jun 10 07:32:27 PM PDT 24 Jun 10 07:32:31 PM PDT 24 6392390542 ps
T625 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2710444228 Jun 10 07:33:03 PM PDT 24 Jun 10 07:33:11 PM PDT 24 2465691469 ps
T626 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3271447304 Jun 10 07:31:10 PM PDT 24 Jun 10 07:31:15 PM PDT 24 4943306271 ps
T627 /workspace/coverage/default/35.sysrst_ctrl_stress_all.2534916682 Jun 10 07:32:42 PM PDT 24 Jun 10 07:32:51 PM PDT 24 7050568594 ps
T628 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4004224811 Jun 10 07:33:26 PM PDT 24 Jun 10 07:33:32 PM PDT 24 2537369888 ps
T354 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2379492941 Jun 10 07:31:22 PM PDT 24 Jun 10 07:32:20 PM PDT 24 78615921350 ps
T629 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.471109341 Jun 10 07:32:58 PM PDT 24 Jun 10 07:33:05 PM PDT 24 2477574232 ps
T630 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.76743036 Jun 10 07:33:09 PM PDT 24 Jun 10 07:33:14 PM PDT 24 2616421127 ps
T631 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.657647409 Jun 10 07:32:25 PM PDT 24 Jun 10 07:32:35 PM PDT 24 2959932362 ps
T632 /workspace/coverage/default/8.sysrst_ctrl_alert_test.807292380 Jun 10 07:31:23 PM PDT 24 Jun 10 07:31:30 PM PDT 24 2016490494 ps
T633 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.3297285701 Jun 10 07:31:53 PM PDT 24 Jun 10 07:32:09 PM PDT 24 4141623196 ps
T634 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3419235072 Jun 10 07:32:41 PM PDT 24 Jun 10 07:32:44 PM PDT 24 2124657298 ps
T635 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2895376917 Jun 10 07:32:27 PM PDT 24 Jun 10 07:32:39 PM PDT 24 3497285287 ps
T636 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.2597366775 Jun 10 07:31:21 PM PDT 24 Jun 10 07:31:28 PM PDT 24 10470741776 ps
T189 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2501743973 Jun 10 07:33:12 PM PDT 24 Jun 10 07:33:59 PM PDT 24 143368887299 ps
T637 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.782598129 Jun 10 07:33:12 PM PDT 24 Jun 10 07:33:25 PM PDT 24 4020318074 ps
T358 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3883342673 Jun 10 07:33:30 PM PDT 24 Jun 10 07:37:02 PM PDT 24 79199316579 ps
T638 /workspace/coverage/default/11.sysrst_ctrl_stress_all.552956182 Jun 10 07:31:26 PM PDT 24 Jun 10 07:31:53 PM PDT 24 8445293093 ps
T148 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.701525345 Jun 10 07:32:31 PM PDT 24 Jun 10 07:32:35 PM PDT 24 3243352521 ps
T639 /workspace/coverage/default/39.sysrst_ctrl_alert_test.1496445064 Jun 10 07:32:53 PM PDT 24 Jun 10 07:33:01 PM PDT 24 2016982817 ps
T640 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2901958632 Jun 10 07:32:52 PM PDT 24 Jun 10 07:33:00 PM PDT 24 2174080362 ps
T641 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2553831090 Jun 10 07:31:28 PM PDT 24 Jun 10 07:31:33 PM PDT 24 2063929108 ps
T642 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.894035179 Jun 10 07:32:11 PM PDT 24 Jun 10 07:32:26 PM PDT 24 4469699102 ps
T364 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2495085545 Jun 10 07:33:23 PM PDT 24 Jun 10 07:35:30 PM PDT 24 45956022339 ps
T643 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2439535755 Jun 10 07:32:01 PM PDT 24 Jun 10 07:34:16 PM PDT 24 198575155757 ps
T644 /workspace/coverage/default/38.sysrst_ctrl_smoke.438101151 Jun 10 07:32:45 PM PDT 24 Jun 10 07:32:50 PM PDT 24 2126650312 ps
T121 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3072256851 Jun 10 07:32:14 PM PDT 24 Jun 10 07:33:06 PM PDT 24 274096717765 ps
T645 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.596848168 Jun 10 07:32:55 PM PDT 24 Jun 10 07:33:05 PM PDT 24 7263467927 ps
T646 /workspace/coverage/default/33.sysrst_ctrl_smoke.3391624303 Jun 10 07:32:37 PM PDT 24 Jun 10 07:32:41 PM PDT 24 2130236362 ps
T355 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.145019851 Jun 10 07:33:38 PM PDT 24 Jun 10 07:35:28 PM PDT 24 164007248821 ps
T647 /workspace/coverage/default/30.sysrst_ctrl_alert_test.2740496552 Jun 10 07:32:26 PM PDT 24 Jun 10 07:32:34 PM PDT 24 2009991518 ps
T371 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3577289489 Jun 10 07:33:33 PM PDT 24 Jun 10 07:37:04 PM PDT 24 157014929213 ps
T648 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.168177266 Jun 10 07:31:44 PM PDT 24 Jun 10 07:31:48 PM PDT 24 2050813208 ps
T649 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.304999269 Jun 10 07:31:31 PM PDT 24 Jun 10 07:31:41 PM PDT 24 2226763195 ps
T75 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3720692892 Jun 10 07:32:15 PM PDT 24 Jun 10 07:35:59 PM PDT 24 83003964704 ps
T650 /workspace/coverage/default/33.sysrst_ctrl_alert_test.918300758 Jun 10 07:32:45 PM PDT 24 Jun 10 07:32:48 PM PDT 24 2131275523 ps
T651 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1678770225 Jun 10 07:31:42 PM PDT 24 Jun 10 07:31:55 PM PDT 24 4013028424 ps
T235 /workspace/coverage/default/32.sysrst_ctrl_stress_all.4009430469 Jun 10 07:32:33 PM PDT 24 Jun 10 07:32:45 PM PDT 24 46954445894 ps
T182 /workspace/coverage/default/1.sysrst_ctrl_stress_all.4023190416 Jun 10 07:30:59 PM PDT 24 Jun 10 07:31:14 PM PDT 24 9718142104 ps
T200 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.1801112703 Jun 10 07:32:42 PM PDT 24 Jun 10 07:32:46 PM PDT 24 2505036885 ps
T201 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2585431793 Jun 10 07:32:06 PM PDT 24 Jun 10 07:32:12 PM PDT 24 2617158508 ps
T202 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.804930629 Jun 10 07:32:23 PM PDT 24 Jun 10 07:32:26 PM PDT 24 2116268595 ps
T203 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3521588812 Jun 10 07:32:26 PM PDT 24 Jun 10 07:33:07 PM PDT 24 61715582769 ps
T204 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3302477486 Jun 10 07:31:42 PM PDT 24 Jun 10 07:31:49 PM PDT 24 10384009829 ps
T205 /workspace/coverage/default/32.sysrst_ctrl_smoke.1054006594 Jun 10 07:32:22 PM PDT 24 Jun 10 07:32:29 PM PDT 24 2110494225 ps
T206 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.3221133074 Jun 10 07:31:29 PM PDT 24 Jun 10 07:31:35 PM PDT 24 5707833458 ps
T207 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1983809545 Jun 10 07:33:24 PM PDT 24 Jun 10 07:33:52 PM PDT 24 112611430173 ps
T208 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1790250602 Jun 10 07:32:51 PM PDT 24 Jun 10 07:33:00 PM PDT 24 2500612482 ps
T305 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.812899526 Jun 10 07:31:20 PM PDT 24 Jun 10 07:31:36 PM PDT 24 24909444010 ps
T652 /workspace/coverage/default/27.sysrst_ctrl_smoke.697624200 Jun 10 07:32:11 PM PDT 24 Jun 10 07:32:15 PM PDT 24 2231100912 ps
T653 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3949441980 Jun 10 07:31:28 PM PDT 24 Jun 10 07:31:37 PM PDT 24 3507790535 ps
T377 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.949560802 Jun 10 07:33:03 PM PDT 24 Jun 10 07:33:55 PM PDT 24 75100033086 ps
T102 /workspace/coverage/default/49.sysrst_ctrl_stress_all.185851131 Jun 10 07:33:26 PM PDT 24 Jun 10 07:34:08 PM PDT 24 15675847996 ps
T654 /workspace/coverage/default/24.sysrst_ctrl_smoke.1077539008 Jun 10 07:32:04 PM PDT 24 Jun 10 07:32:08 PM PDT 24 2136194383 ps
T655 /workspace/coverage/default/21.sysrst_ctrl_smoke.2588981323 Jun 10 07:31:51 PM PDT 24 Jun 10 07:32:01 PM PDT 24 2109947140 ps
T656 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.1228787652 Jun 10 07:31:02 PM PDT 24 Jun 10 07:31:06 PM PDT 24 3681136045 ps
T657 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1105722122 Jun 10 07:32:29 PM PDT 24 Jun 10 07:32:33 PM PDT 24 4165678239 ps
T658 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1309484274 Jun 10 07:33:25 PM PDT 24 Jun 10 07:33:47 PM PDT 24 24606890813 ps
T659 /workspace/coverage/default/6.sysrst_ctrl_smoke.378358859 Jun 10 07:31:09 PM PDT 24 Jun 10 07:31:14 PM PDT 24 2139997849 ps
T660 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3438099380 Jun 10 07:31:18 PM PDT 24 Jun 10 07:31:32 PM PDT 24 3786821135 ps
T661 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1496510866 Jun 10 07:32:11 PM PDT 24 Jun 10 07:32:17 PM PDT 24 2519776890 ps
T662 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1513105359 Jun 10 07:32:10 PM PDT 24 Jun 10 07:32:19 PM PDT 24 2236630962 ps
T663 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3684157402 Jun 10 07:32:28 PM PDT 24 Jun 10 07:32:38 PM PDT 24 2608485477 ps
T664 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3128224050 Jun 10 07:31:19 PM PDT 24 Jun 10 07:31:30 PM PDT 24 2468968866 ps
T665 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.296906397 Jun 10 07:31:11 PM PDT 24 Jun 10 07:31:18 PM PDT 24 2514835536 ps
T666 /workspace/coverage/default/9.sysrst_ctrl_smoke.2024195041 Jun 10 07:31:19 PM PDT 24 Jun 10 07:31:29 PM PDT 24 2114292124 ps
T667 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.4151944883 Jun 10 07:32:42 PM PDT 24 Jun 10 07:32:48 PM PDT 24 2514577731 ps
T668 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.328696114 Jun 10 07:31:50 PM PDT 24 Jun 10 07:37:30 PM PDT 24 122505445356 ps
T669 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2297388919 Jun 10 07:32:27 PM PDT 24 Jun 10 07:32:34 PM PDT 24 2620006787 ps
T670 /workspace/coverage/default/18.sysrst_ctrl_smoke.4286286912 Jun 10 07:31:45 PM PDT 24 Jun 10 07:31:48 PM PDT 24 2133409099 ps
T356 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1320826668 Jun 10 07:32:36 PM PDT 24 Jun 10 07:33:11 PM PDT 24 95488866791 ps
T671 /workspace/coverage/default/6.sysrst_ctrl_alert_test.1753576038 Jun 10 07:31:07 PM PDT 24 Jun 10 07:31:12 PM PDT 24 2043234162 ps
T672 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.397564892 Jun 10 07:33:24 PM PDT 24 Jun 10 07:33:30 PM PDT 24 4482415394 ps
T673 /workspace/coverage/default/23.sysrst_ctrl_smoke.2018402295 Jun 10 07:32:01 PM PDT 24 Jun 10 07:32:10 PM PDT 24 2110063494 ps
T359 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.786835809 Jun 10 07:31:50 PM PDT 24 Jun 10 07:32:29 PM PDT 24 58706856562 ps
T674 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.358709167 Jun 10 07:31:12 PM PDT 24 Jun 10 07:31:41 PM PDT 24 32930610575 ps
T76 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1454385453 Jun 10 07:30:44 PM PDT 24 Jun 10 07:32:27 PM PDT 24 38703632616 ps
T675 /workspace/coverage/default/2.sysrst_ctrl_stress_all.3459105969 Jun 10 07:31:02 PM PDT 24 Jun 10 07:31:36 PM PDT 24 11333814650 ps
T676 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3118189030 Jun 10 07:32:54 PM PDT 24 Jun 10 07:33:05 PM PDT 24 2821454176 ps
T677 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3692538747 Jun 10 07:32:00 PM PDT 24 Jun 10 07:32:04 PM PDT 24 2930074259 ps
T218 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1815127539 Jun 10 07:32:03 PM PDT 24 Jun 10 07:32:56 PM PDT 24 46724005965 ps
T678 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3712858255 Jun 10 07:31:17 PM PDT 24 Jun 10 07:31:33 PM PDT 24 5146457968 ps
T679 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.2426060035 Jun 10 07:32:27 PM PDT 24 Jun 10 07:32:32 PM PDT 24 2479723541 ps
T198 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.3186912357 Jun 10 07:31:11 PM PDT 24 Jun 10 07:31:19 PM PDT 24 4186626409 ps
T680 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.227064325 Jun 10 07:31:41 PM PDT 24 Jun 10 07:32:17 PM PDT 24 346192657979 ps
T342 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.592265429 Jun 10 07:33:21 PM PDT 24 Jun 10 07:35:24 PM PDT 24 89654762984 ps
T681 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2130477986 Jun 10 07:31:43 PM PDT 24 Jun 10 07:32:19 PM PDT 24 49742351934 ps
T682 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2187440850 Jun 10 07:32:14 PM PDT 24 Jun 10 07:32:22 PM PDT 24 3338416504 ps
T683 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1538651600 Jun 10 07:31:41 PM PDT 24 Jun 10 07:31:45 PM PDT 24 2848404919 ps
T684 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3346608034 Jun 10 07:30:59 PM PDT 24 Jun 10 07:31:06 PM PDT 24 3271810758 ps
T685 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3095128566 Jun 10 07:32:02 PM PDT 24 Jun 10 07:32:08 PM PDT 24 5607012747 ps
T686 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.9745839 Jun 10 07:32:31 PM PDT 24 Jun 10 07:33:33 PM PDT 24 138910790706 ps
T370 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3940728645 Jun 10 07:32:54 PM PDT 24 Jun 10 07:35:03 PM PDT 24 44223807755 ps
T687 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2902654386 Jun 10 07:30:47 PM PDT 24 Jun 10 07:30:57 PM PDT 24 2291938018 ps
T688 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1243878212 Jun 10 07:33:25 PM PDT 24 Jun 10 07:34:43 PM PDT 24 106313040834 ps
T378 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2222359754 Jun 10 07:33:37 PM PDT 24 Jun 10 07:33:51 PM PDT 24 22123351901 ps
T689 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2978573894 Jun 10 07:31:58 PM PDT 24 Jun 10 07:32:03 PM PDT 24 2263822542 ps
T690 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1180179876 Jun 10 07:30:58 PM PDT 24 Jun 10 07:31:04 PM PDT 24 2246579678 ps
T691 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2698827216 Jun 10 07:31:42 PM PDT 24 Jun 10 07:32:15 PM PDT 24 479599738414 ps
T692 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2425571887 Jun 10 07:33:34 PM PDT 24 Jun 10 07:34:59 PM PDT 24 132362578675 ps
T365 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2898242093 Jun 10 07:33:25 PM PDT 24 Jun 10 07:34:20 PM PDT 24 92652264553 ps
T693 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1975540100 Jun 10 07:31:09 PM PDT 24 Jun 10 07:31:14 PM PDT 24 3143985751 ps
T694 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1246123894 Jun 10 07:31:41 PM PDT 24 Jun 10 07:31:47 PM PDT 24 2464645810 ps
T695 /workspace/coverage/default/23.sysrst_ctrl_stress_all.2112274939 Jun 10 07:32:01 PM PDT 24 Jun 10 07:32:10 PM PDT 24 8464377520 ps
T696 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1658002130 Jun 10 07:32:13 PM PDT 24 Jun 10 07:32:45 PM PDT 24 73296298131 ps
T697 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1618209061 Jun 10 07:32:43 PM PDT 24 Jun 10 07:32:53 PM PDT 24 2512731605 ps
T698 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1888655358 Jun 10 07:32:54 PM PDT 24 Jun 10 07:33:02 PM PDT 24 9687922543 ps
T699 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1944106563 Jun 10 07:31:41 PM PDT 24 Jun 10 07:31:48 PM PDT 24 2300446634 ps
T700 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.1879994907 Jun 10 07:31:09 PM PDT 24 Jun 10 07:35:23 PM PDT 24 101338027252 ps
T701 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.663645431 Jun 10 07:32:47 PM PDT 24 Jun 10 07:32:51 PM PDT 24 2571194646 ps
T702 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.4046188696 Jun 10 07:30:59 PM PDT 24 Jun 10 07:31:04 PM PDT 24 2552013371 ps
T363 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3804232396 Jun 10 07:33:03 PM PDT 24 Jun 10 07:35:39 PM PDT 24 65197011939 ps
T703 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.586542913 Jun 10 07:31:29 PM PDT 24 Jun 10 07:31:35 PM PDT 24 2264771955 ps
T704 /workspace/coverage/default/37.sysrst_ctrl_stress_all.1325070511 Jun 10 07:32:45 PM PDT 24 Jun 10 07:32:56 PM PDT 24 10256772369 ps
T84 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.623533212 Jun 10 07:32:41 PM PDT 24 Jun 10 07:32:44 PM PDT 24 9885347115 ps
T705 /workspace/coverage/default/30.sysrst_ctrl_smoke.1075549908 Jun 10 07:32:26 PM PDT 24 Jun 10 07:32:35 PM PDT 24 2113030575 ps
T303 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1644915091 Jun 10 07:31:30 PM PDT 24 Jun 10 07:32:40 PM PDT 24 27441512009 ps
T265 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.3033799790 Jun 10 07:31:11 PM PDT 24 Jun 10 07:31:27 PM PDT 24 22115687316 ps
T308 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3509181827 Jun 10 07:33:04 PM PDT 24 Jun 10 07:33:06 PM PDT 24 5090743182 ps
T309 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.927456981 Jun 10 07:31:31 PM PDT 24 Jun 10 07:31:37 PM PDT 24 2260487836 ps
T219 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.724623467 Jun 10 07:32:13 PM PDT 24 Jun 10 07:32:26 PM PDT 24 4599542325 ps
T310 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.2778823525 Jun 10 07:32:45 PM PDT 24 Jun 10 07:37:24 PM PDT 24 104323478311 ps
T311 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3805060753 Jun 10 07:31:02 PM PDT 24 Jun 10 07:31:07 PM PDT 24 2526854704 ps
T312 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.4170872540 Jun 10 07:31:27 PM PDT 24 Jun 10 08:01:47 PM PDT 24 944636052028 ps
T313 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.86817113 Jun 10 07:31:51 PM PDT 24 Jun 10 07:32:04 PM PDT 24 2510562835 ps
T314 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.39947047 Jun 10 07:33:36 PM PDT 24 Jun 10 07:37:24 PM PDT 24 106667674593 ps
T706 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.941797816 Jun 10 07:33:22 PM PDT 24 Jun 10 07:33:28 PM PDT 24 2473777969 ps
T707 /workspace/coverage/default/28.sysrst_ctrl_smoke.2741866491 Jun 10 07:32:24 PM PDT 24 Jun 10 07:32:29 PM PDT 24 2115431931 ps
T708 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.1283056353 Jun 10 07:31:54 PM PDT 24 Jun 10 07:32:02 PM PDT 24 2511104286 ps
T709 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.2271376027 Jun 10 07:31:09 PM PDT 24 Jun 10 07:31:16 PM PDT 24 5320216825 ps
T710 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1996084738 Jun 10 07:32:02 PM PDT 24 Jun 10 07:32:12 PM PDT 24 23202370134 ps
T711 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1695922852 Jun 10 07:31:00 PM PDT 24 Jun 10 07:31:13 PM PDT 24 3756629335 ps
T712 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.2894923346 Jun 10 07:32:14 PM PDT 24 Jun 10 07:34:17 PM PDT 24 48552042991 ps
T713 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.3393711546 Jun 10 07:32:23 PM PDT 24 Jun 10 07:32:26 PM PDT 24 2496208653 ps
T714 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.636573954 Jun 10 07:33:05 PM PDT 24 Jun 10 07:33:09 PM PDT 24 2183051962 ps
T715 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2920260477 Jun 10 07:31:25 PM PDT 24 Jun 10 07:31:34 PM PDT 24 2099854647 ps
T716 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.835243747 Jun 10 07:33:08 PM PDT 24 Jun 10 07:33:17 PM PDT 24 2508753570 ps
T717 /workspace/coverage/default/0.sysrst_ctrl_stress_all.1252918088 Jun 10 07:30:54 PM PDT 24 Jun 10 07:31:21 PM PDT 24 8759945907 ps
T718 /workspace/coverage/default/4.sysrst_ctrl_alert_test.3163998114 Jun 10 07:31:11 PM PDT 24 Jun 10 07:31:16 PM PDT 24 2042777633 ps
T719 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.86259564 Jun 10 07:32:42 PM PDT 24 Jun 10 07:32:51 PM PDT 24 3466987735 ps
T720 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1970995286 Jun 10 07:32:15 PM PDT 24 Jun 10 07:32:21 PM PDT 24 2471853533 ps
T721 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.850061996 Jun 10 07:31:30 PM PDT 24 Jun 10 07:31:39 PM PDT 24 3308946668 ps
T722 /workspace/coverage/default/7.sysrst_ctrl_stress_all.516955738 Jun 10 07:31:13 PM PDT 24 Jun 10 07:31:18 PM PDT 24 10135190522 ps
T723 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.949835727 Jun 10 07:31:27 PM PDT 24 Jun 10 07:31:31 PM PDT 24 2645026186 ps
T145 /workspace/coverage/default/12.sysrst_ctrl_stress_all.3477924561 Jun 10 07:31:23 PM PDT 24 Jun 10 07:32:01 PM PDT 24 13758037809 ps
T724 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1028894908 Jun 10 07:32:04 PM PDT 24 Jun 10 07:32:12 PM PDT 24 3587424803 ps
T725 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3679886997 Jun 10 07:33:33 PM PDT 24 Jun 10 07:34:02 PM PDT 24 26597168517 ps
T726 /workspace/coverage/default/40.sysrst_ctrl_alert_test.2454821409 Jun 10 07:32:52 PM PDT 24 Jun 10 07:32:57 PM PDT 24 2029499228 ps
T727 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.2492941657 Jun 10 07:33:03 PM PDT 24 Jun 10 07:33:08 PM PDT 24 2784931092 ps
T728 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3941731232 Jun 10 07:32:52 PM PDT 24 Jun 10 07:33:07 PM PDT 24 4581775720 ps
T729 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1908608653 Jun 10 07:32:26 PM PDT 24 Jun 10 07:32:32 PM PDT 24 2635263332 ps
T730 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.368342935 Jun 10 07:31:19 PM PDT 24 Jun 10 07:31:27 PM PDT 24 3774529791 ps
T731 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.2036836519 Jun 10 07:31:18 PM PDT 24 Jun 10 07:31:24 PM PDT 24 2756126777 ps
T732 /workspace/coverage/default/13.sysrst_ctrl_stress_all.3670344150 Jun 10 07:31:29 PM PDT 24 Jun 10 07:31:56 PM PDT 24 8815083875 ps
T733 /workspace/coverage/default/37.sysrst_ctrl_smoke.1972152682 Jun 10 07:32:45 PM PDT 24 Jun 10 07:32:49 PM PDT 24 2135502216 ps
T734 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.4215158391 Jun 10 07:32:06 PM PDT 24 Jun 10 07:32:41 PM PDT 24 342096975358 ps
T307 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2402204293 Jun 10 07:33:15 PM PDT 24 Jun 10 07:33:47 PM PDT 24 164856260434 ps
T735 /workspace/coverage/default/22.sysrst_ctrl_smoke.795227512 Jun 10 07:32:02 PM PDT 24 Jun 10 07:32:12 PM PDT 24 2113364845 ps
T736 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.1762501702 Jun 10 07:31:51 PM PDT 24 Jun 10 07:31:58 PM PDT 24 5003761939 ps
T737 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.599462848 Jun 10 07:32:01 PM PDT 24 Jun 10 07:32:06 PM PDT 24 10099316126 ps
T738 /workspace/coverage/default/36.sysrst_ctrl_alert_test.3057635014 Jun 10 07:32:43 PM PDT 24 Jun 10 07:32:47 PM PDT 24 2037232426 ps
T739 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.1917415347 Jun 10 07:32:04 PM PDT 24 Jun 10 07:32:11 PM PDT 24 2465327812 ps
T740 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.733218631 Jun 10 07:32:33 PM PDT 24 Jun 10 07:33:33 PM PDT 24 49758052551 ps
T741 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.725605794 Jun 10 07:32:13 PM PDT 24 Jun 10 07:32:18 PM PDT 24 2268676098 ps
T742 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3190911260 Jun 10 07:31:09 PM PDT 24 Jun 10 07:31:22 PM PDT 24 3420852218 ps
T743 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.766424053 Jun 10 07:31:29 PM PDT 24 Jun 10 07:32:48 PM PDT 24 36764476539 ps
T744 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.4031052902 Jun 10 07:33:13 PM PDT 24 Jun 10 07:33:21 PM PDT 24 2454293741 ps
T745 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3748367897 Jun 10 07:31:50 PM PDT 24 Jun 10 07:31:57 PM PDT 24 2628870506 ps
T746 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2720800783 Jun 10 07:33:16 PM PDT 24 Jun 10 07:33:57 PM PDT 24 27338114144 ps
T747 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.168304845 Jun 10 07:33:04 PM PDT 24 Jun 10 07:33:07 PM PDT 24 5900289904 ps
T748 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3653772325 Jun 10 07:32:12 PM PDT 24 Jun 10 07:32:17 PM PDT 24 3508723660 ps
T749 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3825539131 Jun 10 07:33:03 PM PDT 24 Jun 10 07:33:07 PM PDT 24 2532129814 ps
T750 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1838941626 Jun 10 07:33:26 PM PDT 24 Jun 10 07:33:37 PM PDT 24 2509047555 ps
T379 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1270821396 Jun 10 07:32:00 PM PDT 24 Jun 10 07:33:20 PM PDT 24 115924243891 ps
T751 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.655674166 Jun 10 07:31:04 PM PDT 24 Jun 10 07:31:10 PM PDT 24 3306636337 ps
T122 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.4083067933 Jun 10 07:31:03 PM PDT 24 Jun 10 07:31:13 PM PDT 24 6301142940 ps
T752 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3961117426 Jun 10 07:32:54 PM PDT 24 Jun 10 07:33:00 PM PDT 24 2157226456 ps
T753 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.377281119 Jun 10 07:33:26 PM PDT 24 Jun 10 07:33:31 PM PDT 24 9826730499 ps
T183 /workspace/coverage/default/41.sysrst_ctrl_stress_all.78796178 Jun 10 07:33:06 PM PDT 24 Jun 10 07:33:14 PM PDT 24 7557354083 ps
T754 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.2347390617 Jun 10 07:32:41 PM PDT 24 Jun 10 07:32:45 PM PDT 24 3114945603 ps
T755 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3471390092 Jun 10 07:32:37 PM PDT 24 Jun 10 07:32:44 PM PDT 24 3809293502 ps
T756 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.1718815882 Jun 10 07:32:13 PM PDT 24 Jun 10 07:32:30 PM PDT 24 21593650473 ps
T757 /workspace/coverage/default/41.sysrst_ctrl_alert_test.726250840 Jun 10 07:33:06 PM PDT 24 Jun 10 07:33:13 PM PDT 24 2011340306 ps
T758 /workspace/coverage/default/28.sysrst_ctrl_stress_all.1394836319 Jun 10 07:32:23 PM PDT 24 Jun 10 07:33:01 PM PDT 24 98419862426 ps
T161 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.86519860 Jun 10 07:32:45 PM PDT 24 Jun 10 07:33:37 PM PDT 24 78070661707 ps
T759 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.4226923691 Jun 10 07:31:59 PM PDT 24 Jun 10 07:35:25 PM PDT 24 76142849007 ps
T760 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.317300669 Jun 10 07:30:57 PM PDT 24 Jun 10 07:31:08 PM PDT 24 2447798927 ps
T761 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3721268663 Jun 10 07:31:28 PM PDT 24 Jun 10 07:31:33 PM PDT 24 3334280196 ps
T380 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1874256845 Jun 10 07:33:35 PM PDT 24 Jun 10 07:33:51 PM PDT 24 22359606111 ps
T762 /workspace/coverage/default/34.sysrst_ctrl_smoke.352541364 Jun 10 07:32:45 PM PDT 24 Jun 10 07:32:49 PM PDT 24 2169645255 ps
T763 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.4051150859 Jun 10 07:30:43 PM PDT 24 Jun 10 07:30:49 PM PDT 24 3205371591 ps
T229 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2912942514 Jun 10 07:33:36 PM PDT 24 Jun 10 07:33:48 PM PDT 24 42323163304 ps
T343 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.2938762350 Jun 10 07:31:49 PM PDT 24 Jun 10 07:37:19 PM PDT 24 122879156035 ps
T764 /workspace/coverage/default/13.sysrst_ctrl_alert_test.2346431824 Jun 10 07:31:29 PM PDT 24 Jun 10 07:31:34 PM PDT 24 2031303133 ps
T765 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3235896409 Jun 10 07:31:26 PM PDT 24 Jun 10 07:31:31 PM PDT 24 2530256498 ps
T766 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.3279557771 Jun 10 07:31:44 PM PDT 24 Jun 10 07:32:55 PM PDT 24 105996233370 ps
T168 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1481689231 Jun 10 07:32:25 PM PDT 24 Jun 10 07:32:56 PM PDT 24 42163162429 ps
T767 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.451627523 Jun 10 07:32:15 PM PDT 24 Jun 10 07:32:20 PM PDT 24 2472622948 ps
T768 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3374494095 Jun 10 07:32:43 PM PDT 24 Jun 10 07:33:14 PM PDT 24 38052940166 ps
T769 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1762066785 Jun 10 07:33:23 PM PDT 24 Jun 10 07:33:30 PM PDT 24 2121245372 ps
T770 /workspace/coverage/default/31.sysrst_ctrl_smoke.3733223204 Jun 10 07:32:28 PM PDT 24 Jun 10 07:32:36 PM PDT 24 2110555314 ps
T771 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2404979105 Jun 10 07:30:57 PM PDT 24 Jun 10 07:31:11 PM PDT 24 3669011287 ps
T382 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1361040803 Jun 10 07:31:53 PM PDT 24 Jun 10 07:33:07 PM PDT 24 51353358484 ps
T772 /workspace/coverage/default/36.sysrst_ctrl_stress_all.1674363900 Jun 10 07:32:42 PM PDT 24 Jun 10 07:33:02 PM PDT 24 12185140159 ps
T773 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3465043277 Jun 10 07:31:08 PM PDT 24 Jun 10 07:32:30 PM PDT 24 30080216876 ps
T774 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1888565062 Jun 10 07:32:29 PM PDT 24 Jun 10 07:32:39 PM PDT 24 3421319593 ps
T775 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3559722387 Jun 10 07:30:57 PM PDT 24 Jun 10 07:31:07 PM PDT 24 2008414464 ps
T776 /workspace/coverage/default/24.sysrst_ctrl_stress_all.530952792 Jun 10 07:32:05 PM PDT 24 Jun 10 07:32:32 PM PDT 24 8589400513 ps
T777 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3590794323 Jun 10 07:33:15 PM PDT 24 Jun 10 07:33:20 PM PDT 24 2181364649 ps
T778 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.773429997 Jun 10 07:32:13 PM PDT 24 Jun 10 07:32:18 PM PDT 24 2528845558 ps
T103 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.2152670196 Jun 10 07:32:24 PM PDT 24 Jun 10 07:33:31 PM PDT 24 66196019918 ps
T266 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.963629316 Jun 10 07:30:43 PM PDT 24 Jun 10 07:31:15 PM PDT 24 22023853896 ps
T779 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.4228286049 Jun 10 07:31:54 PM PDT 24 Jun 10 07:32:05 PM PDT 24 4373284950 ps
T780 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1077532669 Jun 10 07:31:27 PM PDT 24 Jun 10 07:31:31 PM PDT 24 2645697212 ps
T781 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.277786530 Jun 10 07:31:09 PM PDT 24 Jun 10 07:31:14 PM PDT 24 2625011340 ps
T782 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4262007010 Jun 10 07:30:59 PM PDT 24 Jun 10 07:31:10 PM PDT 24 2348583878 ps
T346 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1081418246 Jun 10 07:32:41 PM PDT 24 Jun 10 07:35:48 PM PDT 24 71717858430 ps
T783 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1930732440 Jun 10 07:32:27 PM PDT 24 Jun 10 07:35:51 PM PDT 24 77089764760 ps
T784 /workspace/coverage/default/45.sysrst_ctrl_stress_all.3166880466 Jun 10 07:33:15 PM PDT 24 Jun 10 07:33:39 PM PDT 24 7225255792 ps
T785 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.262622603 Jun 10 07:32:10 PM PDT 24 Jun 10 07:32:20 PM PDT 24 2612192515 ps
T786 /workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.4172901205 Jun 10 06:43:43 PM PDT 24 Jun 10 06:43:46 PM PDT 24 2019524120 ps
T30 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1375947050 Jun 10 06:43:37 PM PDT 24 Jun 10 06:43:41 PM PDT 24 2042710100 ps
T787 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3678615168 Jun 10 06:43:22 PM PDT 24 Jun 10 06:43:23 PM PDT 24 2143188987 ps
T250 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.439437913 Jun 10 06:43:22 PM PDT 24 Jun 10 06:43:29 PM PDT 24 2097251352 ps
T788 /workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.620389027 Jun 10 06:43:43 PM PDT 24 Jun 10 06:43:50 PM PDT 24 2011614296 ps
T789 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.3103889220 Jun 10 06:43:05 PM PDT 24 Jun 10 06:43:08 PM PDT 24 2045020487 ps
T790 /workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.17151896 Jun 10 06:43:44 PM PDT 24 Jun 10 06:43:50 PM PDT 24 2013704480 ps
T31 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1354979431 Jun 10 06:43:37 PM PDT 24 Jun 10 06:43:39 PM PDT 24 2636252755 ps
T791 /workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.1967069901 Jun 10 06:43:43 PM PDT 24 Jun 10 06:43:47 PM PDT 24 2024349995 ps
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