Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.03 99.38 96.78 100.00 97.44 98.85 99.61 94.17


Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T600 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.258675883 Aug 07 05:31:44 PM PDT 24 Aug 07 05:31:52 PM PDT 24 2609402584 ps
T601 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3625905751 Aug 07 05:30:39 PM PDT 24 Aug 07 05:30:44 PM PDT 24 2206830700 ps
T602 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.156840698 Aug 07 05:33:13 PM PDT 24 Aug 07 05:33:14 PM PDT 24 2963653742 ps
T603 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.1518696373 Aug 07 05:31:01 PM PDT 24 Aug 07 05:31:09 PM PDT 24 3014170771 ps
T604 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1508589727 Aug 07 05:32:58 PM PDT 24 Aug 07 05:33:05 PM PDT 24 2508858919 ps
T605 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2156519712 Aug 07 05:30:44 PM PDT 24 Aug 07 05:30:47 PM PDT 24 3911828591 ps
T606 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3755932502 Aug 07 05:31:18 PM PDT 24 Aug 07 05:31:24 PM PDT 24 2994470818 ps
T607 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.429485824 Aug 07 05:33:38 PM PDT 24 Aug 07 05:34:08 PM PDT 24 57807448127 ps
T608 /workspace/coverage/default/33.sysrst_ctrl_alert_test.128148232 Aug 07 05:32:29 PM PDT 24 Aug 07 05:32:33 PM PDT 24 2022525005 ps
T609 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3276225694 Aug 07 05:30:25 PM PDT 24 Aug 07 05:30:27 PM PDT 24 3213015405 ps
T610 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.976047657 Aug 07 05:31:16 PM PDT 24 Aug 07 05:31:18 PM PDT 24 2122548836 ps
T611 /workspace/coverage/default/22.sysrst_ctrl_smoke.2514543783 Aug 07 05:31:45 PM PDT 24 Aug 07 05:31:47 PM PDT 24 2138126067 ps
T193 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3450849814 Aug 07 05:33:10 PM PDT 24 Aug 07 05:33:52 PM PDT 24 53944265852 ps
T612 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4023515407 Aug 07 05:33:16 PM PDT 24 Aug 07 05:33:26 PM PDT 24 4120285687 ps
T613 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1692946536 Aug 07 05:31:53 PM PDT 24 Aug 07 05:32:01 PM PDT 24 2512171312 ps
T85 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.535541617 Aug 07 05:31:46 PM PDT 24 Aug 07 05:33:32 PM PDT 24 1044438211349 ps
T614 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.656798820 Aug 07 05:31:28 PM PDT 24 Aug 07 05:31:34 PM PDT 24 4694744335 ps
T615 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3152242980 Aug 07 05:32:03 PM PDT 24 Aug 07 05:32:04 PM PDT 24 2934562239 ps
T616 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1920511699 Aug 07 05:31:29 PM PDT 24 Aug 07 05:31:35 PM PDT 24 5206252316 ps
T617 /workspace/coverage/default/41.sysrst_ctrl_stress_all.3564511499 Aug 07 05:33:00 PM PDT 24 Aug 07 05:33:23 PM PDT 24 8745998913 ps
T618 /workspace/coverage/default/34.sysrst_ctrl_smoke.372423892 Aug 07 05:32:31 PM PDT 24 Aug 07 05:32:33 PM PDT 24 2127675413 ps
T619 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2620164059 Aug 07 05:32:54 PM PDT 24 Aug 07 05:32:58 PM PDT 24 2454760300 ps
T364 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.3035396611 Aug 07 05:31:07 PM PDT 24 Aug 07 05:34:21 PM PDT 24 142335177234 ps
T620 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2012055629 Aug 07 05:30:19 PM PDT 24 Aug 07 05:30:21 PM PDT 24 2175794482 ps
T621 /workspace/coverage/default/47.sysrst_ctrl_smoke.2097390102 Aug 07 05:33:23 PM PDT 24 Aug 07 05:33:25 PM PDT 24 2126254829 ps
T622 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3882645220 Aug 07 05:30:20 PM PDT 24 Aug 07 05:33:40 PM PDT 24 88502737065 ps
T623 /workspace/coverage/default/6.sysrst_ctrl_smoke.430068554 Aug 07 05:30:38 PM PDT 24 Aug 07 05:30:40 PM PDT 24 2124869474 ps
T624 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2707591183 Aug 07 05:33:28 PM PDT 24 Aug 07 05:33:31 PM PDT 24 8087372467 ps
T350 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1330859804 Aug 07 05:33:46 PM PDT 24 Aug 07 05:35:15 PM PDT 24 64985411550 ps
T625 /workspace/coverage/default/34.sysrst_ctrl_alert_test.475463302 Aug 07 05:32:38 PM PDT 24 Aug 07 05:32:44 PM PDT 24 2011594596 ps
T626 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1987596349 Aug 07 05:31:44 PM PDT 24 Aug 07 05:31:52 PM PDT 24 4999019658 ps
T627 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.867657681 Aug 07 05:32:58 PM PDT 24 Aug 07 05:33:04 PM PDT 24 4456663258 ps
T374 /workspace/coverage/default/18.sysrst_ctrl_stress_all.3953935804 Aug 07 05:31:31 PM PDT 24 Aug 07 05:34:56 PM PDT 24 1526629917518 ps
T628 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3771327277 Aug 07 05:31:20 PM PDT 24 Aug 07 05:31:36 PM PDT 24 26356830492 ps
T223 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.4231019715 Aug 07 05:32:04 PM PDT 24 Aug 07 05:33:04 PM PDT 24 21458762900 ps
T260 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.929815709 Aug 07 05:30:22 PM PDT 24 Aug 07 05:32:00 PM PDT 24 42010446975 ps
T629 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3128984531 Aug 07 05:32:04 PM PDT 24 Aug 07 05:32:08 PM PDT 24 2512914414 ps
T370 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.241790448 Aug 07 05:33:16 PM PDT 24 Aug 07 05:34:24 PM PDT 24 232015634145 ps
T630 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.2358919489 Aug 07 05:31:02 PM PDT 24 Aug 07 05:31:04 PM PDT 24 2616608673 ps
T631 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3535863772 Aug 07 05:30:28 PM PDT 24 Aug 07 05:30:32 PM PDT 24 14103073887 ps
T348 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.57039760 Aug 07 05:33:48 PM PDT 24 Aug 07 05:36:37 PM PDT 24 72739801399 ps
T632 /workspace/coverage/default/48.sysrst_ctrl_smoke.2244738720 Aug 07 05:33:30 PM PDT 24 Aug 07 05:33:31 PM PDT 24 2127740808 ps
T633 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1887815153 Aug 07 05:30:43 PM PDT 24 Aug 07 05:30:46 PM PDT 24 2623323559 ps
T634 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3246683270 Aug 07 05:30:43 PM PDT 24 Aug 07 05:30:49 PM PDT 24 2140908066 ps
T332 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.943422184 Aug 07 05:31:32 PM PDT 24 Aug 07 05:32:12 PM PDT 24 128727463234 ps
T635 /workspace/coverage/default/29.sysrst_ctrl_smoke.3066751707 Aug 07 05:32:20 PM PDT 24 Aug 07 05:32:26 PM PDT 24 2111911042 ps
T636 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.3118074056 Aug 07 05:32:25 PM PDT 24 Aug 07 05:34:43 PM PDT 24 489119909925 ps
T637 /workspace/coverage/default/48.sysrst_ctrl_alert_test.3300716989 Aug 07 05:33:44 PM PDT 24 Aug 07 05:33:48 PM PDT 24 2018313877 ps
T638 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1248267337 Aug 07 05:32:14 PM PDT 24 Aug 07 05:32:19 PM PDT 24 7531398790 ps
T639 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.215323932 Aug 07 05:31:57 PM PDT 24 Aug 07 05:32:41 PM PDT 24 32671417746 ps
T354 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.319961762 Aug 07 05:32:03 PM PDT 24 Aug 07 05:36:11 PM PDT 24 94972942971 ps
T640 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2165019928 Aug 07 05:32:06 PM PDT 24 Aug 07 05:33:32 PM PDT 24 71915735711 ps
T641 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3232494424 Aug 07 05:32:27 PM PDT 24 Aug 07 05:45:13 PM PDT 24 298560396763 ps
T642 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2965438993 Aug 07 05:30:32 PM PDT 24 Aug 07 05:33:28 PM PDT 24 66064203636 ps
T170 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2615602820 Aug 07 05:30:33 PM PDT 24 Aug 07 05:31:35 PM PDT 24 463531793064 ps
T643 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.677587282 Aug 07 05:33:39 PM PDT 24 Aug 07 05:35:10 PM PDT 24 138013917281 ps
T644 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2829007922 Aug 07 05:32:29 PM PDT 24 Aug 07 05:32:32 PM PDT 24 3002068325 ps
T645 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3192321910 Aug 07 05:33:16 PM PDT 24 Aug 07 05:33:23 PM PDT 24 2507852964 ps
T646 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2828397271 Aug 07 05:33:02 PM PDT 24 Aug 07 05:33:04 PM PDT 24 2264058482 ps
T365 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1948369724 Aug 07 05:33:19 PM PDT 24 Aug 07 05:41:41 PM PDT 24 197444574198 ps
T647 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2868773053 Aug 07 05:30:22 PM PDT 24 Aug 07 05:30:29 PM PDT 24 2510645363 ps
T648 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.474713790 Aug 07 05:33:11 PM PDT 24 Aug 07 05:33:18 PM PDT 24 2473780367 ps
T649 /workspace/coverage/default/32.sysrst_ctrl_smoke.346588311 Aug 07 05:32:22 PM PDT 24 Aug 07 05:32:27 PM PDT 24 2115782236 ps
T650 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3176024052 Aug 07 05:33:09 PM PDT 24 Aug 07 05:33:11 PM PDT 24 3053978943 ps
T651 /workspace/coverage/default/5.sysrst_ctrl_alert_test.3592052093 Aug 07 05:30:39 PM PDT 24 Aug 07 05:30:44 PM PDT 24 2013703377 ps
T652 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3726152630 Aug 07 05:32:25 PM PDT 24 Aug 07 05:32:29 PM PDT 24 2612851677 ps
T113 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.686843658 Aug 07 05:33:02 PM PDT 24 Aug 07 05:33:10 PM PDT 24 6168478153 ps
T254 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.2839909854 Aug 07 05:30:31 PM PDT 24 Aug 07 05:33:43 PM PDT 24 95039918368 ps
T653 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2212486446 Aug 07 05:31:59 PM PDT 24 Aug 07 05:32:03 PM PDT 24 2617352697 ps
T654 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2457868552 Aug 07 05:31:11 PM PDT 24 Aug 07 05:31:19 PM PDT 24 2513078409 ps
T655 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2321973028 Aug 07 05:30:45 PM PDT 24 Aug 07 05:30:47 PM PDT 24 2240246364 ps
T289 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.4044720853 Aug 07 05:31:19 PM PDT 24 Aug 07 05:31:34 PM PDT 24 10658827085 ps
T656 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.2165090213 Aug 07 05:31:51 PM PDT 24 Aug 07 05:31:57 PM PDT 24 2432992333 ps
T657 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.202235840 Aug 07 05:31:51 PM PDT 24 Aug 07 05:31:55 PM PDT 24 2454772051 ps
T157 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.2137626845 Aug 07 05:30:31 PM PDT 24 Aug 07 05:30:39 PM PDT 24 4448205190 ps
T658 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.143594042 Aug 07 05:31:50 PM PDT 24 Aug 07 05:31:57 PM PDT 24 2452168066 ps
T659 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1317549069 Aug 07 05:32:14 PM PDT 24 Aug 07 05:32:20 PM PDT 24 6594324670 ps
T218 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.1133375 Aug 07 05:32:49 PM PDT 24 Aug 07 05:32:51 PM PDT 24 4630231252 ps
T660 /workspace/coverage/default/5.sysrst_ctrl_smoke.3566607104 Aug 07 05:30:39 PM PDT 24 Aug 07 05:30:42 PM PDT 24 2123399694 ps
T661 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3314803562 Aug 07 05:31:46 PM PDT 24 Aug 07 05:32:51 PM PDT 24 101817549628 ps
T662 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1638224247 Aug 07 05:30:24 PM PDT 24 Aug 07 05:30:26 PM PDT 24 2031030932 ps
T663 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3796926802 Aug 07 05:32:43 PM PDT 24 Aug 07 05:32:49 PM PDT 24 2220648785 ps
T126 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1493374858 Aug 07 05:31:05 PM PDT 24 Aug 07 05:31:09 PM PDT 24 5136457681 ps
T664 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4115562407 Aug 07 05:33:24 PM PDT 24 Aug 07 05:33:26 PM PDT 24 2230911182 ps
T665 /workspace/coverage/default/39.sysrst_ctrl_stress_all.69911076 Aug 07 05:32:55 PM PDT 24 Aug 07 05:33:00 PM PDT 24 6278734154 ps
T346 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1951433567 Aug 07 05:32:04 PM PDT 24 Aug 07 05:38:26 PM PDT 24 144081727400 ps
T666 /workspace/coverage/default/30.sysrst_ctrl_alert_test.2657700015 Aug 07 05:32:20 PM PDT 24 Aug 07 05:32:22 PM PDT 24 2039265585 ps
T277 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2216106584 Aug 07 05:30:18 PM PDT 24 Aug 07 05:31:12 PM PDT 24 42021142176 ps
T667 /workspace/coverage/default/14.sysrst_ctrl_stress_all.1988105612 Aug 07 05:31:20 PM PDT 24 Aug 07 05:31:39 PM PDT 24 14071101364 ps
T668 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.3366693409 Aug 07 05:32:24 PM PDT 24 Aug 07 05:32:25 PM PDT 24 2148508589 ps
T669 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.1384837401 Aug 07 05:32:02 PM PDT 24 Aug 07 05:34:48 PM PDT 24 70291442421 ps
T670 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.4116989579 Aug 07 05:31:56 PM PDT 24 Aug 07 05:31:57 PM PDT 24 3597600401 ps
T671 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.422184503 Aug 07 05:33:24 PM PDT 24 Aug 07 05:33:30 PM PDT 24 3855321828 ps
T672 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3380519597 Aug 07 05:32:18 PM PDT 24 Aug 07 05:32:19 PM PDT 24 2506420477 ps
T673 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2857173650 Aug 07 05:30:17 PM PDT 24 Aug 07 05:30:21 PM PDT 24 3101276251 ps
T127 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1652999422 Aug 07 05:31:05 PM PDT 24 Aug 07 05:33:56 PM PDT 24 138251852660 ps
T246 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.1561371995 Aug 07 05:32:48 PM PDT 24 Aug 07 05:33:12 PM PDT 24 45740817757 ps
T674 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2746948782 Aug 07 05:33:23 PM PDT 24 Aug 07 05:33:25 PM PDT 24 2626376643 ps
T675 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.516769720 Aug 07 05:31:59 PM PDT 24 Aug 07 05:32:01 PM PDT 24 2479250855 ps
T676 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2465157725 Aug 07 05:32:17 PM PDT 24 Aug 07 05:32:19 PM PDT 24 2540556344 ps
T334 /workspace/coverage/default/1.sysrst_ctrl_stress_all.1042920904 Aug 07 05:30:21 PM PDT 24 Aug 07 05:31:27 PM PDT 24 105636479409 ps
T301 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1403003908 Aug 07 05:33:03 PM PDT 24 Aug 07 05:34:11 PM PDT 24 24675463914 ps
T677 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.2685617770 Aug 07 05:33:10 PM PDT 24 Aug 07 05:35:32 PM PDT 24 54718638119 ps
T77 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.3228230636 Aug 07 05:30:21 PM PDT 24 Aug 07 05:30:33 PM PDT 24 30772193680 ps
T678 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1511558235 Aug 07 05:31:48 PM PDT 24 Aug 07 05:31:51 PM PDT 24 2524332681 ps
T679 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.4232235466 Aug 07 05:31:32 PM PDT 24 Aug 07 05:31:41 PM PDT 24 3217581293 ps
T680 /workspace/coverage/default/27.sysrst_ctrl_alert_test.3980449037 Aug 07 05:32:10 PM PDT 24 Aug 07 05:32:13 PM PDT 24 2016932026 ps
T681 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.24595048 Aug 07 05:31:04 PM PDT 24 Aug 07 05:31:14 PM PDT 24 3553836970 ps
T682 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.359178660 Aug 07 05:30:41 PM PDT 24 Aug 07 05:30:45 PM PDT 24 2619548537 ps
T683 /workspace/coverage/default/0.sysrst_ctrl_stress_all.4274625394 Aug 07 05:30:22 PM PDT 24 Aug 07 05:30:31 PM PDT 24 9872310437 ps
T684 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2532456590 Aug 07 05:33:29 PM PDT 24 Aug 07 05:33:32 PM PDT 24 2633381496 ps
T685 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1850424435 Aug 07 05:31:25 PM PDT 24 Aug 07 05:32:31 PM PDT 24 28097102838 ps
T686 /workspace/coverage/default/19.sysrst_ctrl_smoke.2137026861 Aug 07 05:31:31 PM PDT 24 Aug 07 05:31:34 PM PDT 24 2126317589 ps
T687 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.4257954775 Aug 07 05:30:46 PM PDT 24 Aug 07 05:30:49 PM PDT 24 4604783794 ps
T688 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.2677426322 Aug 07 05:31:44 PM PDT 24 Aug 07 05:31:51 PM PDT 24 2457491724 ps
T689 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2218741587 Aug 07 05:32:51 PM PDT 24 Aug 07 05:32:54 PM PDT 24 3356608501 ps
T690 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1472109116 Aug 07 05:33:29 PM PDT 24 Aug 07 05:33:32 PM PDT 24 2244288204 ps
T691 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.4041239667 Aug 07 05:32:56 PM PDT 24 Aug 07 05:33:06 PM PDT 24 3755605293 ps
T692 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.2115620728 Aug 07 05:30:19 PM PDT 24 Aug 07 05:30:26 PM PDT 24 2511967147 ps
T224 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3690329019 Aug 07 05:30:55 PM PDT 24 Aug 07 05:32:01 PM PDT 24 38041302238 ps
T693 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3195471320 Aug 07 05:30:17 PM PDT 24 Aug 07 05:30:23 PM PDT 24 2214528758 ps
T180 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.437341558 Aug 07 05:30:49 PM PDT 24 Aug 07 05:30:52 PM PDT 24 3350005388 ps
T183 /workspace/coverage/default/26.sysrst_ctrl_smoke.2818062456 Aug 07 05:32:00 PM PDT 24 Aug 07 05:32:06 PM PDT 24 2110922569 ps
T184 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3155653460 Aug 07 05:31:27 PM PDT 24 Aug 07 05:33:23 PM PDT 24 88602043016 ps
T185 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.388869479 Aug 07 05:31:05 PM PDT 24 Aug 07 05:32:42 PM PDT 24 147451666926 ps
T186 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1363985663 Aug 07 05:32:50 PM PDT 24 Aug 07 05:32:53 PM PDT 24 2640021243 ps
T187 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3058801284 Aug 07 05:33:28 PM PDT 24 Aug 07 05:33:31 PM PDT 24 3446092003 ps
T188 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.4262575603 Aug 07 05:31:04 PM PDT 24 Aug 07 05:31:07 PM PDT 24 2621067656 ps
T189 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3936747812 Aug 07 05:33:01 PM PDT 24 Aug 07 05:33:03 PM PDT 24 4057505508 ps
T190 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.1128610012 Aug 07 05:33:20 PM PDT 24 Aug 07 05:36:37 PM PDT 24 266328047499 ps
T191 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.594219847 Aug 07 05:33:43 PM PDT 24 Aug 07 05:41:13 PM PDT 24 172330545458 ps
T694 /workspace/coverage/default/16.sysrst_ctrl_stress_all.3027009749 Aug 07 05:31:26 PM PDT 24 Aug 07 05:57:54 PM PDT 24 638491363605 ps
T695 /workspace/coverage/default/32.sysrst_ctrl_stress_all.1992696781 Aug 07 05:32:24 PM PDT 24 Aug 07 05:34:33 PM PDT 24 49629101958 ps
T696 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1999595525 Aug 07 05:31:04 PM PDT 24 Aug 07 05:31:07 PM PDT 24 2240425400 ps
T697 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3063705433 Aug 07 05:33:38 PM PDT 24 Aug 07 05:35:23 PM PDT 24 93500719278 ps
T698 /workspace/coverage/default/21.sysrst_ctrl_stress_all.132626258 Aug 07 05:31:48 PM PDT 24 Aug 07 05:32:27 PM PDT 24 16882385223 ps
T699 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.1944644200 Aug 07 05:32:21 PM PDT 24 Aug 07 05:37:25 PM PDT 24 113195257560 ps
T700 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2926968781 Aug 07 05:30:25 PM PDT 24 Aug 07 05:32:33 PM PDT 24 225244050278 ps
T278 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2696107558 Aug 07 05:30:26 PM PDT 24 Aug 07 05:30:40 PM PDT 24 22060052850 ps
T701 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.3554659374 Aug 07 05:31:13 PM PDT 24 Aug 07 05:31:51 PM PDT 24 109679705239 ps
T702 /workspace/coverage/default/7.sysrst_ctrl_smoke.161861418 Aug 07 05:30:42 PM PDT 24 Aug 07 05:30:44 PM PDT 24 2138064283 ps
T703 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1490492446 Aug 07 05:31:21 PM PDT 24 Aug 07 05:31:22 PM PDT 24 2640429110 ps
T704 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.884339374 Aug 07 05:31:11 PM PDT 24 Aug 07 05:31:18 PM PDT 24 2709860107 ps
T705 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.163995653 Aug 07 05:32:30 PM PDT 24 Aug 07 05:32:37 PM PDT 24 2507789972 ps
T706 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3581115065 Aug 07 05:31:24 PM PDT 24 Aug 07 05:31:31 PM PDT 24 3955373559 ps
T707 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2737597878 Aug 07 05:32:16 PM PDT 24 Aug 07 05:34:41 PM PDT 24 55839694908 ps
T708 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3800348631 Aug 07 05:32:43 PM PDT 24 Aug 07 05:32:50 PM PDT 24 2510218322 ps
T709 /workspace/coverage/default/29.sysrst_ctrl_stress_all.1765987652 Aug 07 05:32:15 PM PDT 24 Aug 07 05:34:34 PM PDT 24 221685555420 ps
T710 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3182213526 Aug 07 05:33:12 PM PDT 24 Aug 07 05:33:18 PM PDT 24 3925946244 ps
T711 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3182461415 Aug 07 05:31:07 PM PDT 24 Aug 07 05:31:11 PM PDT 24 2485724784 ps
T712 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3310705115 Aug 07 05:32:14 PM PDT 24 Aug 07 05:32:21 PM PDT 24 2745515225 ps
T713 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2851655972 Aug 07 05:32:44 PM PDT 24 Aug 07 05:32:46 PM PDT 24 3276890672 ps
T714 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3087496779 Aug 07 05:32:25 PM PDT 24 Aug 07 05:32:28 PM PDT 24 3400436555 ps
T715 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.2295402819 Aug 07 05:31:39 PM PDT 24 Aug 07 05:31:46 PM PDT 24 2508610880 ps
T716 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3053984173 Aug 07 05:33:02 PM PDT 24 Aug 07 05:33:09 PM PDT 24 2610193793 ps
T337 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3485475065 Aug 07 05:33:38 PM PDT 24 Aug 07 05:34:38 PM PDT 24 97900337946 ps
T717 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1002726357 Aug 07 05:31:11 PM PDT 24 Aug 07 05:31:15 PM PDT 24 2516928575 ps
T718 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3738833801 Aug 07 05:32:06 PM PDT 24 Aug 07 05:32:15 PM PDT 24 3290982210 ps
T719 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1101101854 Aug 07 05:33:36 PM PDT 24 Aug 07 05:35:38 PM PDT 24 47771010296 ps
T720 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.4219373657 Aug 07 05:33:38 PM PDT 24 Aug 07 05:34:04 PM PDT 24 39859394699 ps
T721 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3176865073 Aug 07 05:33:08 PM PDT 24 Aug 07 05:34:23 PM PDT 24 118023924195 ps
T114 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2207086571 Aug 07 05:30:31 PM PDT 24 Aug 07 05:30:39 PM PDT 24 5509845381 ps
T722 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3683975424 Aug 07 05:30:38 PM PDT 24 Aug 07 05:31:25 PM PDT 24 1226533946454 ps
T723 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.3828392769 Aug 07 05:31:12 PM PDT 24 Aug 07 05:31:16 PM PDT 24 2484647263 ps
T724 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3578572938 Aug 07 05:33:03 PM PDT 24 Aug 07 05:33:11 PM PDT 24 2921887700 ps
T302 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.390641100 Aug 07 05:32:02 PM PDT 24 Aug 07 05:33:07 PM PDT 24 97004396682 ps
T725 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2445841924 Aug 07 05:33:23 PM PDT 24 Aug 07 05:33:25 PM PDT 24 6393751890 ps
T726 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.2727185439 Aug 07 05:30:24 PM PDT 24 Aug 07 05:30:27 PM PDT 24 2433060787 ps
T352 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3840091559 Aug 07 05:33:39 PM PDT 24 Aug 07 05:34:53 PM PDT 24 182472747142 ps
T727 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3265859591 Aug 07 05:32:38 PM PDT 24 Aug 07 05:32:39 PM PDT 24 2639840022 ps
T728 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2824872671 Aug 07 05:33:44 PM PDT 24 Aug 07 05:34:02 PM PDT 24 26605893728 ps
T729 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.2154244407 Aug 07 05:31:32 PM PDT 24 Aug 07 05:31:39 PM PDT 24 2486536629 ps
T730 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.3402533922 Aug 07 05:33:37 PM PDT 24 Aug 07 05:33:40 PM PDT 24 5504479444 ps
T731 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.774614224 Aug 07 05:31:51 PM PDT 24 Aug 07 05:32:00 PM PDT 24 3322248560 ps
T732 /workspace/coverage/default/23.sysrst_ctrl_stress_all.332147402 Aug 07 05:31:48 PM PDT 24 Aug 07 05:32:56 PM PDT 24 128811434431 ps
T115 /workspace/coverage/default/8.sysrst_ctrl_stress_all.478208059 Aug 07 05:30:50 PM PDT 24 Aug 07 05:31:00 PM PDT 24 17151900316 ps
T733 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1253886474 Aug 07 05:32:37 PM PDT 24 Aug 07 05:32:43 PM PDT 24 2460292961 ps
T734 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.161740876 Aug 07 05:30:47 PM PDT 24 Aug 07 05:30:49 PM PDT 24 2529418761 ps
T735 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1487666048 Aug 07 05:30:56 PM PDT 24 Aug 07 05:30:58 PM PDT 24 2043213990 ps
T736 /workspace/coverage/default/3.sysrst_ctrl_smoke.158651682 Aug 07 05:30:26 PM PDT 24 Aug 07 05:30:32 PM PDT 24 2111346471 ps
T737 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.993660793 Aug 07 05:33:22 PM PDT 24 Aug 07 05:33:29 PM PDT 24 2469764159 ps
T738 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3953353379 Aug 07 05:33:23 PM PDT 24 Aug 07 05:33:31 PM PDT 24 6187793611 ps
T739 /workspace/coverage/default/12.sysrst_ctrl_smoke.82866935 Aug 07 05:31:03 PM PDT 24 Aug 07 05:31:05 PM PDT 24 2131509809 ps
T263 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3219843334 Aug 07 05:32:38 PM PDT 24 Aug 07 05:34:55 PM PDT 24 56958029006 ps
T740 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1566604123 Aug 07 05:33:11 PM PDT 24 Aug 07 05:33:19 PM PDT 24 2511166812 ps
T741 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1589044789 Aug 07 05:32:10 PM PDT 24 Aug 07 05:32:23 PM PDT 24 83952591772 ps
T247 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.557140479 Aug 07 05:33:23 PM PDT 24 Aug 07 05:34:25 PM PDT 24 91549326168 ps
T742 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2637506533 Aug 07 05:30:57 PM PDT 24 Aug 07 05:32:06 PM PDT 24 27834309433 ps
T743 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1465900044 Aug 07 05:31:50 PM PDT 24 Aug 07 05:31:53 PM PDT 24 2129897140 ps
T744 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1360313456 Aug 07 05:32:04 PM PDT 24 Aug 07 05:32:07 PM PDT 24 2227146055 ps
T363 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1816810734 Aug 07 05:32:19 PM PDT 24 Aug 07 05:32:43 PM PDT 24 40247391555 ps
T745 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3866343675 Aug 07 05:32:44 PM PDT 24 Aug 07 05:32:48 PM PDT 24 2615432611 ps
T746 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.609609514 Aug 07 05:32:23 PM PDT 24 Aug 07 05:32:30 PM PDT 24 2509721078 ps
T128 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.182142703 Aug 07 05:32:49 PM PDT 24 Aug 07 05:32:57 PM PDT 24 13682923855 ps
T747 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1697011064 Aug 07 05:33:45 PM PDT 24 Aug 07 05:35:22 PM PDT 24 73617544602 ps
T748 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1801621663 Aug 07 05:30:41 PM PDT 24 Aug 07 05:31:49 PM PDT 24 101385848905 ps
T749 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.48299565 Aug 07 05:31:31 PM PDT 24 Aug 07 05:31:33 PM PDT 24 2635062960 ps
T750 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.2398322387 Aug 07 05:30:51 PM PDT 24 Aug 07 05:31:44 PM PDT 24 67423560716 ps
T167 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1535584755 Aug 07 05:33:22 PM PDT 24 Aug 07 05:37:56 PM PDT 24 869225656003 ps
T751 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.2860687166 Aug 07 05:33:20 PM PDT 24 Aug 07 05:35:26 PM PDT 24 95997288467 ps
T366 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2125882414 Aug 07 05:33:37 PM PDT 24 Aug 07 05:34:32 PM PDT 24 80348243523 ps
T752 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3772371508 Aug 07 05:30:30 PM PDT 24 Aug 07 05:30:37 PM PDT 24 2512148307 ps
T369 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.263346682 Aug 07 05:33:41 PM PDT 24 Aug 07 05:34:34 PM PDT 24 101702159421 ps
T753 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2388018407 Aug 07 05:30:20 PM PDT 24 Aug 07 05:30:24 PM PDT 24 2340357338 ps
T754 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1072089643 Aug 07 05:32:35 PM PDT 24 Aug 07 05:32:42 PM PDT 24 2513705903 ps
T755 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.549890954 Aug 07 05:31:38 PM PDT 24 Aug 07 05:31:42 PM PDT 24 2621135500 ps
T171 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.835655017 Aug 07 05:31:14 PM PDT 24 Aug 07 05:31:18 PM PDT 24 4677744850 ps
T756 /workspace/coverage/default/45.sysrst_ctrl_smoke.4205785180 Aug 07 05:33:18 PM PDT 24 Aug 07 05:33:21 PM PDT 24 2113004158 ps
T757 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.784148842 Aug 07 05:30:33 PM PDT 24 Aug 07 05:30:42 PM PDT 24 3487505847 ps
T758 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.3086546986 Aug 07 05:30:20 PM PDT 24 Aug 07 05:30:23 PM PDT 24 3992227637 ps
T759 /workspace/coverage/default/24.sysrst_ctrl_stress_all.3694230852 Aug 07 05:31:59 PM PDT 24 Aug 07 05:33:40 PM PDT 24 81279830501 ps
T760 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.1098321281 Aug 07 05:30:46 PM PDT 24 Aug 07 05:30:49 PM PDT 24 3995218431 ps
T761 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1866880197 Aug 07 05:33:40 PM PDT 24 Aug 07 05:35:10 PM PDT 24 34845490596 ps
T762 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3201032153 Aug 07 05:31:27 PM PDT 24 Aug 07 05:32:57 PM PDT 24 33782102635 ps
T763 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3969435347 Aug 07 05:30:44 PM PDT 24 Aug 07 05:30:49 PM PDT 24 2470151350 ps
T764 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3444358317 Aug 07 05:32:04 PM PDT 24 Aug 07 05:32:10 PM PDT 24 2449385968 ps
T765 /workspace/coverage/default/49.sysrst_ctrl_smoke.478338847 Aug 07 05:33:31 PM PDT 24 Aug 07 05:33:33 PM PDT 24 2128632490 ps
T766 /workspace/coverage/default/31.sysrst_ctrl_smoke.3930341977 Aug 07 05:32:15 PM PDT 24 Aug 07 05:32:16 PM PDT 24 2168058904 ps
T767 /workspace/coverage/default/41.sysrst_ctrl_smoke.696052574 Aug 07 05:33:00 PM PDT 24 Aug 07 05:33:02 PM PDT 24 2128857672 ps
T768 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2545153001 Aug 07 05:31:34 PM PDT 24 Aug 07 05:31:37 PM PDT 24 2630269319 ps
T769 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1607801927 Aug 07 05:32:22 PM PDT 24 Aug 07 05:32:25 PM PDT 24 2469480245 ps
T770 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2963237515 Aug 07 05:30:45 PM PDT 24 Aug 07 05:30:48 PM PDT 24 2522192939 ps
T771 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2650659691 Aug 07 05:33:11 PM PDT 24 Aug 07 05:33:18 PM PDT 24 4769126113 ps
T772 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.816768769 Aug 07 05:33:43 PM PDT 24 Aug 07 05:34:49 PM PDT 24 26081953493 ps
T773 /workspace/coverage/default/2.sysrst_ctrl_smoke.2336992191 Aug 07 05:30:20 PM PDT 24 Aug 07 05:30:22 PM PDT 24 2132594320 ps
T173 /workspace/coverage/default/49.sysrst_ctrl_stress_all.1954370749 Aug 07 05:33:36 PM PDT 24 Aug 07 05:34:02 PM PDT 24 11160713238 ps
T774 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.630938616 Aug 07 05:32:03 PM PDT 24 Aug 07 05:32:07 PM PDT 24 2521190649 ps
T775 /workspace/coverage/default/46.sysrst_ctrl_alert_test.3676187089 Aug 07 05:33:23 PM PDT 24 Aug 07 05:33:25 PM PDT 24 2062672889 ps
T776 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1792964195 Aug 07 05:30:13 PM PDT 24 Aug 07 05:30:20 PM PDT 24 2532209076 ps
T116 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.451597747 Aug 07 05:32:04 PM PDT 24 Aug 07 05:32:12 PM PDT 24 7310416425 ps
T80 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2361294473 Aug 07 05:33:38 PM PDT 24 Aug 07 05:37:39 PM PDT 24 96646449152 ps
T777 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.2559457721 Aug 07 05:32:26 PM PDT 24 Aug 07 05:32:32 PM PDT 24 3021082425 ps
T778 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.394175523 Aug 07 05:33:38 PM PDT 24 Aug 07 05:33:41 PM PDT 24 2620203623 ps
T779 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.3447832883 Aug 07 05:30:38 PM PDT 24 Aug 07 05:30:56 PM PDT 24 27952256054 ps
T780 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.4060564264 Aug 07 05:33:18 PM PDT 24 Aug 07 05:33:20 PM PDT 24 6516556071 ps
T781 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3017649570 Aug 07 05:31:50 PM PDT 24 Aug 07 05:31:54 PM PDT 24 2622870596 ps
T782 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.357890029 Aug 07 05:31:25 PM PDT 24 Aug 07 05:31:28 PM PDT 24 3207755804 ps
T248 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2671426865 Aug 07 05:32:29 PM PDT 24 Aug 07 05:36:25 PM PDT 24 91644767426 ps
T783 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2985224824 Aug 07 05:31:32 PM PDT 24 Aug 07 05:31:38 PM PDT 24 2510850260 ps
T372 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1927318132 Aug 07 05:32:24 PM PDT 24 Aug 07 05:34:00 PM PDT 24 2538328412276 ps
T784 /workspace/coverage/default/1.sysrst_ctrl_smoke.3967093073 Aug 07 05:30:20 PM PDT 24 Aug 07 05:30:25 PM PDT 24 2115133550 ps
T785 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.3775904594 Aug 07 05:32:30 PM PDT 24 Aug 07 05:32:41 PM PDT 24 4291140133 ps
T786 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.1101912815 Aug 07 05:30:38 PM PDT 24 Aug 07 05:30:57 PM PDT 24 329649301034 ps
T787 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.2798391609 Aug 07 05:32:44 PM PDT 24 Aug 07 05:32:47 PM PDT 24 3350121742 ps
T27 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2524859816 Aug 07 06:35:04 PM PDT 24 Aug 07 06:35:09 PM PDT 24 4623300252 ps
T28 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2562471099 Aug 07 06:35:32 PM PDT 24 Aug 07 06:35:39 PM PDT 24 2080203441 ps
T29 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.4256011715 Aug 07 06:34:02 PM PDT 24 Aug 07 06:34:04 PM PDT 24 2084340330 ps
T788 /workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.3978793028 Aug 07 06:35:40 PM PDT 24 Aug 07 06:35:46 PM PDT 24 2014579725 ps
T255 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.2640892908 Aug 07 06:34:44 PM PDT 24 Aug 07 06:34:48 PM PDT 24 2451615752 ps
T272 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1660688767 Aug 07 06:34:06 PM PDT 24 Aug 07 06:34:09 PM PDT 24 2116035779 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%