Unified Coverage Report :: Group :: uart_env_pkg::uart_env_cov::tx_watermark_cg

Group : uart_env_pkg::uart_env_cov::tx_watermark_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv

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Summary for Group uart_env_pkg::uart_env_cov::tx_watermark_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00

Variables for Group uart_env_pkg::uart_env_cov::tx_watermark_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_watermark_lvl	7	0	7	100.00	100	1	1	0

Summary for Variable cp_watermark_lvl

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_watermark_lvl

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_levels[0]	1488	1			T2	3		T3	1		T38	4
all_levels[1]	666	1			T13	6		T14	1		T15	1
all_levels[2]	699	1			T13	5		T14	2		T40	3
all_levels[3]	623	1			T11	4		T13	4		T14	6
all_levels[4]	632	1			T11	2		T13	2		T114	3
all_levels[5]	511	1			T13	7		T14	1		T16	3
all_levels[6]	552	1			T11	1		T13	9		T14	1