Unified Coverage Report :: Group :: uart_env_pkg::uart_env_cov::tx_watermark_cg

Group : uart_env_pkg::uart_env_cov::tx_watermark_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv

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Summary for Group uart_env_pkg::uart_env_cov::tx_watermark_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00

Variables for Group uart_env_pkg::uart_env_cov::tx_watermark_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_watermark_lvl	7	0	7	100.00	100	1	1	0

Summary for Variable cp_watermark_lvl

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_watermark_lvl

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_levels[0]	1546	1			T4	5		T7	3		T36	2
all_levels[1]	595	1			T14	1		T15	1		T114	4
all_levels[2]	626	1			T17	1		T111	5		T15	1
all_levels[3]	707	1			T12	1		T14	2		T28	1
all_levels[4]	621	1			T17	1		T21	1		T15	1
all_levels[5]	551	1			T18	3		T16	4		T15	1
all_levels[6]	480	1			T15	1		T117	4		T120	1