Group : uart_env_pkg::uart_env_cov::rx_timeout_cg
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Group : uart_env_pkg::uart_env_cov::rx_timeout_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv



Summary for Group uart_env_pkg::uart_env_cov::rx_timeout_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group uart_env_pkg::uart_env_cov::rx_timeout_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_timeout 3 0 3 100.00 100 1 1 0


Summary for Variable cp_timeout

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_timeout

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
large_timeout 625 1 T1 2 T2 4 T6 3
medium_timeout 482 1 T6 1 T10 1 T83 2
small_timeout 337 1 T17 1 T14 2 T25 4

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